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lib: utils/timer: Add Andes fdt timer support

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Since we can get the PLMT base address and timer frequency from
device tree, move plmt timer device to fdt timer framework.

dts example (Quad-core AX45MP):

  cpus {
      ...
      timebase-frequency = <0x3938700>;
      ...
  }
  soc {
      ...
      plmt0@e6000000 {
          compatible = "andestech,plmt0";
          reg = <0x00 0xe6000000 0x00 0x100000>;
          interrupts-extended = <&cpu0_intc 0x07
                                 &cpu1_intc 0x07
                                 &cpu2_intc 0x07
                                 &cpu3_intc 0x07>;
      };
      ...
  }

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Yu Chien Peter Lin
2022-10-14 08:32:46 +08:00
committed by Anup Patel
parent 88f58a3694
commit ef9f02e7fb
13 changed files with 259 additions and 144 deletions
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54
lib/utils/fdt/fdt_helper.c
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@@ -835,6 +835,60 @@ int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
return 0;
}
int fdt_parse_plmt_node(void *fdt, int nodeoffset, unsigned long *plmt_base,
unsigned long *plmt_size, u32 *hart_count)
{
const fdt32_t *val;
int rc, i, count;
uint64_t reg_addr, reg_size, cpu_offset, cpu_intc_offset;
u32 phandle, hwirq, hartid, hcount;
if (nodeoffset < 0 || !fdt || !plmt_base ||
!hart_count || !plmt_size)
return SBI_EINVAL;
rc = fdt_get_node_addr_size(fdt, nodeoffset, 0,
&reg_addr, &reg_size);
if (rc < 0 || !plmt_base || !plmt_size)
return SBI_ENODEV;
*plmt_base = reg_addr;
*plmt_size = reg_size;
val = fdt_getprop(fdt, nodeoffset, "interrupts-extended", &count);
if (!val || count < sizeof(fdt32_t))
return 0;
count = count / sizeof(fdt32_t);
hcount = 0;
for (i = 0; i < (count / 2); i++) {
phandle = fdt32_to_cpu(val[2 * i]);
hwirq = fdt32_to_cpu(val[2 * i + 1]);
cpu_intc_offset = fdt_node_offset_by_phandle(fdt, phandle);
if (cpu_intc_offset < 0)
continue;
cpu_offset = fdt_parent_offset(fdt, cpu_intc_offset);
if (cpu_intc_offset < 0)
continue;
rc = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
if (rc)
continue;
if (SBI_HARTMASK_MAX_BITS <= hartid)
continue;
if (hwirq == IRQ_M_TIMER)
hcount++;
}
*hart_count = hcount;
return 0;
}
int fdt_parse_compat_addr(void *fdt, uint64_t *addr,
const char *compatible)
{