forked from Mirrors/opensbi
		
	lib: utils/timer: Add Andes fdt timer support
Since we can get the PLMT base address and timer frequency from
device tree, move plmt timer device to fdt timer framework.
dts example (Quad-core AX45MP):
  cpus {
      ...
      timebase-frequency = <0x3938700>;
      ...
  }
  soc {
      ...
      plmt0@e6000000 {
          compatible = "andestech,plmt0";
          reg = <0x00 0xe6000000 0x00 0x100000>;
          interrupts-extended = <&cpu0_intc 0x07
                                 &cpu1_intc 0x07
                                 &cpu2_intc 0x07
                                 &cpu3_intc 0x07>;
      };
      ...
  }
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
			
			
This commit is contained in:
		
				
					committed by
					
						
						Anup Patel
					
				
			
			
				
	
			
			
			
						parent
						
							88f58a3694
						
					
				
				
					commit
					ef9f02e7fb
				
			@@ -835,6 +835,60 @@ int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
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	return 0;
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}
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int fdt_parse_plmt_node(void *fdt, int nodeoffset, unsigned long *plmt_base,
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			  unsigned long *plmt_size, u32 *hart_count)
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{
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	const fdt32_t *val;
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	int rc, i, count;
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	uint64_t reg_addr, reg_size, cpu_offset, cpu_intc_offset;
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	u32 phandle, hwirq, hartid, hcount;
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	if (nodeoffset < 0 || !fdt || !plmt_base ||
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	    !hart_count || !plmt_size)
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		return SBI_EINVAL;
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	rc = fdt_get_node_addr_size(fdt, nodeoffset, 0,
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				    ®_addr, ®_size);
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	if (rc < 0 || !plmt_base || !plmt_size)
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		return SBI_ENODEV;
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	*plmt_base = reg_addr;
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	*plmt_size = reg_size;
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	val = fdt_getprop(fdt, nodeoffset, "interrupts-extended", &count);
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	if (!val || count < sizeof(fdt32_t))
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		return 0;
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	count = count / sizeof(fdt32_t);
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	hcount = 0;
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	for (i = 0; i < (count / 2); i++) {
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		phandle = fdt32_to_cpu(val[2 * i]);
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		hwirq = fdt32_to_cpu(val[2 * i + 1]);
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		cpu_intc_offset = fdt_node_offset_by_phandle(fdt, phandle);
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		if (cpu_intc_offset < 0)
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			continue;
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		cpu_offset = fdt_parent_offset(fdt, cpu_intc_offset);
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		if (cpu_intc_offset < 0)
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			continue;
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		rc = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
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		if (rc)
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			continue;
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		if (SBI_HARTMASK_MAX_BITS <= hartid)
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			continue;
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		if (hwirq == IRQ_M_TIMER)
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			hcount++;
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	}
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	*hart_count = hcount;
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	return 0;
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}
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int fdt_parse_compat_addr(void *fdt, uint64_t *addr,
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			  const char *compatible)
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{
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@@ -14,10 +14,19 @@ config FDT_TIMER_MTIMER
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	select TIMER_MTIMER
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	default n
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config FDT_TIMER_PLMT
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	bool "Andes PLMT FDT driver"
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	select TIMER_PLMT
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	default n
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endif
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config TIMER_MTIMER
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	bool "ACLINT MTIMER support"
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	default n
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config TIMER_PLMT
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	bool "Andes PLMT support"
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	default n
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endmenu
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										104
									
								
								lib/utils/timer/andes_plmt.c
									
									
									
									
									
										Normal file
									
								
							
							
						
						
									
										104
									
								
								lib/utils/timer/andes_plmt.c
									
									
									
									
									
										Normal file
									
								
							@@ -0,0 +1,104 @@
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/*
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 * SPDX-License-Identifier: BSD-2-Clause
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 *
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 * Copyright (c) 2022 Andes Technology Corporation
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 *
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 * Authors:
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 *   Yu Chien Peter Lin <peterlin@andestech.com>
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 */
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_io.h>
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#include <sbi/sbi_domain.h>
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#include <sbi/sbi_error.h>
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#include <sbi/sbi_timer.h>
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#include <sbi_utils/timer/andes_plmt.h>
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struct plmt_data plmt;
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static u64 plmt_timer_value(void)
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{
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#if __riscv_xlen == 64
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	return readq_relaxed(plmt.time_val);
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#else
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	u32 lo, hi;
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	do {
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		hi = readl_relaxed((void *)plmt.time_val + 0x04);
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		lo = readl_relaxed(plmt.time_val);
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	} while (hi != readl_relaxed((void *)plmt.time_val + 0x04));
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	return ((u64)hi << 32) | (u64)lo;
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#endif
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}
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static void plmt_timer_event_stop(void)
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{
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	u32 target_hart = current_hartid();
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	if (plmt.hart_count <= target_hart)
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		ebreak();
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	/* Clear PLMT Time Compare */
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#if __riscv_xlen == 64
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	writeq_relaxed(-1ULL, &plmt.time_cmp[target_hart]);
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#else
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	writel_relaxed(-1UL, &plmt.time_cmp[target_hart]);
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	writel_relaxed(-1UL, (void *)(&plmt.time_cmp[target_hart]) + 0x04);
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#endif
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}
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static void plmt_timer_event_start(u64 next_event)
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{
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	u32 target_hart = current_hartid();
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	if (plmt.hart_count <= target_hart)
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		ebreak();
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	/* Program PLMT Time Compare */
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#if __riscv_xlen == 64
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	writeq_relaxed(next_event, &plmt.time_cmp[target_hart]);
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#else
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	u32 mask = -1UL;
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	writel_relaxed(next_event & mask, &plmt.time_cmp[target_hart]);
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	writel_relaxed(next_event >> 32,
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		       (void *)(&plmt.time_cmp[target_hart]) + 0x04);
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#endif
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}
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static struct sbi_timer_device plmt_timer = {
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	.name		   = "andes_plmt",
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	.timer_freq	   = DEFAULT_AE350_PLMT_FREQ,
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	.timer_value	   = plmt_timer_value,
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	.timer_event_start = plmt_timer_event_start,
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	.timer_event_stop  = plmt_timer_event_stop
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};
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int plmt_cold_timer_init(struct plmt_data *plmt)
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{
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	int rc;
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	/* Add PLMT region to the root domain */
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	rc = sbi_domain_root_add_memrange(
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		(unsigned long)plmt->time_val, plmt->size, PLMT_REGION_ALIGN,
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		SBI_DOMAIN_MEMREGION_MMIO | SBI_DOMAIN_MEMREGION_READABLE);
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	if (rc)
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		return rc;
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	plmt_timer.timer_freq = plmt->timer_freq;
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	sbi_timer_set_device(&plmt_timer);
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	return 0;
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}
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int plmt_warm_timer_init(void)
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{
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	if (!plmt.time_val)
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		return SBI_ENODEV;
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	plmt_timer_event_stop();
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	return 0;
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}
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										51
									
								
								lib/utils/timer/fdt_timer_plmt.c
									
									
									
									
									
										Normal file
									
								
							
							
						
						
									
										51
									
								
								lib/utils/timer/fdt_timer_plmt.c
									
									
									
									
									
										Normal file
									
								
							@@ -0,0 +1,51 @@
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/*
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 * SPDX-License-Identifier: BSD-2-Clause
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 *
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 * Copyright (c) 2022 Andes Technology Corporation
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 *
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 * Authors:
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 *   Yu Chien Peter Lin <peterlin@andestech.com>
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 */
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#include <sbi_utils/fdt/fdt_helper.h>
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#include <sbi_utils/timer/fdt_timer.h>
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#include <sbi_utils/timer/andes_plmt.h>
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extern struct plmt_data plmt;
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static int fdt_plmt_cold_timer_init(void *fdt, int nodeoff,
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				    const struct fdt_match *match)
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{
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	int rc;
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	unsigned long plmt_base;
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	rc = fdt_parse_plmt_node(fdt, nodeoff, &plmt_base, &plmt.size,
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				 &plmt.hart_count);
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	if (rc)
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		return rc;
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	plmt.time_val = (u64 *)plmt_base;
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	plmt.time_cmp = (u64 *)(plmt_base + 0x8);
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	rc = fdt_parse_timebase_frequency(fdt, &plmt.timer_freq);
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	if (rc)
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		return rc;
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	rc = plmt_cold_timer_init(&plmt);
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	if (rc)
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		return rc;
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	return 0;
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}
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static const struct fdt_match timer_plmt_match[] = {
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	{ .compatible = "andestech,plmt0" },
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	{},
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};
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struct fdt_timer fdt_timer_plmt = {
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	.match_table = timer_plmt_match,
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	.cold_init   = fdt_plmt_cold_timer_init,
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	.warm_init   = plmt_warm_timer_init,
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	.exit	     = NULL,
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};
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@@ -8,9 +8,13 @@
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#
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libsbiutils-objs-$(CONFIG_TIMER_MTIMER) += timer/aclint_mtimer.o
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libsbiutils-objs-$(CONFIG_TIMER_PLMT) += timer/andes_plmt.o
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libsbiutils-objs-$(CONFIG_FDT_TIMER) += timer/fdt_timer.o
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libsbiutils-objs-$(CONFIG_FDT_TIMER) += timer/fdt_timer_drivers.o
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carray-fdt_timer_drivers-$(CONFIG_FDT_TIMER_MTIMER) += fdt_timer_mtimer
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libsbiutils-objs-$(CONFIG_FDT_TIMER_MTIMER) += timer/fdt_timer_mtimer.o
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carray-fdt_timer_drivers-$(CONFIG_FDT_TIMER_PLMT) += fdt_timer_plmt
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libsbiutils-objs-$(CONFIG_FDT_TIMER_PLMT) += timer/fdt_timer_plmt.o
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