forked from Mirrors/opensbi
lib: utils/timer: Add Andes fdt timer support
Since we can get the PLMT base address and timer frequency from device tree, move plmt timer device to fdt timer framework. dts example (Quad-core AX45MP): cpus { ... timebase-frequency = <0x3938700>; ... } soc { ... plmt0@e6000000 { compatible = "andestech,plmt0"; reg = <0x00 0xe6000000 0x00 0x100000>; interrupts-extended = <&cpu0_intc 0x07 &cpu1_intc 0x07 &cpu2_intc 0x07 &cpu3_intc 0x07>; }; ... } Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
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Anup Patel

parent
88f58a3694
commit
ef9f02e7fb
@@ -95,6 +95,9 @@ int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
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unsigned long *out_addr2, unsigned long *out_size2,
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u32 *out_first_hartid, u32 *out_hart_count);
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int fdt_parse_plmt_node(void *fdt, int nodeoffset, unsigned long *plmt_base,
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unsigned long *plmt_size, u32 *hart_count);
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int fdt_parse_compat_addr(void *fdt, uint64_t *addr,
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const char *compatible);
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29
include/sbi_utils/timer/andes_plmt.h
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29
include/sbi_utils/timer/andes_plmt.h
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@@ -0,0 +1,29 @@
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/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2022 Andes Technology Corporation
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*
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* Authors:
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* Zong Li <zong@andestech.com>
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* Nylon Chen <nylon7@andestech.com>
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* Yu Chien Peter Lin <peterlin@andestech.com>
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*/
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#ifndef __TIMER_ANDES_PLMT_H__
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#define __TIMER_ANDES_PLMT_H__
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#define DEFAULT_AE350_PLMT_FREQ 60000000
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#define PLMT_REGION_ALIGN 0x1000
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struct plmt_data {
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u32 hart_count;
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unsigned long size;
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unsigned long timer_freq;
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volatile u64 *time_val;
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volatile u64 *time_cmp;
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};
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int plmt_cold_timer_init(struct plmt_data *plmt);
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int plmt_warm_timer_init(void);
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#endif /* __TIMER_ANDES_PLMT_H__ */
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