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lib: sbi_pmu: Align the event type offset as per SBI specification

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The bits encoded in event_idx[19:16] indicate the event type, with
an offset of 16 instead of 20.

Fixes: 13d40f21d5 ("lib: sbi: Add PMU support")
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
This commit is contained in:
Yu Chien Peter Lin
2023-03-30 16:41:14 +08:00
committed by Anup Patel
parent 91767d093b
commit edc9914392
2 changed files with 6 additions and 5 deletions
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4
include/sbi/sbi_ecall_interface.h
View File

@@ -215,10 +215,10 @@ enum sbi_pmu_ctr_type {
}; };
/* Helper macros to decode event idx */ /* Helper macros to decode event idx */
#define SBI_PMU_EVENT_IDX_OFFSET 20
#define SBI_PMU_EVENT_IDX_MASK 0xFFFFF #define SBI_PMU_EVENT_IDX_MASK 0xFFFFF
#define SBI_PMU_EVENT_IDX_TYPE_OFFSET 16
#define SBI_PMU_EVENT_IDX_TYPE_MASK (0xF << SBI_PMU_EVENT_IDX_TYPE_OFFSET)
#define SBI_PMU_EVENT_IDX_CODE_MASK 0xFFFF #define SBI_PMU_EVENT_IDX_CODE_MASK 0xFFFF
#define SBI_PMU_EVENT_IDX_TYPE_MASK 0xF0000
#define SBI_PMU_EVENT_RAW_IDX 0x20000 #define SBI_PMU_EVENT_RAW_IDX 0x20000
#define SBI_PMU_EVENT_IDX_INVALID 0xFFFFFFFF #define SBI_PMU_EVENT_IDX_INVALID 0xFFFFFFFF

7
lib/sbi/sbi_pmu.c
View File

@@ -81,7 +81,8 @@ static uint32_t num_hw_ctrs;
static uint32_t total_ctrs; static uint32_t total_ctrs;
/* Helper macros to retrieve event idx and code type */ /* Helper macros to retrieve event idx and code type */
#define get_cidx_type(x) ((x & SBI_PMU_EVENT_IDX_TYPE_MASK) >> 16) #define get_cidx_type(x) \
(((x) & SBI_PMU_EVENT_IDX_TYPE_MASK) >> SBI_PMU_EVENT_IDX_TYPE_OFFSET)
#define get_cidx_code(x) (x & SBI_PMU_EVENT_IDX_CODE_MASK) #define get_cidx_code(x) (x & SBI_PMU_EVENT_IDX_CODE_MASK)
/** /**
@@ -903,10 +904,10 @@ int sbi_pmu_init(struct sbi_scratch *scratch, bool cold_boot)
pmu_reset_event_map(hartid); pmu_reset_event_map(hartid);
/* First three counters are fixed by the priv spec and we enable it by default */ /* First three counters are fixed by the priv spec and we enable it by default */
active_events[hartid][0] = SBI_PMU_EVENT_TYPE_HW << SBI_PMU_EVENT_IDX_OFFSET | active_events[hartid][0] = SBI_PMU_EVENT_TYPE_HW << SBI_PMU_EVENT_IDX_TYPE_OFFSET |
SBI_PMU_HW_CPU_CYCLES; SBI_PMU_HW_CPU_CYCLES;
active_events[hartid][1] = SBI_PMU_EVENT_IDX_INVALID; active_events[hartid][1] = SBI_PMU_EVENT_IDX_INVALID;
active_events[hartid][2] = SBI_PMU_EVENT_TYPE_HW << SBI_PMU_EVENT_IDX_OFFSET | active_events[hartid][2] = SBI_PMU_EVENT_TYPE_HW << SBI_PMU_EVENT_IDX_TYPE_OFFSET |
SBI_PMU_HW_INSTRUCTIONS; SBI_PMU_HW_INSTRUCTIONS;
return 0; return 0;