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platform: plic: Fix comments of programming the interrupt enable register

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The codes that currently program the interrupt enable register for
S-mode disagrees with what the comments say. Fix the comments.

While we are here, add one line comment to describe what is done
for M-mode too.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Bin Meng
2019-03-14 16:12:44 +08:00
committed by Anup Patel
parent 6c39ea99ee
commit e921fc2691
1 changed files with 2 additions and 1 deletions
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3
platform/common/irqchip/plic.c
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@@ -86,12 +86,13 @@ int plic_warm_irqchip_init(u32 target_hart,
if (plic_hart_count <= target_hart)
return -1;
/* By default, disable all IRQs for M-mode of target HART */
if (m_cntx_id > -1) {
for (i = 0; i < ie_words; i++)
plic_set_ie(m_cntx_id, i, 0);
}
/* By default, enable all IRQs for S-mode of target HART */
/* By default, disable all IRQs for S-mode of target HART */
if (s_cntx_id > -1) {
for (i = 0; i < ie_words; i++)
plic_set_ie(s_cntx_id, i, 0);