forked from Mirrors/opensbi
lib: utils/timer: Allow separate base addresses for MTIME and MTIMECMP
We extend the ACLINT library to support separate base addresses for MTIME and MTIMECMP registers. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
This commit is contained in:
@@ -10,6 +10,7 @@
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_atomic.h>
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#include <sbi/riscv_io.h>
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#include <sbi/sbi_bitops.h>
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#include <sbi/sbi_domain.h>
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#include <sbi/sbi_error.h>
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#include <sbi/sbi_hartmask.h>
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@@ -17,9 +18,6 @@
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#include <sbi/sbi_timer.h>
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#include <sbi_utils/timer/aclint_mtimer.h>
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#define MTIMER_CMP_OFF 0x0000
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#define MTIMER_VAL_OFF 0x7ff8
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static struct aclint_mtimer_data *mtimer_hartid2data[SBI_HARTMASK_MAX_BITS];
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#if __riscv_xlen != 32
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@@ -56,7 +54,7 @@ static void mtimer_time_wr32(bool timecmp, u64 value, volatile u64 *addr)
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static u64 mtimer_value(void)
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{
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struct aclint_mtimer_data *mt = mtimer_hartid2data[current_hartid()];
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u64 *time_val = ((void *)mt->addr) + MTIMER_VAL_OFF;
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u64 *time_val = (void *)mt->mtime_addr;
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/* Read MTIMER Time Value */
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return mt->time_rd(time_val) + mt->time_delta;
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@@ -66,7 +64,7 @@ static void mtimer_event_stop(void)
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{
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u32 target_hart = current_hartid();
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struct aclint_mtimer_data *mt = mtimer_hartid2data[target_hart];
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u64 *time_cmp = (void *)mt->addr + MTIMER_CMP_OFF;
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u64 *time_cmp = (void *)mt->mtimecmp_addr;
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/* Clear MTIMER Time Compare */
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mt->time_wr(true, -1ULL, &time_cmp[target_hart - mt->first_hartid]);
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@@ -76,7 +74,7 @@ static void mtimer_event_start(u64 next_event)
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{
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u32 target_hart = current_hartid();
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struct aclint_mtimer_data *mt = mtimer_hartid2data[target_hart];
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u64 *time_cmp = (void *)mt->addr + MTIMER_CMP_OFF;
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u64 *time_cmp = (void *)mt->mtimecmp_addr;
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/* Program MTIMER Time Compare */
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mt->time_wr(true, next_event - mt->time_delta,
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@@ -111,8 +109,8 @@ int aclint_mtimer_warm_init(void)
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*/
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if (mt->time_delta_reference) {
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reference = mt->time_delta_reference;
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mt_time_val = (void *)mt->addr + MTIMER_VAL_OFF;
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ref_time_val = (void *)reference->addr + MTIMER_VAL_OFF;
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mt_time_val = (void *)mt->mtime_addr;
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ref_time_val = (void *)reference->mtime_addr;
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if (!atomic_raw_xchg_ulong(&mt->time_delta_computed, 1)) {
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v1 = mt->time_rd(mt_time_val);
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mv = reference->time_rd(ref_time_val);
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@@ -122,24 +120,54 @@ int aclint_mtimer_warm_init(void)
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}
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/* Clear Time Compare */
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mt_time_cmp = (void *)mt->addr + MTIMER_CMP_OFF;
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mt_time_cmp = (void *)mt->mtimecmp_addr;
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mt->time_wr(true, -1ULL,
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&mt_time_cmp[target_hart - mt->first_hartid]);
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return 0;
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}
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static int aclint_mtimer_add_regions(unsigned long addr, unsigned long size)
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{
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#define MTIMER_ADD_REGION_ALIGN 0x1000
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int rc;
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unsigned long pos, end, rsize;
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struct sbi_domain_memregion reg;
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pos = addr;
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end = addr + size;
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while (pos < end) {
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rsize = pos & (MTIMER_ADD_REGION_ALIGN - 1);
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if (rsize)
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rsize = 1UL << __ffs(pos);
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else
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rsize = ((end - pos) < MTIMER_ADD_REGION_ALIGN) ?
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(end - pos) : MTIMER_ADD_REGION_ALIGN;
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sbi_domain_memregion_init(pos, rsize,
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SBI_DOMAIN_MEMREGION_MMIO, ®);
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rc = sbi_domain_root_add_memregion(®);
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if (rc)
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return rc;
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pos += rsize;
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}
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return 0;
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}
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int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
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struct aclint_mtimer_data *reference)
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{
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u32 i;
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int rc;
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unsigned long pos, region_size;
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struct sbi_domain_memregion reg;
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/* Sanity checks */
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if (!mt || (mt->addr & (ACLINT_MTIMER_ALIGN - 1)) ||
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(mt->size < ACLINT_MTIMER_SIZE) ||
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if (!mt || !mt->mtime_size ||
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(mt->hart_count && !mt->mtimecmp_size) ||
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(mt->mtime_addr & (ACLINT_MTIMER_ALIGN - 1)) ||
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(mt->mtime_size & (ACLINT_MTIMER_ALIGN - 1)) ||
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(mt->mtimecmp_addr & (ACLINT_MTIMER_ALIGN - 1)) ||
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(mt->mtimecmp_size & (ACLINT_MTIMER_ALIGN - 1)) ||
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(mt->first_hartid >= SBI_HARTMASK_MAX_BITS) ||
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(mt->hart_count > ACLINT_MTIMER_MAX_HARTS))
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return SBI_EINVAL;
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@@ -164,12 +192,24 @@ int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
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mtimer_hartid2data[mt->first_hartid + i] = mt;
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/* Add MTIMER regions to the root domain */
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for (pos = 0; pos < mt->size; pos += ACLINT_MTIMER_ALIGN) {
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region_size = ((mt->size - pos) < ACLINT_MTIMER_ALIGN) ?
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(mt->size - pos) : ACLINT_MTIMER_ALIGN;
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sbi_domain_memregion_init(mt->addr + pos, region_size,
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SBI_DOMAIN_MEMREGION_MMIO, ®);
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rc = sbi_domain_root_add_memregion(®);
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if (mt->mtime_addr == (mt->mtimecmp_addr + mt->mtimecmp_size)) {
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rc = aclint_mtimer_add_regions(mt->mtimecmp_addr,
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mt->mtime_size + mt->mtimecmp_size);
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if (rc)
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return rc;
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} else if (mt->mtimecmp_addr == (mt->mtime_addr + mt->mtime_size)) {
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rc = aclint_mtimer_add_regions(mt->mtime_addr,
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mt->mtime_size + mt->mtimecmp_size);
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if (rc)
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return rc;
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} else {
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rc = aclint_mtimer_add_regions(mt->mtime_addr,
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mt->mtime_size);
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if (rc)
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return rc;
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rc = aclint_mtimer_add_regions(mt->mtimecmp_addr,
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mt->mtimecmp_size);
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if (rc)
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return rc;
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}
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