forked from Mirrors/opensbi
platform: Add support for Shakti C-class SoC from IIT-M
C-Class is a member of the SHAKTI family of processors from Indian Institute of Technology - Madras(IIT-M). It is an extremely configurable and commercial-grade 5-stage in-order core supporting the standard RV64GCSUN ISA extensions. https://gitlab.com/shaktiproject/cores/c-class/blob/master/README.md We add OpenSBI support for Shakti C-class SoC. Signed-off-by: Vijai Kumar K <vijai@behindbytes.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
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Anup Patel

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637b348224
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db56ef367c
@@ -39,6 +39,9 @@ int fdt_parse_hart_id(void *fdt, int cpu_offset, u32 *hartid);
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int fdt_parse_max_hart_id(void *fdt, u32 *max_hartid);
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int fdt_parse_shakti_uart_node(void *fdt, int nodeoffset,
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struct platform_uart_data *uart);
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int fdt_parse_sifive_uart_node(void *fdt, int nodeoffset,
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struct platform_uart_data *uart);
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18
include/sbi_utils/serial/shakti-uart.h
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18
include/sbi_utils/serial/shakti-uart.h
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@@ -0,0 +1,18 @@
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/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2020 Vijai Kumar K <vijai@behindbytes.com>
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*/
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#ifndef __SERIAL_SHAKTI_UART_H__
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#define __SERIAL_SHAKTI_UART_H__
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#include <sbi/sbi_types.h>
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void shakti_uart_putc(char ch);
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int shakti_uart_getc(void);
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int shakti_uart_init(unsigned long base, u32 in_freq, u32 baudrate);
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#endif
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