utils/reset: Remove fdt_reset_thead

In the past, we used fdt_reset_thead to help customers with prototype
verification. However, with the emergence of the Big-little SoC system,
it can no longer meet the demand. Therefore, we use zero_stage_boot
instead of fdt_reset_thead. It cleans up the opensbi code and ends the
disputation of reset_sample's dts.

This patch removes the fdt_reset_thead component and updates the related
doc.

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Guo Ren
2023-10-12 04:59:13 -04:00
committed by Anup Patel
parent fccdf41d32
commit d1e0f7f25b
7 changed files with 7 additions and 389 deletions

View File

@@ -33,10 +33,6 @@ config FDT_RESET_SYSCON
depends on FDT_REGMAP
default n
config FDT_RESET_THEAD
bool "T-HEAD FDT reset driver"
default n
endif
endmenu

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@@ -1,134 +0,0 @@
/*
* SPDX-License-Identifier: BSD-2-Clause
*/
#include <libfdt.h>
#include <sbi/riscv_io.h>
#include <sbi/sbi_bitops.h>
#include <sbi/sbi_hart.h>
#include <sbi/sbi_scratch.h>
#include <sbi/sbi_system.h>
#include <sbi_utils/fdt/fdt_helper.h>
#include <sbi_utils/reset/fdt_reset.h>
#include "fdt_reset_thead.h"
struct custom_csr custom_csr[MAX_CUSTOM_CSR];
#define CSR_OPCODE 0x39073
static void clone_csrs(int cnt)
{
unsigned long i;
for (i = 0; i < cnt; i++) {
/* Write csr BIT[31 - 20] to stub */
__reset_thead_csr_stub[3*i + 1] =
CSR_OPCODE | (custom_csr[i].index << 20);
/* Mask csr BIT[31 - 20] */
*(u32 *)&__fdt_reset_thead_csrr &= BIT(20) - 1;
smp_mb();
/* Write csr BIT[31 - 20] to __fdt_reset_thead_csrr */
*(u32 *)&__fdt_reset_thead_csrr |= custom_csr[i].index << 20;
smp_mb();
RISCV_FENCE_I;
custom_csr[i].value = __fdt_reset_thead_csrr();
}
}
static int thead_system_reset_check(u32 type, u32 reason)
{
return 1;
}
static void thead_system_reset(u32 type, u32 reason)
{
ebreak();
}
static struct sbi_system_reset_device thead_reset = {
.name = "thead_reset",
.system_reset_check = thead_system_reset_check,
.system_reset = thead_system_reset
};
extern void __thead_pre_start_warm(void);
static int thead_reset_init(void *fdt, int nodeoff,
const struct fdt_match *match)
{
char *p;
const fdt64_t *val;
const fdt32_t *val_w;
int len, i;
u32 t, tmp = 0;
/* Prepare clone csrs */
val_w = fdt_getprop(fdt, nodeoff, "csr-copy", &len);
if (len > 0 && val_w) {
int cnt;
cnt = len / sizeof(fdt32_t);
if (cnt > MAX_CUSTOM_CSR)
sbi_hart_hang();
for (i = 0; i < cnt; i++) {
custom_csr[i].index = fdt32_to_cpu(val_w[i]);
}
if (cnt)
clone_csrs(cnt);
}
/* Old reset method for secondary harts */
if (fdt_getprop(fdt, nodeoff, "using-csr-reset", &len)) {
csr_write(0x7c7, (ulong)&__thead_pre_start_warm);
csr_write(0x7c6, -1);
}
/* Custom reset method for secondary harts */
val = fdt_getprop(fdt, nodeoff, "entry-reg", &len);
if (len > 0 && val) {
p = (char *)(ulong)fdt64_to_cpu(*val);
val_w = fdt_getprop(fdt, nodeoff, "entry-cnt", &len);
if (len > 0 && val_w) {
tmp = fdt32_to_cpu(*val_w);
for (i = 0; i < tmp; i++) {
t = (ulong)&__thead_pre_start_warm;
writel(t, p + (8 * i));
t = (u64)(ulong)&__thead_pre_start_warm >> 32;
writel(t, p + (8 * i) + 4);
}
}
val = fdt_getprop(fdt, nodeoff, "control-reg", &len);
if (len > 0 && val) {
p = (void *)(ulong)fdt64_to_cpu(*val);
val_w = fdt_getprop(fdt, nodeoff, "control-val", &len);
if (len > 0 && val_w) {
tmp = fdt32_to_cpu(*val_w);
tmp |= readl(p);
writel(tmp, p);
}
}
}
sbi_system_reset_add_device(&thead_reset);
return 0;
}
static const struct fdt_match thead_reset_match[] = {
{ .compatible = "thead,reset-sample" },
{ },
};
struct fdt_reset fdt_reset_thead = {
.match_table = thead_reset_match,
.init = thead_reset_init
};

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@@ -1,23 +0,0 @@
/*
* SPDX-License-Identifier: BSD-2-Clause
*/
#ifndef __FDT_RESET_THEAD_H__
#define __FDT_RESET_THEAD_H__
#define MAX_CUSTOM_CSR 32
#ifndef __ASSEMBLER__
struct custom_csr {
unsigned long index;
unsigned long value;
};
u64 __fdt_reset_thead_csrr(void);
extern struct custom_csr custom_csr[MAX_CUSTOM_CSR];
extern u32 __reset_thead_csr_stub[];
#endif /* __ASSEMBLER__ */
#endif /* __FDT_RESET_THEAD_H__ */

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@@ -1,47 +0,0 @@
/*
* SPDX-License-Identifier: BSD-2-Clause
*/
#include <sbi/riscv_asm.h>
#include "fdt_reset_thead.h"
/*
* csrrs rd, csr, rs1
* |31 20|19 15|14 12|11 7|6 0|
* csr rs1 010 rd 1110011
*/
#define CSR_STUB addi x0, x0, 0
.option norvc
.align 3
.global __fdt_reset_thead_csrr
__fdt_reset_thead_csrr:
csrrs a0, 0, x0
ret
.align 3
.global __thead_pre_start_warm
__thead_pre_start_warm:
/*
* Clear L1 cache & BTB & BHT ...
*/
li t1, 0x70013
csrw 0x7c2, t1
fence rw,rw
lla t1, custom_csr
.global __reset_thead_csr_stub
__reset_thead_csr_stub:
.rept MAX_CUSTOM_CSR
REG_L t2, 8(t1)
CSR_STUB
addi t1, t1, 16
.endr
/*
* Clear L1 cache & BTB & BHT ...
*/
li t1, 0x70013
csrw 0x7c2, t1
fence rw,rw
j _start_warm

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@@ -26,7 +26,3 @@ libsbiutils-objs-$(CONFIG_FDT_RESET_SUNXI_WDT) += reset/fdt_reset_sunxi_wdt.o
carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_SYSCON) += fdt_syscon_poweroff
carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_SYSCON) += fdt_syscon_reboot
libsbiutils-objs-$(CONFIG_FDT_RESET_SYSCON) += reset/fdt_reset_syscon.o
carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_THEAD) += fdt_reset_thead
libsbiutils-objs-$(CONFIG_FDT_RESET_THEAD) += reset/fdt_reset_thead.o
libsbiutils-objs-$(CONFIG_FDT_RESET_THEAD) += reset/fdt_reset_thead_asm.o