forked from Mirrors/opensbi
		
	lib: sbi_pmu: Add hartid parameter PMU device ops
Platform specific firmware event handler may leverage the hartid to program per hart specific registers for a given counter. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org>
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					committed by
					
						
						Anup Patel
					
				
			
			
				
	
			
			
			
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							57d3aa3b0d
						
					
				
				
					commit
					c631a7da27
				
			@@ -116,6 +116,7 @@ static int pmu_event_validate(unsigned long event_idx, uint64_t edata)
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	uint32_t event_idx_code = get_cidx_code(event_idx);
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	uint32_t event_idx_code_max = -1;
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	uint32_t cache_ops_result, cache_ops_id, cache_id;
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	u32 hartid = current_hartid();
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	switch(event_idx_type) {
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	case SBI_PMU_EVENT_TYPE_HW:
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@@ -129,7 +130,8 @@ static int pmu_event_validate(unsigned long event_idx, uint64_t edata)
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		if (SBI_PMU_FW_PLATFORM == event_idx_code &&
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		    pmu_dev && pmu_dev->fw_event_validate_encoding)
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			return pmu_dev->fw_event_validate_encoding(edata);
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			return pmu_dev->fw_event_validate_encoding(hartid,
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							           edata);
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		else
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			event_idx_code_max = SBI_PMU_FW_MAX;
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		break;
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@@ -199,7 +201,8 @@ int sbi_pmu_ctr_fw_read(uint32_t cidx, uint64_t *cval)
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	if (SBI_PMU_FW_PLATFORM == event_code) {
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		if (pmu_dev && pmu_dev->fw_counter_read_value)
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			*cval = pmu_dev->fw_counter_read_value(cidx -
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			*cval = pmu_dev->fw_counter_read_value(hartid,
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							       cidx -
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							       num_hw_ctrs);
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		else
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			*cval = 0;
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@@ -391,10 +394,11 @@ static int pmu_ctr_start_fw(uint32_t cidx, uint32_t event_code,
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		    }
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		if (ival_update)
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			pmu_dev->fw_counter_write_value(cidx - num_hw_ctrs,
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			pmu_dev->fw_counter_write_value(hartid,
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							cidx - num_hw_ctrs,
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							ival);
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		return pmu_dev->fw_counter_start(cidx - num_hw_ctrs,
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		return pmu_dev->fw_counter_start(hartid, cidx - num_hw_ctrs,
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						 event_data);
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	} else {
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		if (ival_update)
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@@ -467,6 +471,7 @@ static int pmu_ctr_stop_hw(uint32_t cidx)
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static int pmu_ctr_stop_fw(uint32_t cidx, uint32_t event_code)
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{
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	u32 hartid = current_hartid();
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	int ret;
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	if ((event_code >= SBI_PMU_FW_MAX &&
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@@ -476,7 +481,7 @@ static int pmu_ctr_stop_fw(uint32_t cidx, uint32_t event_code)
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	if (SBI_PMU_FW_PLATFORM == event_code &&
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	    pmu_dev && pmu_dev->fw_counter_stop) {
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		ret = pmu_dev->fw_counter_stop(cidx - num_hw_ctrs);
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		ret = pmu_dev->fw_counter_stop(hartid, cidx - num_hw_ctrs);
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		if (ret)
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			return ret;
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	}
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@@ -697,8 +702,9 @@ static int pmu_ctr_find_fw(unsigned long cbase, unsigned long cmask,
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			continue;
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		if (SBI_PMU_FW_PLATFORM == event_code &&
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		    pmu_dev && pmu_dev->fw_counter_match_encoding) {
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			if (!pmu_dev->fw_counter_match_encoding(cidx - num_hw_ctrs,
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								edata))
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			if (!pmu_dev->fw_counter_match_encoding(hartid,
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							    cidx - num_hw_ctrs,
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							    edata))
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				continue;
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		}
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@@ -764,9 +770,8 @@ skip_match:
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		if (flags & SBI_PMU_CFG_FLAG_AUTO_START) {
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			if (SBI_PMU_FW_PLATFORM == event_code &&
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			    pmu_dev && pmu_dev->fw_counter_start) {
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				ret = pmu_dev->fw_counter_start(ctr_idx -
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								num_hw_ctrs,
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								event_data);
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				ret = pmu_dev->fw_counter_start(hartid,
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					ctr_idx - num_hw_ctrs, event_data);
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				if (ret)
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					return ret;
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			}
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