forked from Mirrors/opensbi
lib: Add misaligned load/store trap handling
We generally don't get misaligned load/store traps from Linux/U-Boot compiled using GCC 8.2 or higher but this is not true with older GCC toolchains. To tackle this we add misaligned load/store trap handling adopted from BBL sources but much more simpler. (Note: BBL sources can be found at https://github.com/riscv/riscv-pk.git) Signed-off-by: Anup Patel <anup.patel@wdc.com>
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@@ -12,9 +12,10 @@
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#include <sbi/sbi_console.h>
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#include <sbi/sbi_ecall.h>
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#include <sbi/sbi_error.h>
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#include <sbi/sbi_illegal_insn.h>
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#include <sbi/sbi_hart.h>
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#include <sbi/sbi_illegal_insn.h>
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#include <sbi/sbi_ipi.h>
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#include <sbi/sbi_misaligned_ldst.h>
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#include <sbi/sbi_timer.h>
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#include <sbi/sbi_trap.h>
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@@ -95,6 +96,14 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
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rc = sbi_illegal_insn_handler(hartid, mcause, regs, scratch);
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msg = "illegal instruction handler failed";
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break;
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case CAUSE_MISALIGNED_LOAD:
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rc = sbi_misaligned_load_handler(hartid, mcause, regs, scratch);
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msg = "misaligned load handler failed";
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break;
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case CAUSE_MISALIGNED_STORE:
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rc = sbi_misaligned_store_handler(hartid, mcause, regs, scratch);
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msg = "misaligned store handler failed";
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break;
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case CAUSE_SUPERVISOR_ECALL:
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case CAUSE_HYPERVISOR_ECALL:
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rc = sbi_ecall_handler(hartid, mcause, regs, scratch);
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