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lib: sbi: Enable Control Transfer Records (CTR) Ext using xstateen.

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The Control Transfer Records (CTR) extension provides a method to
record a limited branch history in register-accessible internal chip
storage.

This extension is similar to Arch LBR in x86 and BRBE in ARM.
The Extension has been stable and the latest release can be found here
https://github.com/riscv/riscv-control-transfer-records/release

Signed-off-by: Rajnesh Kanwal <rkanwal@rivosinc.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20250307124451.122828-1-rkanwal@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Rajnesh Kanwal
2025-03-07 12:44:41 +00:00
committed by Anup Patel
parent afa0e3091b
commit aa40c53ce4
3 changed files with 24 additions and 0 deletions
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4
include/sbi/sbi_hart.h
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@@ -75,6 +75,10 @@ enum sbi_hart_extensions {
SBI_HART_EXT_ZICFISS,
/** Hart has Ssdbltrp extension */
SBI_HART_EXT_SSDBLTRP,
/** HART has CTR M-mode CSRs */
SBI_HART_EXT_SMCTR,
/** HART has CTR S-mode CSRs */
SBI_HART_EXT_SSCTR,
/** Maximum index of Hart extension */
SBI_HART_EXT_MAX,