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platform: thead/c910: Don't set plic/clint address in warm boot

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Since all harts share the same plic/clint address now, setting
them during cold boot is just fine.

Signed-off-by: Liu Yibin <yibin_liu@c-sky.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
This commit is contained in:
Liu Yibin
2020-01-13 11:20:57 +08:00
committed by Anup Patel
parent 7daccaeebd
commit a73d45ccac
1 changed files with 4 additions and 4 deletions
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8
platform/thead/c910/platform.c
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@@ -34,6 +34,10 @@ static int c910_early_init(bool cold_boot)
c910_regs.mccr2 = csr_read(CSR_MCCR2); c910_regs.mccr2 = csr_read(CSR_MCCR2);
c910_regs.mhint = csr_read(CSR_MHINT); c910_regs.mhint = csr_read(CSR_MHINT);
c910_regs.mxstatus = csr_read(CSR_MXSTATUS); c910_regs.mxstatus = csr_read(CSR_MXSTATUS);
c910_regs.plic_base_addr = csr_read(CSR_PLIC_BASE);
c910_regs.clint_base_addr =
c910_regs.plic_base_addr + C910_PLIC_CLINT_OFFSET;
} else { } else {
/* Store to other core */ /* Store to other core */
csr_write(CSR_PMPADDR0, c910_regs.pmpaddr0); csr_write(CSR_PMPADDR0, c910_regs.pmpaddr0);
@@ -52,10 +56,6 @@ static int c910_early_init(bool cold_boot)
csr_write(CSR_MXSTATUS, c910_regs.mxstatus); csr_write(CSR_MXSTATUS, c910_regs.mxstatus);
} }
c910_regs.plic_base_addr = csr_read(CSR_PLIC_BASE);
c910_regs.clint_base_addr =
c910_regs.plic_base_addr + C910_PLIC_CLINT_OFFSET;
return 0; return 0;
} }