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lib: utils/serial: Add PXA UARTs support

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The PXA variant of the uart8250 adds the UART Unit Enable bit (UUE) that
needs to be set to enable the XScale PXA UART. And it is required for
some RISC-V SoCs like the Spacemit K1 that implement the PXA UART.

This introduces the "intel,xscale-uart" compatible to handle setting the
UUE bit.

Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20250327-pxa-uart-support-v2-1-c4400c1fcd0b@pigmoral.tech
Signed-off-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Junhui Liu
2025-03-27 14:48:18 +08:00
committed by Anup Patel
parent 3ac49712e3
commit 8fe835303c
6 changed files with 24 additions and 8 deletions
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4
platform/fpga/ariane/platform.c
View File

@@ -23,6 +23,7 @@
#define ARIANE_UART_REG_SHIFT 2
#define ARIANE_UART_REG_WIDTH 4
#define ARIANE_UART_REG_OFFSET 0
#define ARIANE_UART_CAPS 0
#define ARIANE_PLIC_ADDR 0xc000000
#define ARIANE_PLIC_SIZE (0x200000 + \
(ARIANE_HART_COUNT * 0x1000))
@@ -78,7 +79,8 @@ static int ariane_early_init(bool cold_boot)
ARIANE_UART_BAUDRATE,
ARIANE_UART_REG_SHIFT,
ARIANE_UART_REG_WIDTH,
ARIANE_UART_REG_OFFSET);
ARIANE_UART_REG_OFFSET,
ARIANE_UART_CAPS);
}
/*

4
platform/fpga/openpiton/platform.c
View File

@@ -22,6 +22,7 @@
#define OPENPITON_DEFAULT_UART_REG_SHIFT 0
#define OPENPITON_DEFAULT_UART_REG_WIDTH 1
#define OPENPITON_DEFAULT_UART_REG_OFFSET 0
#define OPENPITON_DEFAULT_UART_CAPS 0
#define OPENPITON_DEFAULT_PLIC_ADDR 0xfff1100000
#define OPENPITON_DEFAULT_PLIC_SIZE (0x200000 + \
(OPENPITON_DEFAULT_HART_COUNT * 0x1000))
@@ -111,7 +112,8 @@ static int openpiton_early_init(bool cold_boot)
return uart8250_init(uart.addr, uart.freq, uart.baud,
OPENPITON_DEFAULT_UART_REG_SHIFT,
OPENPITON_DEFAULT_UART_REG_WIDTH,
OPENPITON_DEFAULT_UART_REG_OFFSET);
OPENPITON_DEFAULT_UART_REG_OFFSET,
OPENPITON_DEFAULT_UART_CAPS);
}
/*

2
platform/template/platform.c
View File

@@ -75,7 +75,7 @@ static int platform_early_init(bool cold_boot)
/* Example if the generic UART8250 driver is used */
return uart8250_init(PLATFORM_UART_ADDR, PLATFORM_UART_INPUT_FREQ,
PLATFORM_UART_BAUDRATE, 0, 1, 0);
PLATFORM_UART_BAUDRATE, 0, 1, 0, 0);
}
/*