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lib: utils/serial: Add PXA UARTs support

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The PXA variant of the uart8250 adds the UART Unit Enable bit (UUE) that
needs to be set to enable the XScale PXA UART. And it is required for
some RISC-V SoCs like the Spacemit K1 that implement the PXA UART.

This introduces the "intel,xscale-uart" compatible to handle setting the
UUE bit.

Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20250327-pxa-uart-support-v2-1-c4400c1fcd0b@pigmoral.tech
Signed-off-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Junhui Liu
2025-03-27 14:48:18 +08:00
committed by Anup Patel
parent 3ac49712e3
commit 8fe835303c
6 changed files with 24 additions and 8 deletions
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7
lib/utils/serial/fdt_serial_uart8250.c
View File

@@ -14,8 +14,9 @@
static int serial_uart8250_init(const void *fdt, int nodeoff,
const struct fdt_match *match)
{
int rc;
struct platform_uart_data uart = { 0 };
ulong caps = (ulong)match->data;
int rc;
rc = fdt_parse_uart_node(fdt, nodeoff, &uart);
if (rc)
@@ -23,13 +24,15 @@ static int serial_uart8250_init(const void *fdt, int nodeoff,
return uart8250_init(uart.addr, uart.freq, uart.baud,
uart.reg_shift, uart.reg_io_width,
uart.reg_offset);
uart.reg_offset, caps);
}
static const struct fdt_match serial_uart8250_match[] = {
{ .compatible = "ns16550" },
{ .compatible = "ns16550a" },
{ .compatible = "snps,dw-apb-uart" },
{ .compatible = "intel,xscale-uart",
.data = (void *)UART_CAP_UUE },
{ },
};

11
lib/utils/serial/uart8250.c
View File

@@ -39,6 +39,12 @@
#define UART_LSR_DR 0x01 /* Receiver data ready */
#define UART_LSR_BRK_ERROR_BITS 0x1E /* BI, FE, PE, OE bits */
/* The XScale PXA UARTs define these bits */
#define UART_IER_DMAE 0x80 /* DMA Requests Enable */
#define UART_IER_UUE 0x40 /* UART Unit Enable */
#define UART_IER_NRZE 0x20 /* NRZ coding Enable */
#define UART_IER_RTOIE 0x10 /* Receiver Time Out Interrupt Enable */
/* clang-format on */
static volatile char *uart8250_base;
@@ -93,7 +99,7 @@ static struct sbi_console_device uart8250_console = {
};
int uart8250_init(unsigned long base, u32 in_freq, u32 baudrate, u32 reg_shift,
u32 reg_width, u32 reg_offset)
u32 reg_width, u32 reg_offset, u32 caps)
{
u16 bdiv = 0;
@@ -109,7 +115,8 @@ int uart8250_init(unsigned long base, u32 in_freq, u32 baudrate, u32 reg_shift,
}
/* Disable all interrupts */
set_reg(UART_IER_OFFSET, 0x00);
set_reg(UART_IER_OFFSET, (caps & UART_CAP_UUE) ?
UART_IER_UUE : 0x00);
/* Enable DLAB */
set_reg(UART_LCR_OFFSET, 0x80);