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include: Make sbi_current_hartid() as macro in riscv_asm.h

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The sbi_current_hartid() being a regular function is quite
expensive because for callers it is a function call instead
of a direct CSR read. This patch converts sbi_current_hartid()
into a macro in riscv_asm.h.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This commit is contained in:
Anup Patel
2020-03-12 10:21:25 +05:30
committed by Anup Patel
parent 16e7071f6d
commit 823345ecae
20 changed files with 49 additions and 52 deletions
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4
platform/andes/ae350/platform.c
View File

@@ -8,9 +8,9 @@
* Nylon Chen <nylon7@andestech.com>
*/
#include <sbi/riscv_asm.h>
#include <sbi/riscv_encoding.h>
#include <sbi/sbi_const.h>
#include <sbi/sbi_hart.h>
#include <sbi/sbi_platform.h>
#include <sbi/sbi_console.h>
#include <sbi_utils/serial/uart8250.h>
@@ -94,7 +94,7 @@ static int ae350_console_init(void)
/* Initialize the platform interrupt controller for current HART. */
static int ae350_irqchip_init(bool cold_boot)
{
u32 hartid = sbi_current_hartid();
u32 hartid = current_hartid();
int ret;
if (cold_boot) {

12
platform/andes/ae350/plicsw.c
View File

@@ -8,9 +8,9 @@
* Nylon Chen <nylon7@andestech.com>
*/
#include <sbi/sbi_types.h>
#include <sbi/sbi_hart.h>
#include <sbi/riscv_asm.h>
#include <sbi/riscv_io.h>
#include <sbi/sbi_types.h>
#include "plicsw.h"
#include "platform.h"
@@ -19,7 +19,7 @@ static struct plicsw plicsw_dev[AE350_HART_COUNT];
static inline void plicsw_claim(void)
{
u32 source_hart = sbi_current_hartid();
u32 source_hart = current_hartid();
plicsw_dev[source_hart].source_id =
readl(plicsw_dev[source_hart].plicsw_claim);
@@ -27,7 +27,7 @@ static inline void plicsw_claim(void)
static inline void plicsw_complete(void)
{
u32 source_hart = sbi_current_hartid();
u32 source_hart = current_hartid();
u32 source = plicsw_dev[source_hart].source_id;
writel(source, plicsw_dev[source_hart].plicsw_claim);
@@ -61,7 +61,7 @@ static inline void plic_sw_pending(u32 target_hart)
* The bit 5 is used to send IPI to hart 2
* The bit 4 is used to send IPI to hart 3
*/
u32 source_hart = sbi_current_hartid();
u32 source_hart = current_hartid();
u32 target_offset = (PLICSW_PENDING_PER_HART - 1) - target_hart;
u32 per_hart_offset = PLICSW_PENDING_PER_HART * source_hart;
u32 val = 1 << target_offset << per_hart_offset;
@@ -90,7 +90,7 @@ void plicsw_ipi_clear(u32 target_hart)
int plicsw_warm_ipi_init(void)
{
u32 hartid = sbi_current_hartid();
u32 hartid = current_hartid();
if (!plicsw_dev[hartid].plicsw_pending
&& !plicsw_dev[hartid].plicsw_enable

8
platform/andes/ae350/plmt.c
View File

@@ -8,8 +8,8 @@
* Nylon Chen <nylon7@andestech.com>
*/
#include <sbi/riscv_asm.h>
#include <sbi/riscv_io.h>
#include <sbi/sbi_hart.h>
static u32 plmt_time_hart_count;
static volatile void *plmt_time_base;
@@ -34,7 +34,7 @@ u64 plmt_timer_value(void)
void plmt_timer_event_stop(void)
{
u32 target_hart = sbi_current_hartid();
u32 target_hart = current_hartid();
if (plmt_time_hart_count <= target_hart)
return;
@@ -50,7 +50,7 @@ void plmt_timer_event_stop(void)
void plmt_timer_event_start(u64 next_event)
{
u32 target_hart = sbi_current_hartid();
u32 target_hart = current_hartid();
if (plmt_time_hart_count <= target_hart)
return;
@@ -70,7 +70,7 @@ void plmt_timer_event_start(u64 next_event)
int plmt_warm_timer_init(void)
{
u32 target_hart = sbi_current_hartid();
u32 target_hart = current_hartid();
if (plmt_time_hart_count <= target_hart || !plmt_time_base)
return -1;