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lib: utils/irqchip: Automatically delegate T-HEAD PLIC access

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The T-HEAD PLIC implementation requires setting a delegation bit
to allow access from S-mode. Now that the T-HEAD PLIC has its own
compatible string, set this bit automatically from the PLIC driver,
instead of reaching into the PLIC's MMIO space from another driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
This commit is contained in:
Samuel Holland
2021-10-18 00:33:50 -05:00
committed by Anup Patel
parent 422eda499c
commit 78c2b19218
3 changed files with 18 additions and 17 deletions
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15
lib/utils/irqchip/fdt_irqchip_plic.c
View File

@@ -9,6 +9,7 @@
#include <libfdt.h>
#include <sbi/riscv_asm.h>
#include <sbi/riscv_io.h>
#include <sbi/sbi_error.h>
#include <sbi/sbi_hartmask.h>
#include <sbi_utils/fdt/fdt_helper.h>
@@ -91,6 +92,11 @@ static int irqchip_plic_cold_init(void *fdt, int nodeoff,
if (rc)
return rc;
if (match->data) {
void (*plic_plat_init)(struct plic_data *) = match->data;
plic_plat_init(pd);
}
rc = plic_cold_irqchip_init(pd);
if (rc)
return rc;
@@ -106,9 +112,18 @@ static int irqchip_plic_cold_init(void *fdt, int nodeoff,
return irqchip_plic_update_hartid_table(fdt, nodeoff, pd);
}
#define THEAD_PLIC_CTRL_REG 0x1ffffc
static void thead_plic_plat_init(struct plic_data *pd)
{
writel_relaxed(BIT(0), (void *)pd->addr + THEAD_PLIC_CTRL_REG);
}
static const struct fdt_match irqchip_plic_match[] = {
{ .compatible = "riscv,plic0" },
{ .compatible = "sifive,plic-1.0.0" },
{ .compatible = "thead,c900-plic",
.data = thead_plic_plat_init },
{ },
};

8
lib/utils/reset/fdt_reset_thead.c
View File

@@ -82,14 +82,6 @@ static int thead_reset_init(void *fdt, int nodeoff,
clone_csrs(cnt);
}
/* Delegate plic enable regs for S-mode */
val = fdt_getprop(fdt, nodeoff, "plic-delegate", &len);
if (len > 0 && val) {
p = (void *)(ulong)fdt64_to_cpu(*val);
writel(BIT(0), p);
}
/* Old reset method for secondary harts */
if (fdt_getprop(fdt, nodeoff, "using-csr-reset", &len)) {
csr_write(0x7c7, (ulong)&__thead_pre_start_warm);