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platform: andes/ae350: Implement hart hotplug using HSM extension

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Add hart_start() and hart_stop() callbacks for the multi-core ae350
platform, it utilizes the ATCSMU to put the harts into power-gated
deep sleep mode. The programming sequence is stated as below:

1. Set the wakeup events to PCSm_WE
2. Set the sleep command to PCSm_CTL
3. Set the reset vector to HARTm_RESET_VECTOR_{LO|HI}
4. Write back and invalidate D-cache by executing the CCTL command L1D_WBINVAL_ALL
5. Disable I/D-cache by clearing mcache_ctl.{I|D}C_EN
6. Disable D-cache coherency by clearing mcache_ctl_.DC_COHEN
7. Wait for mcache_ctl.DC_COHSTA to be cleared to ensure the previous step is completed
8. Execute WFI

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Yu Chien Peter Lin
2023-01-20 11:05:11 +08:00
committed by Anup Patel
parent 9c4eb3521e
commit 787296ae92
4 changed files with 180 additions and 1 deletions
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10
platform/generic/include/andes/andes45.h Normal file
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#ifndef _RISCV_ANDES45_H
#define _RISCV_ANDES45_H
#define CSR_MARCHID_MICROID 0xfff
/* Memory and Miscellaneous Registers */
#define CSR_MCACHE_CTL 0x7ca
#define CSR_MCCTLCOMMAND 0x7cc
#endif /* _RISCV_ANDES45_H */