forked from Mirrors/opensbi
include: Add defines for [m|h|s]envcfg CSRs
The latest RISC-V privileged specification introduces xenvcfg CSRs to enable/disable certain features/extensions for lower privilege modes. This patch adds defines for these new [m|h|s]envcfg CSRs. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Xiang W <wxjstz@126.com>
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@@ -203,6 +203,22 @@
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#define MHPMEVENT_SSCOF_MASK _ULL(0xFFFF000000000000)
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#define MHPMEVENT_SSCOF_MASK _ULL(0xFFFF000000000000)
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#if __riscv_xlen > 32
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#define ENVCFG_STCE (_ULL(1) << 63)
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#define ENVCFG_PBMTE (_ULL(1) << 62)
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#else
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#define ENVCFGH_STCE (_UL(1) << 31)
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#define ENVCFGH_PBMTE (_UL(1) << 30)
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#endif
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#define ENVCFG_CBZE (_UL(1) << 7)
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#define ENVCFG_CBCFE (_UL(1) << 6)
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#define ENVCFG_CBIE_SHIFT 4
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#define ENVCFG_CBIE (_UL(0x3) << ENVCFG_CBIE_SHIFT)
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#define ENVCFG_CBIE_ILL _UL(0x0)
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#define ENVCFG_CBIE_FLUSH _UL(0x1)
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#define ENVCFG_CBIE_INV _UL(0x3)
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#define ENVCFG_FIOM _UL(0x1)
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/* ===== User-level CSRs ===== */
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/* ===== User-level CSRs ===== */
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/* User Trap Setup (N-extension) */
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/* User Trap Setup (N-extension) */
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@@ -298,6 +314,9 @@
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#define CSR_STVEC 0x105
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#define CSR_STVEC 0x105
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#define CSR_SCOUNTEREN 0x106
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#define CSR_SCOUNTEREN 0x106
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/* Supervisor Configuration */
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#define CSR_SENVCFG 0x10a
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/* Supervisor Trap Handling */
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/* Supervisor Trap Handling */
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#define CSR_SSCRATCH 0x140
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#define CSR_SSCRATCH 0x140
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#define CSR_SEPC 0x141
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#define CSR_SEPC 0x141
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@@ -336,6 +355,10 @@
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#define CSR_HCOUNTEREN 0x606
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#define CSR_HCOUNTEREN 0x606
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#define CSR_HGEIE 0x607
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#define CSR_HGEIE 0x607
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/* Hypervisor Configuration */
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#define CSR_HENVCFG 0x60a
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#define CSR_HENVCFGH 0x61a
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/* Hypervisor Trap Handling (H-extension) */
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/* Hypervisor Trap Handling (H-extension) */
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#define CSR_HTVAL 0x643
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#define CSR_HTVAL 0x643
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#define CSR_HIP 0x644
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#define CSR_HIP 0x644
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@@ -408,6 +431,10 @@
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#define CSR_MCOUNTEREN 0x306
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#define CSR_MCOUNTEREN 0x306
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#define CSR_MSTATUSH 0x310
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#define CSR_MSTATUSH 0x310
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/* Machine Configuration */
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#define CSR_MENVCFG 0x30a
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#define CSR_MENVCFGH 0x31a
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/* Machine Trap Handling */
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/* Machine Trap Handling */
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#define CSR_MSCRATCH 0x340
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#define CSR_MSCRATCH 0x340
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#define CSR_MEPC 0x341
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#define CSR_MEPC 0x341
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