lib: utils/irqchip: plic: Provide a hartindex to context map

This removes platform-specific arguments to plic_warm_irqchip_init(),
which makes the driver independent from the platform after cold init,
and allows for further refactoring.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Samuel Holland
2024-11-04 20:10:04 -08:00
committed by Anup Patel
parent c26e3fd2ed
commit 69448a0790
8 changed files with 62 additions and 65 deletions

View File

@@ -17,6 +17,7 @@ struct plic_data {
unsigned long size;
unsigned long num_src;
unsigned long flags;
s16 context_map[][2];
};
/** Work around a bug on Ariane that requires enabling interrupts at boot */
@@ -24,6 +25,12 @@ struct plic_data {
/** PLIC must be delegated to S-mode like T-HEAD C906 and C910 */
#define PLIC_FLAG_THEAD_DELEGATION BIT(1)
#define PLIC_M_CONTEXT 0
#define PLIC_S_CONTEXT 1
#define PLIC_DATA_SIZE(__hart_count) (sizeof(struct plic_data) + \
(__hart_count) * 2 * sizeof(s16))
/* So far, priorities on all consumers of these functions fit in 8 bits. */
void plic_priority_save(const struct plic_data *plic, u8 *priority, u32 num);
@@ -32,14 +39,13 @@ void plic_priority_restore(const struct plic_data *plic, const u8 *priority,
void plic_delegate(const struct plic_data *plic);
void plic_context_save(const struct plic_data *plic, int context_id,
void plic_context_save(const struct plic_data *plic, bool smode,
u32 *enable, u32 *threshold, u32 num);
void plic_context_restore(const struct plic_data *plic, int context_id,
void plic_context_restore(const struct plic_data *plic, bool smode,
const u32 *enable, u32 threshold, u32 num);
int plic_warm_irqchip_init(const struct plic_data *plic,
int m_cntx_id, int s_cntx_id);
int plic_warm_irqchip_init(const struct plic_data *plic);
int plic_cold_irqchip_init(const struct plic_data *plic);