forked from Mirrors/opensbi
lib: sbi: Fix coding style issues
This fixes various coding style issues found in the SBI codes. No functional changes. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
This commit is contained in:
@@ -207,7 +207,7 @@ int pmp_set(unsigned int n, unsigned long prot, unsigned long addr,
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if (n >= PMP_COUNT || log2len > __riscv_xlen || log2len < PMP_SHIFT)
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return SBI_EINVAL;
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/* calculate PMP register and offset */
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/* calculate PMP register and offset */
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#if __riscv_xlen == 32
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pmpcfg_csr = CSR_PMPCFG0 + (n >> 2);
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pmpcfg_shift = (n & 3) << 3;
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@@ -49,7 +49,7 @@ long atomic_sub_return(atomic_t *atom, long value)
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return ret - value;
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}
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#define __axchg(ptr, new, size) \
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#define __axchg(ptr, new, size) \
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({ \
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__typeof__(ptr) __ptr = (ptr); \
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__typeof__(new) __new = (new); \
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@@ -70,12 +70,12 @@ long atomic_sub_return(atomic_t *atom, long value)
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: "memory"); \
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break; \
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default: \
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break; \
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break; \
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} \
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__ret; \
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})
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#define axchg(ptr, x) \
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#define axchg(ptr, x) \
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({ \
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__typeof__(*(ptr)) _x_ = (x); \
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(__typeof__(*(ptr))) __axchg((ptr), _x_, sizeof(*(ptr))); \
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@@ -90,20 +90,20 @@ long atomic_sub_return(atomic_t *atom, long value)
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register unsigned int __rc; \
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switch (size) { \
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case 4: \
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__asm__ __volatile__("0: lr.w %0, %2\n" \
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" sc.w.rl %1, %z3, %2\n" \
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" bnez %1, 0b\n" \
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" fence rw, rw\n" \
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__asm__ __volatile__("0: lr.w %0, %2\n" \
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" sc.w.rl %1, %z3, %2\n" \
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" bnez %1, 0b\n" \
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" fence rw, rw\n" \
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: "=&r"(__ret), "=&r"(__rc), \
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"+A"(*__ptr) \
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: "rJ"(__new) \
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: "memory"); \
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break; \
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case 8: \
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__asm__ __volatile__("0: lr.d %0, %2\n" \
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" sc.d.rl %1, %z3, %2\n" \
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" bnez %1, 0b\n" \
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" fence rw, rw\n" \
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__asm__ __volatile__("0: lr.d %0, %2\n" \
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" sc.d.rl %1, %z3, %2\n" \
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" bnez %1, 0b\n" \
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" fence rw, rw\n" \
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: "=&r"(__ret), "=&r"(__rc), \
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"+A"(*__ptr) \
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: "rJ"(__new) \
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@@ -130,11 +130,11 @@ long atomic_sub_return(atomic_t *atom, long value)
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register unsigned int __rc; \
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switch (size) { \
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case 4: \
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__asm__ __volatile__("0: lr.w %0, %2\n" \
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" bne %0, %z3, 1f\n" \
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" sc.w.rl %1, %z4, %2\n" \
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" bnez %1, 0b\n" \
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" fence rw, rw\n" \
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__asm__ __volatile__("0: lr.w %0, %2\n" \
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" bne %0, %z3, 1f\n" \
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" sc.w.rl %1, %z4, %2\n" \
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" bnez %1, 0b\n" \
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" fence rw, rw\n" \
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"1:\n" \
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: "=&r"(__ret), "=&r"(__rc), \
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"+A"(*__ptr) \
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@@ -142,11 +142,11 @@ long atomic_sub_return(atomic_t *atom, long value)
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: "memory"); \
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break; \
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case 8: \
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__asm__ __volatile__("0: lr.d %0, %2\n" \
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" bne %0, %z3, 1f\n" \
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" sc.d.rl %1, %z4, %2\n" \
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" bnez %1, 0b\n" \
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" fence rw, rw\n" \
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__asm__ __volatile__("0: lr.d %0, %2\n" \
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" bne %0, %z3, 1f\n" \
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" sc.d.rl %1, %z4, %2\n" \
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" bnez %1, 0b\n" \
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" fence rw, rw\n" \
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"1:\n" \
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: "=&r"(__ret), "=&r"(__rc), \
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"+A"(*__ptr) \
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@@ -20,7 +20,7 @@
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* Returns the bit number of the first set bit.
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*/
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unsigned long find_first_bit(const unsigned long *addr,
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unsigned long size)
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unsigned long size)
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{
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const unsigned long *p = addr;
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unsigned long result = 0;
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@@ -50,7 +50,7 @@ found:
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* Returns the bit number of the first cleared bit.
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*/
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unsigned long find_first_zero_bit(const unsigned long *addr,
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unsigned long size)
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unsigned long size)
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{
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const unsigned long *p = addr;
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unsigned long result = 0;
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@@ -80,7 +80,7 @@ found:
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* Returns the bit number of the first set bit, or size.
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*/
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unsigned long find_last_bit(const unsigned long *addr,
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unsigned long size)
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unsigned long size)
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{
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unsigned long words;
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unsigned long tmp;
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@@ -115,7 +115,7 @@ found:
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* @size: The bitmap size in bits
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*/
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unsigned long find_next_bit(const unsigned long *addr,
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unsigned long size, unsigned long offset)
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unsigned long size, unsigned long offset)
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{
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const unsigned long *p = addr + BITOP_WORD(offset);
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unsigned long result = offset & ~(BITS_PER_LONG-1);
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@@ -160,8 +160,8 @@ found_middle:
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* @size: The bitmap size in bits
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*/
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unsigned long find_next_zero_bit(const unsigned long *addr,
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unsigned long size,
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unsigned long offset)
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unsigned long size,
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unsigned long offset)
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{
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const unsigned long *p = addr + BITOP_WORD(offset);
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unsigned long result = offset & ~(BITS_PER_LONG-1);
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@@ -105,7 +105,8 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
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trap.epc = regs->mepc;
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sbi_trap_redirect(regs, &trap, scratch);
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} else {
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/* This function should return non-zero value only in case of
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/*
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* This function should return non-zero value only in case of
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* fatal error. However, there is no good way to distinguish
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* between a fatal and non-fatal errors yet. That's why we treat
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* every return value except ETRAP as non-fatal and just return
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@@ -75,7 +75,7 @@ static int delegate_traps(struct sbi_scratch *scratch, u32 hartid)
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unsigned long interrupts, exceptions;
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if (!misa_extension('S'))
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/* No delegation possible as mideleg does not exist*/
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/* No delegation possible as mideleg does not exist */
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return 0;
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/* Send M-mode interrupts and most exceptions to S-mode */
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@@ -342,7 +342,7 @@ sbi_hart_switch_mode(unsigned long arg0, unsigned long arg1,
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__builtin_unreachable();
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}
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static spinlock_t avail_hart_mask_lock = SPIN_LOCK_INITIALIZER;
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static spinlock_t avail_hart_mask_lock = SPIN_LOCK_INITIALIZER;
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static volatile unsigned long avail_hart_mask = 0;
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void sbi_hart_mark_available(u32 hartid)
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@@ -81,7 +81,7 @@ void sbi_hsm_prepare_next_jump(struct sbi_scratch *scratch, u32 hartid)
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{
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u32 oldstate;
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struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
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hart_data_offset);
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hart_data_offset);
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oldstate = arch_atomic_cmpxchg(&hdata->state, SBI_HART_STARTING,
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SBI_HART_STARTED);
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@@ -94,7 +94,7 @@ static void sbi_hsm_hart_wait(struct sbi_scratch *scratch, u32 hartid)
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unsigned long saved_mie;
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
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hart_data_offset);
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hart_data_offset);
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/* Save MIE CSR */
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saved_mie = csr_read(CSR_MIE);
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@@ -122,7 +122,7 @@ int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
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if (cold_boot) {
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hart_data_offset = sbi_scratch_alloc_offset(sizeof(*hdata),
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"HART_DATA");
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"HART_DATA");
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if (!hart_data_offset)
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return SBI_ENOMEM;
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hart_count = sbi_platform_hart_count(plat);
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@@ -147,7 +147,7 @@ void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch)
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u32 hstate;
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
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hart_data_offset);
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hart_data_offset);
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void (*jump_warmboot)(void) = (void (*)(void))scratch->warmboot_addr;
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hstate = arch_atomic_cmpxchg(&hdata->state, SBI_HART_STOPPING,
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@@ -183,7 +183,7 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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struct sbi_scratch *rscratch = sbi_hart_id_to_scratch(scratch, hartid);
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struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(rscratch,
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hart_data_offset);
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hart_data_offset);
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if (sbi_platform_hart_disabled(plat, hartid))
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return SBI_EINVAL;
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@@ -225,14 +225,14 @@ int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow)
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u32 hartid = sbi_current_hartid();
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
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hart_data_offset);
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hart_data_offset);
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if (sbi_platform_hart_disabled(plat, hartid) ||
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!sbi_hsm_hart_started(scratch, hartid))
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return SBI_EINVAL;
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oldstate = arch_atomic_cmpxchg(&hdata->state, SBI_HART_STARTED,
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SBI_HART_STOPPING);
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SBI_HART_STOPPING);
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if (oldstate != SBI_HART_STARTED) {
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sbi_printf("%s: ERR: The hart is in invalid state [%u]\n",
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__func__, oldstate);
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@@ -392,11 +392,11 @@ int sbi_tlb_init(struct sbi_scratch *scratch, bool cold_boot)
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if (cold_boot) {
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tlb_sync_off = sbi_scratch_alloc_offset(sizeof(*tlb_sync),
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"IPI_TLB_SYNC");
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"IPI_TLB_SYNC");
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if (!tlb_sync_off)
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return SBI_ENOMEM;
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tlb_fifo_off = sbi_scratch_alloc_offset(sizeof(*tlb_q),
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"IPI_TLB_FIFO");
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"IPI_TLB_FIFO");
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if (!tlb_fifo_off) {
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sbi_scratch_free_offset(tlb_sync_off);
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return SBI_ENOMEM;
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@@ -178,7 +178,7 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
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regs->mstatus &= ~MSTATUS_MPP;
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regs->mstatus |= (PRV_S << MSTATUS_MPP_SHIFT);
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/* Set SPP for S-mode*/
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/* Set SPP for S-mode */
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regs->mstatus &= ~MSTATUS_SPP;
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if (prev_mode == PRV_S)
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regs->mstatus |= (1UL << MSTATUS_SPP_SHIFT);
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