Firmware/opensbi
8
0
Fork 0
forked from Mirrors/opensbi
Code Pull Requests Activity

lib: Remove scratch parameter from unpriv load/store functions

Browse Source 
The scratch parameter of unpriv load/store functions is now redundant
hence we remove it.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This commit is contained in:
Anup Patel
2020-03-19 17:37:54 +05:30
committed by Anup Patel
parent 1de66d170e
commit 626467cfd9
5 changed files with 17 additions and 26 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
lib/sbi/sbi_ecall_legacy.c
View File

@@ -22,14 +22,13 @@
#include <sbi/sbi_unpriv.h>
#include <sbi/sbi_hart.h>
static int sbi_load_hart_mask_unpriv(struct sbi_scratch *scratch,
ulong *pmask, ulong *hmask,
static int sbi_load_hart_mask_unpriv(ulong *pmask, ulong *hmask,
struct sbi_trap_info *uptrap)
{
ulong mask = 0;
if (pmask) {
mask = sbi_load_ulong(pmask, scratch, uptrap);
mask = sbi_load_ulong(pmask, uptrap);
if (uptrap->cause)
return SBI_ETRAP;
} else {
@@ -69,13 +68,13 @@ static int sbi_ecall_legacy_handler(struct sbi_scratch *scratch,
sbi_ipi_clear_smode(scratch);
break;
case SBI_EXT_0_1_SEND_IPI:
ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
ret = sbi_load_hart_mask_unpriv((ulong *)args[0],
&hmask, out_trap);
if (ret != SBI_ETRAP)
ret = sbi_ipi_send_smode(scratch, hmask, 0);
break;
case SBI_EXT_0_1_REMOTE_FENCE_I:
ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
ret = sbi_load_hart_mask_unpriv((ulong *)args[0],
&hmask, out_trap);
if (ret != SBI_ETRAP) {
SBI_TLB_INFO_INIT(&tlb_info, 0, 0, 0,
@@ -84,7 +83,7 @@ static int sbi_ecall_legacy_handler(struct sbi_scratch *scratch,
}
break;
case SBI_EXT_0_1_REMOTE_SFENCE_VMA:
ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
ret = sbi_load_hart_mask_unpriv((ulong *)args[0],
&hmask, out_trap);
if (ret != SBI_ETRAP) {
SBI_TLB_INFO_INIT(&tlb_info, args[1], args[2], 0,
@@ -93,7 +92,7 @@ static int sbi_ecall_legacy_handler(struct sbi_scratch *scratch,
}
break;
case SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID:
ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
ret = sbi_load_hart_mask_unpriv((ulong *)args[0],
&hmask, out_trap);
if (ret != SBI_ETRAP) {
SBI_TLB_INFO_INIT(&tlb_info, args[1], args[2], args[3],

2
lib/sbi/sbi_illegal_insn.c
View File

@@ -141,7 +141,7 @@ int sbi_illegal_insn_handler(u32 hartid, ulong mcause, ulong insn,
if (unlikely((insn & 3) != 3)) {
if (insn == 0) {
insn = sbi_get_insn(regs->mepc, scratch, &uptrap);
insn = sbi_get_insn(regs->mepc, &uptrap);
if (uptrap.cause) {
uptrap.epc = regs->mepc;
return sbi_trap_redirect(regs, &uptrap,

8
lib/sbi/sbi_misaligned_ldst.c
View File

@@ -42,7 +42,7 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
* Bit[0] == 0 implies trapped instruction value is
* zero or special value.
*/
insn = sbi_get_insn(regs->mepc, scratch, &uptrap);
insn = sbi_get_insn(regs->mepc, &uptrap);
if (uptrap.cause) {
uptrap.epc = regs->mepc;
return sbi_trap_redirect(regs, &uptrap, scratch);
@@ -120,7 +120,7 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
val.data_u64 = 0;
for (i = 0; i < len; i++) {
val.data_bytes[i] = sbi_load_u8((void *)(addr + i),
scratch, &uptrap);
&uptrap);
if (uptrap.cause) {
uptrap.epc = regs->mepc;
return sbi_trap_redirect(regs, &uptrap, scratch);
@@ -162,7 +162,7 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
* Bit[0] == 0 implies trapped instruction value is
* zero or special value.
*/
insn = sbi_get_insn(regs->mepc, scratch, &uptrap);
insn = sbi_get_insn(regs->mepc, &uptrap);
if (uptrap.cause) {
uptrap.epc = regs->mepc;
return sbi_trap_redirect(regs, &uptrap, scratch);
@@ -230,7 +230,7 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
for (i = 0; i < len; i++) {
sbi_store_u8((void *)(addr + i), val.data_bytes[i],
scratch, &uptrap);
&uptrap);
if (uptrap.cause) {
uptrap.epc = regs->mepc;
return sbi_trap_redirect(regs, &uptrap, scratch);

15
lib/sbi/sbi_unpriv.c
View File

@@ -16,7 +16,6 @@
#define DEFINE_UNPRIVILEGED_LOAD_FUNCTION(type, insn) \
type sbi_load_##type(const type *addr, \
struct sbi_scratch *scratch, \
struct sbi_trap_info *trap) \
{ \
register ulong tinfo asm("a3"); \
@@ -47,7 +46,6 @@
#define DEFINE_UNPRIVILEGED_STORE_FUNCTION(type, insn) \
void sbi_store_##type(type *addr, type val, \
struct sbi_scratch *scratch, \
struct sbi_trap_info *trap) \
{ \
register ulong tinfo asm("a3"); \
@@ -91,14 +89,13 @@ DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u32, lw)
DEFINE_UNPRIVILEGED_LOAD_FUNCTION(ulong, lw)
u64 sbi_load_u64(const u64 *addr,
struct sbi_scratch *scratch,
struct sbi_trap_info *trap)
{
u64 ret = sbi_load_u32((u32 *)addr, scratch, trap);
u64 ret = sbi_load_u32((u32 *)addr, trap);
if (trap->cause)
return 0;
ret |= ((u64)sbi_load_u32((u32 *)addr + 1, scratch, trap) << 32);
ret |= ((u64)sbi_load_u32((u32 *)addr + 1, trap) << 32);
if (trap->cause)
return 0;
@@ -106,21 +103,19 @@ u64 sbi_load_u64(const u64 *addr,
}
void sbi_store_u64(u64 *addr, u64 val,
struct sbi_scratch *scratch,
struct sbi_trap_info *trap)
{
sbi_store_u32((u32 *)addr, val, scratch, trap);
sbi_store_u32((u32 *)addr, val, trap);
if (trap->cause)
return;
sbi_store_u32((u32 *)addr + 1, val >> 32, scratch, trap);
sbi_store_u32((u32 *)addr + 1, val >> 32, trap);
if (trap->cause)
return;
}
#endif
ulong sbi_get_insn(ulong mepc, struct sbi_scratch *scratch,
struct sbi_trap_info *trap)
ulong sbi_get_insn(ulong mepc, struct sbi_trap_info *trap)
{
register ulong tinfo asm("a3");
register ulong ttmp asm("a4");