forked from Mirrors/opensbi
firmware: Don't depend on PLAT_HART_COUNT and PLAT_HART_STACK_SIZE
The hart_count and hart_stack_size information is already available in "struct sbi_platform" so we use that instead of depending on PLAT_HART_COUNT and PLAT_HART_STACK_SIZE. Signed-off-by: Anup Patel <anup.patel@wdc.com>
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@@ -132,8 +132,9 @@ _start_warm:
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* s8 -> HART Stack Size
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* s8 -> HART Stack Size
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*/
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*/
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csrr s6, mhartid
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csrr s6, mhartid
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li s7, PLAT_HART_COUNT
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la a4, platform
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li s8, PLAT_HART_STACK_SIZE
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lwu s7, RISCV_PLATFORM_HART_COUNT_OFFSET(a4)
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lwu s8, RISCV_PLATFORM_HART_STACK_SIZE_OFFSET(a4)
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/* HART ID should be within expected limit */
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/* HART ID should be within expected limit */
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csrr s6, mhartid
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csrr s6, mhartid
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@@ -202,8 +203,9 @@ _hartid_to_scratch:
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* s1 -> HART Stack End
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* s1 -> HART Stack End
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* s2 -> Temporary
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* s2 -> Temporary
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*/
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*/
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li s0, PLAT_HART_STACK_SIZE
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la s2, platform
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li s2, PLAT_HART_COUNT
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lwu s0, RISCV_PLATFORM_HART_STACK_SIZE_OFFSET(s2)
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lwu s2, RISCV_PLATFORM_HART_COUNT_OFFSET(s2)
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mul s2, s2, s0
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mul s2, s2, s0
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la s1, _fw_end
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la s1, _fw_end
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add s1, s1, s2
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add s1, s1, s2
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@@ -81,6 +81,11 @@
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#define RISCV_SCRATCH_IPI_TYPE_OFFSET (9 * __SIZEOF_POINTER__)
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#define RISCV_SCRATCH_IPI_TYPE_OFFSET (9 * __SIZEOF_POINTER__)
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#define RISCV_SCRATCH_SIZE 256
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#define RISCV_SCRATCH_SIZE 256
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#define RISCV_PLATFORM_NAME_OFFSET (0x0)
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#define RISCV_PLATFORM_FEATURES_OFFSET (0x40)
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#define RISCV_PLATFORM_HART_COUNT_OFFSET (0x48)
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#define RISCV_PLATFORM_HART_STACK_SIZE_OFFSET (0x4c)
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#define RISCV_TRAP_REGS_zero 0
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#define RISCV_TRAP_REGS_zero 0
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#define RISCV_TRAP_REGS_ra 1
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#define RISCV_TRAP_REGS_ra 1
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#define RISCV_TRAP_REGS_sp 2
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#define RISCV_TRAP_REGS_sp 2
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