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lib: sbi: Enable Zicbo[m|z] extensions in the menvcfg CSR

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The bits to configure/enable Zicbo[m|z] extensions in the menvcfg
CSR are WARL. We try to enable these bits irrespective whether
these extensions are available or not because writes to these
bits will be ignored if these extensions are not available.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
This commit is contained in:
Anup Patel
2022-03-29 19:42:22 +05:30
committed by Anup Patel
parent 31fecad46d
commit 47d676570d
1 changed files with 32 additions and 1 deletions
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33
lib/sbi/sbi_hart.c
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@@ -39,7 +39,7 @@ static unsigned long hart_features_offset;
static void mstatus_init(struct sbi_scratch *scratch) static void mstatus_init(struct sbi_scratch *scratch)
{ {
unsigned long mstatus_val = 0; unsigned long menvcfg_val, mstatus_val = 0;
int cidx; int cidx;
unsigned int num_mhpm = sbi_hart_mhpm_count(scratch); unsigned int num_mhpm = sbi_hart_mhpm_count(scratch);
uint64_t mhpmevent_init_val = 0; uint64_t mhpmevent_init_val = 0;
@@ -86,6 +86,37 @@ static void mstatus_init(struct sbi_scratch *scratch)
csr_write_num(CSR_MHPMEVENT3 + cidx, mhpmevent_init_val); csr_write_num(CSR_MHPMEVENT3 + cidx, mhpmevent_init_val);
#endif #endif
} }
if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MENVCFG)) {
menvcfg_val = csr_read(CSR_MENVCFG);
/*
* Set menvcfg.CBZE == 1
*
* If Zicboz extension is not available then writes to
* menvcfg.CBZE will be ignored because it is a WARL field.
*/
menvcfg_val |= ENVCFG_CBZE;
/*
* Set menvcfg.CBCFE == 1
*
* If Zicbom extension is not available then writes to
* menvcfg.CBCFE will be ignored because it is a WARL field.
*/
menvcfg_val |= ENVCFG_CBCFE;
/*
* Set menvcfg.CBIE == 3
*
* If Zicbom extension is not available then writes to
* menvcfg.CBIE will be ignored because it is a WARL field.
*/
menvcfg_val |= ENVCFG_CBIE_INV << ENVCFG_CBIE_SHIFT;
csr_write(CSR_MENVCFG, menvcfg_val);
}
/* Disable all interrupts */ /* Disable all interrupts */
csr_write(CSR_MIE, 0); csr_write(CSR_MIE, 0);