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lib: utils: Allow PLIC functions to be used for multiple PLICs

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We extend all PLIC functions to have a "struct plic_data *"
parameter pointing to PLIC details. This allows platforms to
use these functions for multiple PLIC instances.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This commit is contained in:
Anup Patel
2020-05-12 12:57:52 +05:30
committed by Anup Patel
parent 73d6ef3b29
commit 446a9c6d1e
12 changed files with 127 additions and 82 deletions
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10
platform/andes/ae350/platform.c
View File

@@ -20,6 +20,11 @@
#include "plicsw.h"
#include "plmt.h"
static struct plic_data plic = {
.addr = AE350_PLIC_ADDR,
.num_src = AE350_PLIC_NUM_SOURCES,
};
/* Platform final initialization. */
static int ae350_final_init(bool cold_boot)
{
@@ -70,13 +75,12 @@ static int ae350_irqchip_init(bool cold_boot)
int ret;
if (cold_boot) {
ret = plic_cold_irqchip_init(AE350_PLIC_ADDR,
AE350_PLIC_NUM_SOURCES);
ret = plic_cold_irqchip_init(&plic);
if (ret)
return ret;
}
return plic_warm_irqchip_init(2 * hartid, 2 * hartid + 1);
return plic_warm_irqchip_init(&plic, 2 * hartid, 2 * hartid + 1);
}
/* Initialize IPI for current HART. */

16
platform/fpga/ariane/platform.c
View File

@@ -26,6 +26,11 @@
#define ARIANE_HART_COUNT 1
#define ARIANE_CLINT_ADDR 0x2000000
static struct plic_data plic = {
.addr = ARIANE_PLIC_ADDR,
.num_src = ARIANE_PLIC_NUM_SOURCES,
};
/*
* Ariane platform early initialization.
*/
@@ -70,19 +75,19 @@ static int plic_ariane_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
/* By default, enable all IRQs for M-mode of target HART */
if (m_cntx_id > -1) {
for (i = 0; i < ie_words; i++)
plic_set_ie(m_cntx_id, i, 1);
plic_set_ie(&plic, m_cntx_id, i, 1);
}
/* Enable all IRQs for S-mode of target HART */
if (s_cntx_id > -1) {
for (i = 0; i < ie_words; i++)
plic_set_ie(s_cntx_id, i, 1);
plic_set_ie(&plic, s_cntx_id, i, 1);
}
/* By default, enable M-mode threshold */
if (m_cntx_id > -1)
plic_set_thresh(m_cntx_id, 1);
plic_set_thresh(&plic, m_cntx_id, 1);
/* By default, disable S-mode threshold */
if (s_cntx_id > -1)
plic_set_thresh(s_cntx_id, 0);
plic_set_thresh(&plic, s_cntx_id, 0);
return 0;
}
@@ -96,8 +101,7 @@ static int ariane_irqchip_init(bool cold_boot)
int ret;
if (cold_boot) {
ret = plic_cold_irqchip_init(ARIANE_PLIC_NUM_SOURCES,
ARIANE_HART_COUNT);
ret = plic_cold_irqchip_init(&plic);
if (ret)
return ret;
}

29
platform/fpga/openpiton/platform.c
View File

@@ -27,14 +27,14 @@
#define OPENPITON_DEFAULT_CLINT_ADDR 0xfff1020000
static struct platform_uart_data uart = {
OPENPITON_DEFAULT_UART_ADDR,
OPENPITON_DEFAULT_UART_FREQ,
OPENPITON_DEFAULT_UART_BAUDRATE,
};
static struct platform_plic_data plic = {
OPENPITON_DEFAULT_PLIC_ADDR,
OPENPITON_DEFAULT_PLIC_NUM_SOURCES,
};
OPENPITON_DEFAULT_UART_ADDR,
OPENPITON_DEFAULT_UART_FREQ,
OPENPITON_DEFAULT_UART_BAUDRATE,
};
static struct plic_data plic = {
.addr = OPENPITON_DEFAULT_PLIC_ADDR,
.num_src = OPENPITON_DEFAULT_PLIC_NUM_SOURCES,
};
static unsigned long clint_addr = OPENPITON_DEFAULT_CLINT_ADDR;
/*
@@ -44,7 +44,7 @@ static int openpiton_early_init(bool cold_boot)
{
void *fdt;
struct platform_uart_data uart_data;
struct platform_plic_data plic_data;
struct plic_data plic_data;
unsigned long clint_data;
int rc;
@@ -102,19 +102,19 @@ static int plic_openpiton_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
/* By default, enable all IRQs for M-mode of target HART */
if (m_cntx_id > -1) {
for (i = 0; i < ie_words; i++)
plic_set_ie(m_cntx_id, i, 1);
plic_set_ie(&plic, m_cntx_id, i, 1);
}
/* Enable all IRQs for S-mode of target HART */
if (s_cntx_id > -1) {
for (i = 0; i < ie_words; i++)
plic_set_ie(s_cntx_id, i, 1);
plic_set_ie(&plic, s_cntx_id, i, 1);
}
/* By default, enable M-mode threshold */
if (m_cntx_id > -1)
plic_set_thresh(m_cntx_id, 1);
plic_set_thresh(&plic, m_cntx_id, 1);
/* By default, disable S-mode threshold */
if (s_cntx_id > -1)
plic_set_thresh(s_cntx_id, 0);
plic_set_thresh(&plic, s_cntx_id, 0);
return 0;
}
@@ -128,8 +128,7 @@ static int openpiton_irqchip_init(bool cold_boot)
int ret;
if (cold_boot) {
ret = plic_cold_irqchip_init(plic.addr,
plic.num_src);
ret = plic_cold_irqchip_init(&plic);
if (ret)
return ret;
}

10
platform/kendryte/k210/platform.c
View File

@@ -17,6 +17,11 @@
#include <sbi_utils/sys/clint.h>
#include "platform.h"
static struct plic_data plic = {
.addr = K210_PLIC_BASE_ADDR,
.num_src = K210_PLIC_NUM_SOURCES,
};
static u32 k210_get_clk_freq(void)
{
u32 clksel0, pll0;
@@ -58,13 +63,12 @@ static int k210_irqchip_init(bool cold_boot)
u32 hartid = current_hartid();
if (cold_boot) {
rc = plic_cold_irqchip_init(K210_PLIC_BASE_ADDR,
K210_PLIC_NUM_SOURCES);
rc = plic_cold_irqchip_init(&plic);
if (rc)
return rc;
}
return plic_warm_irqchip_init(hartid * 2, hartid * 2 + 1);
return plic_warm_irqchip_init(&plic, hartid * 2, hartid * 2 + 1);
}
static int k210_ipi_init(bool cold_boot)

10
platform/nuclei/ux600/platform.c
View File

@@ -43,6 +43,11 @@
/* clang-format on */
static struct plic_data plic = {
.addr = UX600_PLIC_ADDR,
.num_src = UX600_PLIC_NUM_SOURCES,
};
static void ux600_modify_dt(void *fdt)
{
fdt_fixups(fdt);
@@ -73,13 +78,12 @@ static int ux600_irqchip_init(bool cold_boot)
u32 hartid = current_hartid();
if (cold_boot) {
rc = plic_cold_irqchip_init(UX600_PLIC_ADDR,
UX600_PLIC_NUM_SOURCES);
rc = plic_cold_irqchip_init(&plic);
if (rc)
return rc;
}
return plic_warm_irqchip_init((hartid) ? (2 * hartid - 1) : 0,
return plic_warm_irqchip_init(&plic, (hartid) ? (2 * hartid - 1) : 0,
(hartid) ? (2 * hartid) : -1);
}

10
platform/sifive/fu540/platform.c
View File

@@ -46,6 +46,11 @@
/* clang-format on */
static struct plic_data plic = {
.addr = FU540_PLIC_ADDR,
.num_src = FU540_PLIC_NUM_SOURCES,
};
static void fu540_modify_dt(void *fdt)
{
fdt_cpu_fixup(fdt);
@@ -88,13 +93,12 @@ static int fu540_irqchip_init(bool cold_boot)
u32 hartid = current_hartid();
if (cold_boot) {
rc = plic_cold_irqchip_init(FU540_PLIC_ADDR,
FU540_PLIC_NUM_SOURCES);
rc = plic_cold_irqchip_init(&plic);
if (rc)
return rc;
}
return plic_warm_irqchip_init((hartid) ? (2 * hartid - 1) : 0,
return plic_warm_irqchip_init(&plic, (hartid) ? (2 * hartid - 1) : 0,
(hartid) ? (2 * hartid) : -1);
}

20
platform/template/platform.c
View File

@@ -17,6 +17,19 @@
#include <sbi_utils/serial/uart8250.h>
#include <sbi_utils/sys/clint.h>
#define PLATFORM_PLIC_ADDR 0xc000000
#define PLATFORM_PLIC_NUM_SOURCES 128
#define PLATFORM_HART_COUNT 4
#define PLATFORM_CLINT_ADDR 0x2000000
#define PLATFORM_UART_ADDR 0x09000000
#define PLATFORM_UART_INPUT_FREQ 10000000
#define PLATFORM_UART_BAUDRATE 115200
static struct plic_data plic = {
.addr = PLATFORM_PLIC_ADDR,
.num_src = PLATFORM_PLIC_NUM_SOURCES,
};
/*
* Platform early initialization.
*/
@@ -39,7 +52,7 @@ static int platform_final_init(bool cold_boot)
static int platform_console_init(void)
{
/* Example if the generic UART8250 driver is used */
return uart8250_init(PLATFORM_UART_ADDR, PLATFORM_UART_SHIFTREG_ADDR,
return uart8250_init(PLATFORM_UART_ADDR, PLATFORM_UART_INPUT_FREQ,
PLATFORM_UART_BAUDRATE, 0, 1);
}
@@ -70,13 +83,12 @@ static int platform_irqchip_init(bool cold_boot)
/* Example if the generic PLIC driver is used */
if (cold_boot) {
ret = plic_cold_irqchip_init(PLATFORM_PLIC_ADDR,
PLATFORM_PLIC_NUM_SOURCES);
ret = plic_cold_irqchip_init(&plic);
if (ret)
return ret;
}
return plic_warm_irqchip_init(2 * hartid, 2 * hartid + 1);
return plic_warm_irqchip_init(&plic, 2 * hartid, 2 * hartid + 1);
}
/*