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lib: sbi_hart: properly reset Ssstateen

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sstateen* and hstateen* CSRs must be zeroed by M-mode if the mstateen*
registers are missing, to avoid security issues.

Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
Link: https://lore.kernel.org/r/20250429142549.3673976-10-rkrcmar@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Radim Krčmář
2025-04-29 16:25:50 +02:00
committed by Anup Patel
parent 937118ca65
commit 316daaf1c2
1 changed files with 12 additions and 3 deletions
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15
lib/sbi/sbi_hart.c
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@@ -114,12 +114,21 @@ static void mstatus_init(struct sbi_scratch *scratch)
csr_write64(CSR_MSTATEEN1, SMSTATEEN_STATEN); csr_write64(CSR_MSTATEEN1, SMSTATEEN_STATEN);
csr_write64(CSR_MSTATEEN2, SMSTATEEN_STATEN); csr_write64(CSR_MSTATEEN2, SMSTATEEN_STATEN);
csr_write64(CSR_MSTATEEN3, SMSTATEEN_STATEN); csr_write64(CSR_MSTATEEN3, SMSTATEEN_STATEN);
}
if (misa_extension('S')) if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSSTATEEN)) {
if (misa_extension('S')) {
csr_write(CSR_SSTATEEN0, 0); csr_write(CSR_SSTATEEN0, 0);
csr_write(CSR_SSTATEEN1, 0);
if (misa_extension('H')) csr_write(CSR_SSTATEEN2, 0);
csr_write(CSR_SSTATEEN3, 0);
}
if (misa_extension('H')) {
csr_write64(CSR_HSTATEEN0, (uint64_t)0); csr_write64(CSR_HSTATEEN0, (uint64_t)0);
csr_write64(CSR_HSTATEEN1, (uint64_t)0);
csr_write64(CSR_HSTATEEN2, (uint64_t)0);
csr_write64(CSR_HSTATEEN3, (uint64_t)0);
}
} }
if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_12) { if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_12) {