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lib: Extend trap redirection for hypervisor v0.5 spec

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The hypervisor v0.5 spec introduces two new CSRs for both M-mode
and HS-mode which need to be considered when redirecting traps
hence this patch.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
This commit is contained in:
Anup Patel
2019-12-12 22:23:30 +05:30
committed by Anup Patel
parent 086dbdfc92
commit 2be424bd28
7 changed files with 49 additions and 29 deletions
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3
include/sbi/riscv_encoding.h
View File

@@ -37,12 +37,10 @@
#define MSTATUS_SXL _ULL(0x0000000C00000000)
#define MSTATUS_SBE _ULL(0x0000001000000000)
#define MSTATUS_MBE _ULL(0x0000002000000000)
#define MSTATUS_MTL _ULL(0x0000004000000000)
#define MSTATUS_MPV _ULL(0x0000008000000000)
#else
#define MSTATUSH_SBE _UL(0x00000010)
#define MSTATUSH_MBE _UL(0x00000020)
#define MSTATUSH_MTL _UL(0x00000040)
#define MSTATUSH_MPV _UL(0x00000080)
#endif
#define MSTATUS32_SD _UL(0x80000000)
@@ -66,7 +64,6 @@
#define HSTATUS_SP2V _UL(0x00000200)
#define HSTATUS_SP2P _UL(0x00000100)
#define HSTATUS_SPV _UL(0x00000080)
#define HSTATUS_STL _UL(0x00000040)
#define HSTATUS_SPRV _UL(0x00000001)
#define IRQ_S_SOFT 1

2
include/sbi/sbi_illegal_insn.h
View File

@@ -15,7 +15,7 @@
struct sbi_trap_regs;
struct sbi_scratch;
int sbi_illegal_insn_handler(u32 hartid, ulong mcause,
int sbi_illegal_insn_handler(u32 hartid, ulong mcause, ulong insn,
struct sbi_trap_regs *regs,
struct sbi_scratch *scratch);

2
include/sbi/sbi_misaligned_ldst.h
View File

@@ -16,10 +16,12 @@ struct sbi_trap_regs;
struct sbi_scratch;
int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
ulong addr, ulong tval2, ulong tinst,
struct sbi_trap_regs *regs,
struct sbi_scratch *scratch);
int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
ulong addr, ulong tval2, ulong tinst,
struct sbi_trap_regs *regs,
struct sbi_scratch *scratch);