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platform: andes: Change all occurrences of andes45 to andes

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To make the framework suit all Andes CPUs, change all occurrences of
andes45 to andes.

In addition, we fix some coding style problems and remove an unused
macro in andes.h.

Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Ben Zong-You Xie
2024-04-19 11:58:24 +08:00
committed by Anup Patel
parent f68b3aed9d
commit 2b93ce0954
11 changed files with 86 additions and 84 deletions
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12
platform/generic/andes/andes_sbi.c
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@@ -3,7 +3,7 @@
* Copyright (C) 2023 Renesas Electronics Corp.
*
*/
#include <andes/andes45.h>
#include <andes/andes.h>
#include <andes/andes_sbi.h>
#include <sbi/riscv_asm.h>
#include <sbi/sbi_error.h>
@@ -13,7 +13,7 @@ enum sbi_ext_andes_fid {
SBI_EXT_ANDES_IOCP_SW_WORKAROUND,
};
static bool andes45_cache_controllable(void)
static bool andes_cache_controllable(void)
{
return (((csr_read(CSR_MICM_CFG) & MICM_CFG_ISZ_MASK) ||
(csr_read(CSR_MDCM_CFG) & MDCM_CFG_DSZ_MASK)) &&
@@ -22,14 +22,14 @@ static bool andes45_cache_controllable(void)
misa_extension('U'));
}
static bool andes45_iocp_disabled(void)
static bool andes_iocp_disabled(void)
{
return (csr_read(CSR_MMSC_CFG) & MMSC_IOCP_MASK) ? false : true;
}
static bool andes45_apply_iocp_sw_workaround(void)
static bool andes_apply_iocp_sw_workaround(void)
{
return andes45_cache_controllable() & andes45_iocp_disabled();
return andes_cache_controllable() & andes_iocp_disabled();
}
int andes_sbi_vendor_ext_provider(long funcid,
@@ -39,7 +39,7 @@ int andes_sbi_vendor_ext_provider(long funcid,
{
switch (funcid) {
case SBI_EXT_ANDES_IOCP_SW_WORKAROUND:
out->value = andes45_apply_iocp_sw_workaround();
out->value = andes_apply_iocp_sw_workaround();
break;
default: