forked from Mirrors/opensbi
firmware: Use lla to access all global symbols
When OpenSBI is compiled as fPIE mode, the assembler will translate "la" to GOT reference pattern. It will cause to cost an additional load instruction when obtaining the symbol address. However, if the symbol locates within the positive or negative 2GB region, we can use "lla" instead of "la" to avoid unneeded GOT references. This patch assumes that the OpenSBI image excluding the payload does not exceed 2GB. Based on this assumption, all "la" instructions are replaced by "lla" to avoid performance degradation when compiling as fPIE mode. Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
This commit is contained in:
@@ -57,39 +57,39 @@ _start:
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bne a0, a6, _wait_relocate_copy_done
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bne a0, a6, _wait_relocate_copy_done
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_try_lottery:
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_try_lottery:
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/* Jump to relocation wait loop if we don't get relocation lottery */
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/* Jump to relocation wait loop if we don't get relocation lottery */
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la a6, _relocate_lottery
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lla a6, _relocate_lottery
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li a7, 1
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li a7, 1
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amoadd.w a6, a7, (a6)
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amoadd.w a6, a7, (a6)
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bnez a6, _wait_relocate_copy_done
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bnez a6, _wait_relocate_copy_done
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/* Save load address */
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/* Save load address */
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la t0, _load_start
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lla t0, _load_start
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la t1, _start
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lla t1, _start
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REG_S t1, 0(t0)
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REG_S t1, 0(t0)
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/* Relocate if load address != link address */
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/* Relocate if load address != link address */
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_relocate:
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_relocate:
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la t0, _link_start
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lla t0, _link_start
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REG_L t0, 0(t0)
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REG_L t0, 0(t0)
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la t1, _link_end
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lla t1, _link_end
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REG_L t1, 0(t1)
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REG_L t1, 0(t1)
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la t2, _load_start
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lla t2, _load_start
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REG_L t2, 0(t2)
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REG_L t2, 0(t2)
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sub t3, t1, t0
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sub t3, t1, t0
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add t3, t3, t2
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add t3, t3, t2
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beq t0, t2, _relocate_done
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beq t0, t2, _relocate_done
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la t4, _relocate_done
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lla t4, _relocate_done
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sub t4, t4, t2
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sub t4, t4, t2
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add t4, t4, t0
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add t4, t4, t0
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blt t2, t0, _relocate_copy_to_upper
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blt t2, t0, _relocate_copy_to_upper
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_relocate_copy_to_lower:
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_relocate_copy_to_lower:
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ble t1, t2, _relocate_copy_to_lower_loop
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ble t1, t2, _relocate_copy_to_lower_loop
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la t3, _relocate_lottery
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lla t3, _relocate_lottery
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BRANGE t2, t1, t3, _start_hang
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BRANGE t2, t1, t3, _start_hang
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la t3, _boot_status
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lla t3, _boot_status
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BRANGE t2, t1, t3, _start_hang
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BRANGE t2, t1, t3, _start_hang
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la t3, _relocate
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lla t3, _relocate
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la t5, _relocate_done
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lla t5, _relocate_done
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BRANGE t2, t1, t3, _start_hang
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BRANGE t2, t1, t3, _start_hang
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BRANGE t2, t1, t5, _start_hang
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BRANGE t2, t1, t5, _start_hang
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BRANGE t3, t5, t2, _start_hang
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BRANGE t3, t5, t2, _start_hang
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@@ -102,12 +102,12 @@ _relocate_copy_to_lower_loop:
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jr t4
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jr t4
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_relocate_copy_to_upper:
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_relocate_copy_to_upper:
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ble t3, t0, _relocate_copy_to_upper_loop
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ble t3, t0, _relocate_copy_to_upper_loop
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la t2, _relocate_lottery
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lla t2, _relocate_lottery
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BRANGE t0, t3, t2, _start_hang
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BRANGE t0, t3, t2, _start_hang
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la t2, _boot_status
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lla t2, _boot_status
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BRANGE t0, t3, t2, _start_hang
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BRANGE t0, t3, t2, _start_hang
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la t2, _relocate
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lla t2, _relocate
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la t5, _relocate_done
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lla t5, _relocate_done
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BRANGE t0, t3, t2, _start_hang
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BRANGE t0, t3, t2, _start_hang
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BRANGE t0, t3, t5, _start_hang
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BRANGE t0, t3, t5, _start_hang
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BRANGE t2, t5, t0, _start_hang
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BRANGE t2, t5, t0, _start_hang
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@@ -119,12 +119,12 @@ _relocate_copy_to_upper_loop:
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blt t0, t1, _relocate_copy_to_upper_loop
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blt t0, t1, _relocate_copy_to_upper_loop
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jr t4
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jr t4
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_wait_relocate_copy_done:
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_wait_relocate_copy_done:
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la t0, _start
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lla t0, _start
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la t1, _link_start
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lla t1, _link_start
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REG_L t1, 0(t1)
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REG_L t1, 0(t1)
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beq t0, t1, _wait_for_boot_hart
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beq t0, t1, _wait_for_boot_hart
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la t2, _boot_status
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lla t2, _boot_status
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la t3, _wait_for_boot_hart
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lla t3, _wait_for_boot_hart
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sub t3, t3, t0
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sub t3, t3, t0
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add t3, t3, t1
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add t3, t3, t1
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1:
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1:
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@@ -143,10 +143,10 @@ _relocate_done:
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* Mark relocate copy done
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* Mark relocate copy done
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* Use _boot_status copy relative to the load address
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* Use _boot_status copy relative to the load address
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*/
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*/
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la t0, _boot_status
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lla t0, _boot_status
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la t1, _link_start
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lla t1, _link_start
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REG_L t1, 0(t1)
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REG_L t1, 0(t1)
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la t2, _load_start
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lla t2, _load_start
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REG_L t2, 0(t2)
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REG_L t2, 0(t2)
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sub t0, t0, t1
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sub t0, t0, t1
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add t0, t0, t2
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add t0, t0, t2
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@@ -161,19 +161,19 @@ _relocate_done:
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call _reset_regs
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call _reset_regs
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/* Zero-out BSS */
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/* Zero-out BSS */
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la s4, _bss_start
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lla s4, _bss_start
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la s5, _bss_end
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lla s5, _bss_end
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_bss_zero:
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_bss_zero:
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REG_S zero, (s4)
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REG_S zero, (s4)
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add s4, s4, __SIZEOF_POINTER__
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add s4, s4, __SIZEOF_POINTER__
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blt s4, s5, _bss_zero
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blt s4, s5, _bss_zero
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/* Setup temporary trap handler */
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/* Setup temporary trap handler */
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la s4, _start_hang
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lla s4, _start_hang
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csrw CSR_MTVEC, s4
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csrw CSR_MTVEC, s4
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/* Setup temporary stack */
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/* Setup temporary stack */
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la s4, _fw_end
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lla s4, _fw_end
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li s5, (SBI_SCRATCH_SIZE * 2)
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li s5, (SBI_SCRATCH_SIZE * 2)
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add sp, s4, s5
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add sp, s4, s5
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@@ -184,7 +184,7 @@ _bss_zero:
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#ifdef FW_FDT_PATH
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#ifdef FW_FDT_PATH
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/* Override previous arg1 */
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/* Override previous arg1 */
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la a1, fw_fdt_bin
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lla a1, fw_fdt_bin
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#endif
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#endif
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/*
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/*
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@@ -202,7 +202,7 @@ _bss_zero:
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* s7 -> HART Count
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* s7 -> HART Count
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* s8 -> HART Stack Size
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* s8 -> HART Stack Size
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*/
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*/
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la a4, platform
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lla a4, platform
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#if __riscv_xlen == 64
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#if __riscv_xlen == 64
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lwu s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
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lwu s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
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lwu s8, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(a4)
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lwu s8, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(a4)
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@@ -212,7 +212,7 @@ _bss_zero:
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#endif
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#endif
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/* Setup scratch space for all the HARTs*/
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/* Setup scratch space for all the HARTs*/
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la tp, _fw_end
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lla tp, _fw_end
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mul a5, s7, s8
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mul a5, s7, s8
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add tp, tp, a5
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add tp, tp, a5
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/* Keep a copy of tp */
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/* Keep a copy of tp */
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@@ -230,8 +230,8 @@ _scratch_init:
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/* Initialize scratch space */
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/* Initialize scratch space */
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/* Store fw_start and fw_size in scratch space */
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/* Store fw_start and fw_size in scratch space */
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la a4, _fw_start
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lla a4, _fw_start
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la a5, _fw_end
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lla a5, _fw_end
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mul t0, s7, s8
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mul t0, s7, s8
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add a5, a5, t0
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add a5, a5, t0
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sub a5, a5, a4
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sub a5, a5, a4
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@@ -253,16 +253,16 @@ _scratch_init:
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REG_S a0, SBI_SCRATCH_NEXT_MODE_OFFSET(tp)
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REG_S a0, SBI_SCRATCH_NEXT_MODE_OFFSET(tp)
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MOV_3R a0, s0, a1, s1, a2, s2
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MOV_3R a0, s0, a1, s1, a2, s2
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/* Store warm_boot address in scratch space */
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/* Store warm_boot address in scratch space */
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la a4, _start_warm
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lla a4, _start_warm
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REG_S a4, SBI_SCRATCH_WARMBOOT_ADDR_OFFSET(tp)
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REG_S a4, SBI_SCRATCH_WARMBOOT_ADDR_OFFSET(tp)
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/* Store platform address in scratch space */
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/* Store platform address in scratch space */
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la a4, platform
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lla a4, platform
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REG_S a4, SBI_SCRATCH_PLATFORM_ADDR_OFFSET(tp)
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REG_S a4, SBI_SCRATCH_PLATFORM_ADDR_OFFSET(tp)
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/* Store hartid-to-scratch function address in scratch space */
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/* Store hartid-to-scratch function address in scratch space */
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la a4, _hartid_to_scratch
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lla a4, _hartid_to_scratch
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REG_S a4, SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET(tp)
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REG_S a4, SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET(tp)
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/* Store trap-exit function address in scratch space */
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/* Store trap-exit function address in scratch space */
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la a4, _trap_exit
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lla a4, _trap_exit
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REG_S a4, SBI_SCRATCH_TRAP_EXIT_OFFSET(tp)
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REG_S a4, SBI_SCRATCH_TRAP_EXIT_OFFSET(tp)
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/* Clear tmp0 in scratch space */
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/* Clear tmp0 in scratch space */
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REG_S zero, SBI_SCRATCH_TMP0_OFFSET(tp)
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REG_S zero, SBI_SCRATCH_TMP0_OFFSET(tp)
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@@ -343,7 +343,7 @@ _fdt_reloc_done:
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/* mark boot hart done */
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/* mark boot hart done */
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li t0, BOOT_STATUS_BOOT_HART_DONE
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li t0, BOOT_STATUS_BOOT_HART_DONE
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la t1, _boot_status
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lla t1, _boot_status
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REG_S t0, 0(t1)
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REG_S t0, 0(t1)
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fence rw, rw
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fence rw, rw
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j _start_warm
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j _start_warm
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@@ -351,7 +351,7 @@ _fdt_reloc_done:
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/* waiting for boot hart to be done (_boot_status == 2) */
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/* waiting for boot hart to be done (_boot_status == 2) */
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_wait_for_boot_hart:
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_wait_for_boot_hart:
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li t0, BOOT_STATUS_BOOT_HART_DONE
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li t0, BOOT_STATUS_BOOT_HART_DONE
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la t1, _boot_status
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lla t1, _boot_status
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REG_L t1, 0(t1)
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REG_L t1, 0(t1)
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/* Reduce the bus traffic so that boot hart may proceed faster */
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/* Reduce the bus traffic so that boot hart may proceed faster */
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nop
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nop
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@@ -369,7 +369,7 @@ _start_warm:
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csrw CSR_MIP, zero
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csrw CSR_MIP, zero
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/* Find HART count and HART stack size */
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/* Find HART count and HART stack size */
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la a4, platform
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lla a4, platform
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#if __riscv_xlen == 64
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#if __riscv_xlen == 64
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lwu s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
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lwu s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
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lwu s8, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(a4)
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lwu s8, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(a4)
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@@ -400,7 +400,7 @@ _start_warm:
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3: bge s6, s7, _start_hang
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3: bge s6, s7, _start_hang
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/* Find the scratch space based on HART index */
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/* Find the scratch space based on HART index */
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la tp, _fw_end
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lla tp, _fw_end
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mul a5, s7, s8
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mul a5, s7, s8
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add tp, tp, a5
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add tp, tp, a5
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mul a5, s8, s6
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mul a5, s8, s6
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@@ -415,13 +415,13 @@ _start_warm:
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add sp, tp, zero
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add sp, tp, zero
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/* Setup trap handler */
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/* Setup trap handler */
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la a4, _trap_handler
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lla a4, _trap_handler
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#if __riscv_xlen == 32
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#if __riscv_xlen == 32
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csrr a5, CSR_MISA
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csrr a5, CSR_MISA
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srli a5, a5, ('H' - 'A')
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srli a5, a5, ('H' - 'A')
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andi a5, a5, 0x1
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andi a5, a5, 0x1
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beq a5, zero, _skip_trap_handler_rv32_hyp
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beq a5, zero, _skip_trap_handler_rv32_hyp
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la a4, _trap_handler_rv32_hyp
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lla a4, _trap_handler_rv32_hyp
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_skip_trap_handler_rv32_hyp:
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_skip_trap_handler_rv32_hyp:
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#endif
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#endif
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csrw CSR_MTVEC, a4
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csrw CSR_MTVEC, a4
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@@ -432,7 +432,7 @@ _skip_trap_handler_rv32_hyp:
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srli a5, a5, ('H' - 'A')
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srli a5, a5, ('H' - 'A')
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andi a5, a5, 0x1
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andi a5, a5, 0x1
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beq a5, zero, _skip_trap_exit_rv32_hyp
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beq a5, zero, _skip_trap_exit_rv32_hyp
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la a4, _trap_exit_rv32_hyp
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lla a4, _trap_exit_rv32_hyp
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csrr a5, CSR_MSCRATCH
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csrr a5, CSR_MSCRATCH
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REG_S a4, SBI_SCRATCH_TRAP_EXIT_OFFSET(a5)
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REG_S a4, SBI_SCRATCH_TRAP_EXIT_OFFSET(a5)
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_skip_trap_exit_rv32_hyp:
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_skip_trap_exit_rv32_hyp:
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@@ -468,7 +468,7 @@ _hartid_to_scratch:
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* t1 -> HART Stack End
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* t1 -> HART Stack End
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* t2 -> Temporary
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* t2 -> Temporary
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*/
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*/
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la t2, platform
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lla t2, platform
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#if __riscv_xlen == 64
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#if __riscv_xlen == 64
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lwu t0, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(t2)
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lwu t0, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(t2)
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lwu t2, SBI_PLATFORM_HART_COUNT_OFFSET(t2)
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lwu t2, SBI_PLATFORM_HART_COUNT_OFFSET(t2)
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@@ -478,7 +478,7 @@ _hartid_to_scratch:
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#endif
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#endif
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sub t2, t2, a1
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sub t2, t2, a1
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mul t2, t2, t0
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mul t2, t2, t0
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la t1, _fw_end
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lla t1, _fw_end
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add t1, t1, t2
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add t1, t1, t2
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li t2, SBI_SCRATCH_SIZE
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li t2, SBI_SCRATCH_SIZE
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sub a0, t1, t2
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sub a0, t1, t2
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@@ -54,7 +54,7 @@ fw_boot_hart:
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*/
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*/
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fw_save_info:
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fw_save_info:
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/* Save next arg1 in 'a1' */
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/* Save next arg1 in 'a1' */
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la a4, _dynamic_next_arg1
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lla a4, _dynamic_next_arg1
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REG_S a1, (a4)
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REG_S a1, (a4)
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/* Sanity checks */
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/* Sanity checks */
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@@ -66,13 +66,13 @@ fw_save_info:
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bgt a3, a4, _bad_dynamic_info
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bgt a3, a4, _bad_dynamic_info
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/* Save version == 0x1 fields */
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/* Save version == 0x1 fields */
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la a4, _dynamic_next_addr
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lla a4, _dynamic_next_addr
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REG_L a3, FW_DYNAMIC_INFO_NEXT_ADDR_OFFSET(a2)
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REG_L a3, FW_DYNAMIC_INFO_NEXT_ADDR_OFFSET(a2)
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REG_S a3, (a4)
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REG_S a3, (a4)
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la a4, _dynamic_next_mode
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lla a4, _dynamic_next_mode
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REG_L a3, FW_DYNAMIC_INFO_NEXT_MODE_OFFSET(a2)
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REG_L a3, FW_DYNAMIC_INFO_NEXT_MODE_OFFSET(a2)
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REG_S a3, (a4)
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REG_S a3, (a4)
|
||||||
la a4, _dynamic_options
|
lla a4, _dynamic_options
|
||||||
REG_L a3, FW_DYNAMIC_INFO_OPTIONS_OFFSET(a2)
|
REG_L a3, FW_DYNAMIC_INFO_OPTIONS_OFFSET(a2)
|
||||||
REG_S a3, (a4)
|
REG_S a3, (a4)
|
||||||
|
|
||||||
@@ -80,7 +80,7 @@ fw_save_info:
|
|||||||
li a4, 0x2
|
li a4, 0x2
|
||||||
REG_L a3, FW_DYNAMIC_INFO_VERSION_OFFSET(a2)
|
REG_L a3, FW_DYNAMIC_INFO_VERSION_OFFSET(a2)
|
||||||
blt a3, a4, 2f
|
blt a3, a4, 2f
|
||||||
la a4, _dynamic_boot_hart
|
lla a4, _dynamic_boot_hart
|
||||||
REG_L a3, FW_DYNAMIC_INFO_BOOT_HART_OFFSET(a2)
|
REG_L a3, FW_DYNAMIC_INFO_BOOT_HART_OFFSET(a2)
|
||||||
REG_S a3, (a4)
|
REG_S a3, (a4)
|
||||||
2:
|
2:
|
||||||
@@ -96,7 +96,7 @@ fw_save_info:
|
|||||||
* The next arg1 should be returned in 'a0'.
|
* The next arg1 should be returned in 'a0'.
|
||||||
*/
|
*/
|
||||||
fw_next_arg1:
|
fw_next_arg1:
|
||||||
la a0, _dynamic_next_arg1
|
lla a0, _dynamic_next_arg1
|
||||||
REG_L a0, (a0)
|
REG_L a0, (a0)
|
||||||
ret
|
ret
|
||||||
|
|
||||||
@@ -108,7 +108,7 @@ fw_next_arg1:
|
|||||||
* The next address should be returned in 'a0'.
|
* The next address should be returned in 'a0'.
|
||||||
*/
|
*/
|
||||||
fw_next_addr:
|
fw_next_addr:
|
||||||
la a0, _dynamic_next_addr
|
lla a0, _dynamic_next_addr
|
||||||
REG_L a0, (a0)
|
REG_L a0, (a0)
|
||||||
ret
|
ret
|
||||||
|
|
||||||
@@ -120,7 +120,7 @@ fw_next_addr:
|
|||||||
* The next address should be returned in 'a0'
|
* The next address should be returned in 'a0'
|
||||||
*/
|
*/
|
||||||
fw_next_mode:
|
fw_next_mode:
|
||||||
la a0, _dynamic_next_mode
|
lla a0, _dynamic_next_mode
|
||||||
REG_L a0, (a0)
|
REG_L a0, (a0)
|
||||||
ret
|
ret
|
||||||
|
|
||||||
@@ -133,7 +133,7 @@ fw_next_mode:
|
|||||||
* The next address should be returned in 'a0'.
|
* The next address should be returned in 'a0'.
|
||||||
*/
|
*/
|
||||||
fw_options:
|
fw_options:
|
||||||
la a0, _dynamic_options
|
lla a0, _dynamic_options
|
||||||
REG_L a0, (a0)
|
REG_L a0, (a0)
|
||||||
ret
|
ret
|
||||||
|
|
||||||
|
@@ -59,7 +59,7 @@ fw_next_arg1:
|
|||||||
* The next address should be returned in 'a0'.
|
* The next address should be returned in 'a0'.
|
||||||
*/
|
*/
|
||||||
fw_next_addr:
|
fw_next_addr:
|
||||||
la a0, _jump_addr
|
lla a0, _jump_addr
|
||||||
REG_L a0, (a0)
|
REG_L a0, (a0)
|
||||||
ret
|
ret
|
||||||
|
|
||||||
|
@@ -59,7 +59,7 @@ fw_next_arg1:
|
|||||||
* The next address should be returned in 'a0'.
|
* The next address should be returned in 'a0'.
|
||||||
*/
|
*/
|
||||||
fw_next_addr:
|
fw_next_addr:
|
||||||
la a0, payload_bin
|
lla a0, payload_bin
|
||||||
ret
|
ret
|
||||||
|
|
||||||
.section .entry, "ax", %progbits
|
.section .entry, "ax", %progbits
|
||||||
|
@@ -28,20 +28,20 @@
|
|||||||
.globl _start
|
.globl _start
|
||||||
_start:
|
_start:
|
||||||
/* Pick one hart to run the main boot sequence */
|
/* Pick one hart to run the main boot sequence */
|
||||||
la a3, _hart_lottery
|
lla a3, _hart_lottery
|
||||||
li a2, 1
|
li a2, 1
|
||||||
amoadd.w a3, a2, (a3)
|
amoadd.w a3, a2, (a3)
|
||||||
bnez a3, _start_hang
|
bnez a3, _start_hang
|
||||||
|
|
||||||
/* Save a0 and a1 */
|
/* Save a0 and a1 */
|
||||||
la a3, _boot_a0
|
lla a3, _boot_a0
|
||||||
REG_S a0, 0(a3)
|
REG_S a0, 0(a3)
|
||||||
la a3, _boot_a1
|
lla a3, _boot_a1
|
||||||
REG_S a1, 0(a3)
|
REG_S a1, 0(a3)
|
||||||
|
|
||||||
/* Zero-out BSS */
|
/* Zero-out BSS */
|
||||||
la a4, _bss_start
|
lla a4, _bss_start
|
||||||
la a5, _bss_end
|
lla a5, _bss_end
|
||||||
_bss_zero:
|
_bss_zero:
|
||||||
REG_S zero, (a4)
|
REG_S zero, (a4)
|
||||||
add a4, a4, __SIZEOF_POINTER__
|
add a4, a4, __SIZEOF_POINTER__
|
||||||
@@ -53,18 +53,18 @@ _start_warm:
|
|||||||
csrw CSR_SIP, zero
|
csrw CSR_SIP, zero
|
||||||
|
|
||||||
/* Setup exception vectors */
|
/* Setup exception vectors */
|
||||||
la a3, _start_hang
|
lla a3, _start_hang
|
||||||
csrw CSR_STVEC, a3
|
csrw CSR_STVEC, a3
|
||||||
|
|
||||||
/* Setup stack */
|
/* Setup stack */
|
||||||
la a3, _payload_end
|
lla a3, _payload_end
|
||||||
li a4, 0x2000
|
li a4, 0x2000
|
||||||
add sp, a3, a4
|
add sp, a3, a4
|
||||||
|
|
||||||
/* Jump to C main */
|
/* Jump to C main */
|
||||||
la a3, _boot_a0
|
lla a3, _boot_a0
|
||||||
REG_L a0, 0(a3)
|
REG_L a0, 0(a3)
|
||||||
la a3, _boot_a1
|
lla a3, _boot_a1
|
||||||
REG_L a1, 0(a3)
|
REG_L a1, 0(a3)
|
||||||
call test_main
|
call test_main
|
||||||
|
|
||||||
|
Reference in New Issue
Block a user