lib: Fix full tlb flush behavior

Currently, global page mappings are not flushed if start and size
arguments are zero.

Flush entire TLB if both size and start argument is passed as zero.

Fixes : 90cb491 (lib: Implement sfence.vma correctly)

Signed-off-by: Atish Patra <atish.patra@wdc.com>
This commit is contained in:
Atish Patra
2019-03-12 13:50:37 -07:00
committed by Anup Patel
parent 896870e9b0
commit 1e24e21d56

View File

@@ -80,11 +80,9 @@ void sbi_ipi_clear_smode(struct sbi_scratch *scratch)
csr_clear(CSR_MIP, MIP_SSIP); csr_clear(CSR_MIP, MIP_SSIP);
} }
static void sbi_ipi_tlb_flush_all(unsigned long asid) static void sbi_ipi_tlb_flush_all()
{ {
__asm__ __volatile__ ("sfence.vma x0, %0" __asm__ __volatile("sfence.vma");
: : "r" (asid)
: "memory");
} }
static void sbi_ipi_sfence_vma(struct sbi_tlb_info *tinfo) static void sbi_ipi_sfence_vma(struct sbi_tlb_info *tinfo)
@@ -93,8 +91,10 @@ static void sbi_ipi_sfence_vma(struct sbi_tlb_info *tinfo)
unsigned long size = tinfo->size; unsigned long size = tinfo->size;
unsigned long i; unsigned long i;
if (start == 0 && size == 0) if ((start == 0 && size == 0) || (size == SBI_TLB_FLUSH_ALL)) {
sbi_ipi_tlb_flush_all(0); sbi_ipi_tlb_flush_all();
return;
}
for (i = 0; i < size; i += PAGE_SIZE) { for (i = 0; i < size; i += PAGE_SIZE) {
__asm__ __volatile__ ("sfence.vma %0" __asm__ __volatile__ ("sfence.vma %0"
@@ -110,11 +110,16 @@ static void sbi_ipi_sfence_vma_asid(struct sbi_tlb_info *tinfo)
unsigned long asid = tinfo->asid; unsigned long asid = tinfo->asid;
unsigned long i; unsigned long i;
if (start == 0 && size == 0) if (start == 0 && size == 0) {
sbi_ipi_tlb_flush_all(0); sbi_ipi_tlb_flush_all();
/* Flush entire MM context */ return;
}
/* Flush entire MM context for a given ASID */
if (size == SBI_TLB_FLUSH_ALL) { if (size == SBI_TLB_FLUSH_ALL) {
sbi_ipi_tlb_flush_all(asid); __asm__ __volatile__ ("sfence.vma x0, %0"
: : "r" (asid)
: "memory");
return; return;
} }