386 lines
13 KiB
C
386 lines
13 KiB
C
/*
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FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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This file is part of the FreeRTOS distribution and was contributed
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to the project by Technolution B.V. (www.technolution.nl,
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freertos-riscv@technolution.eu) under the terms of the FreeRTOS
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contributors license.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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***************************************************************************
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>>! NOTE: The modification to the GPL is included to allow you to !<<
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>>! distribute a combined work that includes FreeRTOS without being !<<
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>>! obliged to provide the source code for proprietary components !<<
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>>! outside of the FreeRTOS kernel. !<<
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***************************************************************************
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. Full license text is available on the following
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link: http://www.freertos.org/a00114.html
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***************************************************************************
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* *
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* FreeRTOS provides completely free yet professionally developed, *
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* robust, strictly quality controlled, supported, and cross *
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* platform software that is more than just the market leader, it *
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* is the industry's de facto standard. *
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* *
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* Help yourself get started quickly while simultaneously helping *
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* to support the FreeRTOS project by purchasing a FreeRTOS *
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* tutorial book, reference manual, or both: *
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* http://www.FreeRTOS.org/Documentation *
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* *
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***************************************************************************
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http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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the FAQ page "My application does not run, what could be wrong?". Have you
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defined configASSERT()?
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http://www.FreeRTOS.org/support - In return for receiving this top quality
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embedded software for free we request you assist our global community by
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participating in the support forum.
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http://www.FreeRTOS.org/training - Investing in training allows your team to
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be as productive as possible as early as possible. Now you can receive
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FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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Ltd, and the world's leading authority on the world's leading RTOS.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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compatible FAT file system, and our tiny thread aware UDP/IP stack.
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http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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licenses offer ticketed support, indemnification and commercial middleware.
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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1 tab == 4 spaces!
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the RISC-V port.
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*----------------------------------------------------------*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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#include "portmacro.h"
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#include "riscv_hal.h"
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#ifdef __riscv64
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# define STORE sd
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# define LOAD ld
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# define REGBYTES 8
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#else
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# define STORE sw
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# define LOAD lw
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# define REGBYTES 4
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#endif
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/* A variable is used to keep track of the critical section nesting. This
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variable has to be stored as part of the task context and must be initialized to
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a non zero value to ensure interrupts don't inadvertently become unmasked before
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the scheduler starts. As it is stored as part of the task context it will
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automatically be set to 0 when the first task is started. */
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static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
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/* Contains context when starting scheduler, save all 31 registers */
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#ifdef __gracefulExit
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BaseType_t xStartContext[31] = {0};
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#endif
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typedef struct
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{
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uint32_t val_low;
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uint32_t val_high;
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}riscv_machine_timer_t;
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static volatile riscv_machine_timer_t *mtime = (riscv_machine_timer_t *)0x4400BFF8;
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static volatile riscv_machine_timer_t *mtimecmp = (riscv_machine_timer_t *)0x44004000;
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/*
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* Setup the timer to generate the tick interrupts.
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*/
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void vPortSetupTimer( void );
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/*
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* Set the next interval for the timer
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*/
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static void prvSetNextTimerInterrupt( void );
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/*
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* Used to catch tasks that attempt to return from their implementing function.
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*/
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static void prvTaskExitError( void );
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void vPortEnterCritical( void )
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{
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portDISABLE_INTERRUPTS();
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uxCriticalNesting++;
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}
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/*-----------------------------------------------------------*/
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void vPortExitCritical( void )
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{
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uxCriticalNesting--;
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if( uxCriticalNesting == 0 )
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{
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portENABLE_INTERRUPTS();
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}
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}
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/*-----------------------------------------------------------*/
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/* Sets the next timer interrupt
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* Reads previous timer compare register, and adds tickrate */
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static void prvSetNextTimerInterrupt(void)
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{
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uint64_t time;
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time = mtime->val_low;
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time |= ((uint64_t)mtime->val_high << 32);
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time += (configCPU_CLOCK_HZ / configTICK_RATE_HZ);
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mtimecmp->val_low = (uint32_t)(time & 0xFFFFFFFF);
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mtimecmp->val_high = (uint32_t)((time >> 32) & 0xFFFFFFFF);
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/* Enable timer interrupt */
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__asm volatile("csrs mie,%0"::"r"(0x80));
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}
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/*-----------------------------------------------------------*/
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/* Sets and enable the timer interrupt */
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void vPortSetupTimer(void)
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{
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uint64_t time;
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time = mtime->val_low;
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time |= ((uint64_t)mtime->val_high << 32);
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time += (configCPU_CLOCK_HZ / configTICK_RATE_HZ);
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mtimecmp->val_low = (uint32_t)(time & 0xFFFFFFFF);
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mtimecmp->val_high = (uint32_t)((time >> 32) & 0xFFFFFFFF);
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/* Enable timer interrupt */
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__asm volatile("csrs mie,%0"::"r"(0x80));
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}
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/*-----------------------------------------------------------*/
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void prvTaskExitError( void )
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{
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/* A function that implements a task must not exit or attempt to return to
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its caller as there is nothing to return to. If a task wants to exit it
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should instead call vTaskDelete( NULL ).
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Artificially force an assert() to be triggered if configASSERT() is
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defined, then stop here so application writers can catch the error. */
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configASSERT( uxCriticalNesting == ~0UL );
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portDISABLE_INTERRUPTS();
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for( ;; );
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}
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/*-----------------------------------------------------------*/
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/* Clear current interrupt mask and set given mask */
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void vPortClearInterruptMask(int mask)
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{
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__asm volatile("csrw mie, %0"::"r"(mask));
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}
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/*-----------------------------------------------------------*/
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/* Set interrupt mask and return current interrupt enable register */
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int vPortSetInterruptMask(void)
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{
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int ret;
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__asm volatile("csrr %0,mie":"=r"(ret));
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__asm volatile("csrc mie,%0"::"i"(7));
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return ret;
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}
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/*
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* See header file for description.
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*/
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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{
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/* Simulate the stack frame as it would be created by a context switch
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interrupt. */
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register int *tp asm("x3");
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pxTopOfStack--;
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*pxTopOfStack = (portSTACK_TYPE)pxCode; /* Start address */
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pxTopOfStack -= 22;
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*pxTopOfStack = (portSTACK_TYPE)pvParameters; /* Register a0 */
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pxTopOfStack -= 6;
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*pxTopOfStack = (portSTACK_TYPE)tp; /* Register thread pointer */
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pxTopOfStack -= 3;
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*pxTopOfStack = (portSTACK_TYPE)prvTaskExitError; /* Register ra */
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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void vPortSysTickHandler( void )
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{
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/*Save Context*/
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{
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__asm volatile("lw t0, pxCurrentTCB");
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__asm volatile("sw a2, 0x0(t0)");
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}
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/* Increment the RTOS tick. */
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prvSetNextTimerInterrupt();
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/*Switch task */
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if( xTaskIncrementTick() != pdFALSE )
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{
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vTaskSwitchContext();
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}
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/*Restore Context*/
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{
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__asm volatile("lw sp, pxCurrentTCB");
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__asm volatile("lw sp, 0x0(sp)");
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__asm volatile("lw t0, 31 * 4(sp)");
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__asm volatile("csrw mepc, t0");
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__asm volatile("lw x1, 0x0(sp)");
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__asm volatile("lw x4, 3 * 4(sp)");
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__asm volatile("lw x5, 4 * 4(sp)");
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__asm volatile("lw x6, 5 * 4(sp)");
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__asm volatile("lw x7, 6 * 4(sp)");
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__asm volatile("lw x8, 7 * 4(sp)");
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__asm volatile("lw x9, 8 * 4(sp)");
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__asm volatile("lw x10, 9 * 4(sp)");
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__asm volatile("lw x11, 10 * 4(sp)");
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__asm volatile("lw x12, 11 * 4(sp)");
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__asm volatile("lw x13, 12 * 4(sp)");
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__asm volatile("lw x14, 13 * 4(sp)");
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__asm volatile("lw x15, 14 * 4(sp)");
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__asm volatile("lw x16, 15 * 4(sp)");
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__asm volatile("lw x17, 16 * 4(sp)");
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__asm volatile("lw x18, 17 * 4(sp)");
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__asm volatile("lw x19, 18 * 4(sp)");
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__asm volatile("lw x20, 19 * 4(sp)");
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__asm volatile("lw x21, 20 * 4(sp)");
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__asm volatile("lw x22, 21 * 4(sp)");
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__asm volatile("lw x23, 22 * 4(sp)");
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__asm volatile("lw x24, 23 * 4(sp)");
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__asm volatile("lw x25, 24 * 4(sp)");
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__asm volatile("lw x26, 25 * 4(sp)");
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__asm volatile("lw x27, 26 * 4(sp)");
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__asm volatile("lw x28, 27 * 4(sp)");
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__asm volatile("lw x29, 28 * 4(sp)");
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__asm volatile("lw x30, 29 * 4(sp)");
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__asm volatile("lw x31, 30 * 4(sp)");
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__asm volatile("addi sp, sp, 4 * 32");
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__asm volatile("mret");
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}
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}
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uint32_t g_startscheduler = 0;
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BaseType_t xPortStartScheduler( void )
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{
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vPortSetupTimer();
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uxCriticalNesting = 0;
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g_startscheduler = 1;
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__enable_irq();
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raise_soft_interrupt();
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/*Should not get here*/
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return pdFALSE;
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}
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void Software_IRQHandler(void)
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{
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if(1 == g_startscheduler)
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{
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g_startscheduler = 2; //skip the save n switch context first time when scheduler is starting.
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}
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else
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{
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/*Save Context*/
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{
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__asm volatile("lw t0, pxCurrentTCB");
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__asm volatile("sw a2, 0x0(t0)");
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}
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vTaskSwitchContext();
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}
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/*Restore Context*/
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{
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__asm volatile("lw sp, pxCurrentTCB");
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__asm volatile("lw sp, 0x0(sp)");
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__asm volatile("lw t0, 31 * 4(sp)");
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__asm volatile("csrw mepc, t0");
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__asm volatile("lw x1, 0x0(sp)");
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__asm volatile("lw x4, 3 * 4(sp)");
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__asm volatile("lw x5, 4 * 4(sp)");
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__asm volatile("lw x6, 5 * 4(sp)");
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__asm volatile("lw x7, 6 * 4(sp)");
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__asm volatile("lw x8, 7 * 4(sp)");
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__asm volatile("lw x9, 8 * 4(sp)");
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__asm volatile("lw x10, 9 * 4(sp)");
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__asm volatile("lw x11, 10 * 4(sp)");
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__asm volatile("lw x12, 11 * 4(sp)");
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__asm volatile("lw x13, 12 * 4(sp)");
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__asm volatile("lw x14, 13 * 4(sp)");
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__asm volatile("lw x15, 14 * 4(sp)");
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__asm volatile("lw x16, 15 * 4(sp)");
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__asm volatile("lw x17, 16 * 4(sp)");
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__asm volatile("lw x18, 17 * 4(sp)");
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__asm volatile("lw x19, 18 * 4(sp)");
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__asm volatile("lw x20, 19 * 4(sp)");
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__asm volatile("lw x21, 20 * 4(sp)");
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__asm volatile("lw x22, 21 * 4(sp)");
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__asm volatile("lw x23, 22 * 4(sp)");
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__asm volatile("lw x24, 23 * 4(sp)");
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__asm volatile("lw x25, 24 * 4(sp)");
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__asm volatile("lw x26, 25 * 4(sp)");
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__asm volatile("lw x27, 26 * 4(sp)");
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__asm volatile("lw x28, 27 * 4(sp)");
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__asm volatile("lw x29, 28 * 4(sp)");
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__asm volatile("lw x30, 29 * 4(sp)");
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__asm volatile("lw x31, 30 * 4(sp)");
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__asm volatile("addi sp, sp, 4 * 32");
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//PRCI->MSIP[0] = 0x00;
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__asm volatile("addi sp, sp, -1*4");
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__asm volatile("sw t0, 0(sp)");
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__asm volatile("li t0, 0x44000000"); // address of PRCI->MSIP[0]
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__asm volatile("sw zero,0(t0)");
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__asm volatile("lw t0, 0(sp)");
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__asm volatile("addi sp, sp, 1*4");
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__asm volatile("mret");
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}
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}
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void vPortYield( void )
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{
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raise_soft_interrupt();
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}
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