140 lines
3.5 KiB
Plaintext
140 lines
3.5 KiB
Plaintext
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/*******************************************************************************
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* (c) Copyright 2016-2018 Microsemi SoC Products Group. All rights reserved.
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*
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* file name : microsemi-riscv-ram.ld
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* Mi-V soft processor linker script for creating a SoftConsole downloadable
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* debug image executing in SRAM.
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*
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* This linker script assumes that the SRAM is connected at on the Mi-V soft
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* processor memory space. The start address and size of the memory space must
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* be correct as per the Libero design.
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*
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* SVN $Revision: 9661 $
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* SVN $Date: 2018-01-15 16:13:33 +0530 (Mon, 15 Jan 2018) $
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*/
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OUTPUT_ARCH( "riscv" )
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ENTRY(_start)
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MEMORY
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{
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ram (rwx) : ORIGIN = 0x80000000, LENGTH = 512k
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}
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RAM_START_ADDRESS = 0x80000000; /* Must be the same value MEMORY region ram ORIGIN above. */
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RAM_SIZE = 512k; /* Must be the same value MEMORY region ram LENGTH above. */
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STACK_SIZE = 2k; /* needs to be calculated for your application */
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HEAP_SIZE = 4; /* needs to be calculated for your application */
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SECTIONS
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{
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.text : ALIGN(0x10)
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{
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KEEP (*(SORT_NONE(.text.entry)))
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. = ALIGN(0x10);
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*(.text .text.* .gnu.linkonce.t.*)
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*(.plt)
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. = ALIGN(0x10);
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KEEP (*crtbegin.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*crtend.o(.ctors))
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KEEP (*crtbegin.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*crtend.o(.dtors))
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*(.rodata .rodata.* .gnu.linkonce.r.*)
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*(.gcc_except_table)
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*(.eh_frame_hdr)
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*(.eh_frame)
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KEEP (*(.init))
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KEEP (*(.fini))
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array))
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PROVIDE_HIDDEN (__init_array_end = .);
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP (*(.fini_array))
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KEEP (*(SORT(.fini_array.*)))
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PROVIDE_HIDDEN (__fini_array_end = .);
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. = ALIGN(0x10);
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} > ram
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/* short/global data section */
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.sdata : ALIGN(0x10)
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{
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__sdata_load = LOADADDR(.sdata);
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__sdata_start = .;
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PROVIDE( __global_pointer$ = . + 0x800);
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*(.srodata.cst16) *(.srodata.cst8) *(.srodata.cst4) *(.srodata.cst2)
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*(.srodata*)
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*(.sdata .sdata.* .gnu.linkonce.s.*)
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. = ALIGN(0x10);
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__sdata_end = .;
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} > ram
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/* data section */
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.data : ALIGN(0x10)
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{
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__data_load = LOADADDR(.data);
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__data_start = .;
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*(.got.plt) *(.got)
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*(.shdata)
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*(.data .data.* .gnu.linkonce.d.*)
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. = ALIGN(0x10);
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__data_end = .;
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} > ram
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/* sbss section */
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.sbss : ALIGN(0x10)
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{
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__sbss_start = .;
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*(.sbss .sbss.* .gnu.linkonce.sb.*)
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*(.scommon)
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. = ALIGN(0x10);
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__sbss_end = .;
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} > ram
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/* sbss section */
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.bss : ALIGN(0x10)
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{
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__bss_start = .;
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*(.shbss)
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*(.bss .bss.* .gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN(0x10);
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__bss_end = .;
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} > ram
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/* End of uninitialized data segment */
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_end = .;
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.heap : ALIGN(0x10)
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{
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__heap_start = .;
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. += HEAP_SIZE;
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__heap_end = .;
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. = ALIGN(0x10);
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_heap_end = __heap_end;
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} > ram
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.stack : ALIGN(0x10)
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{
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__stack_bottom = .;
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. += STACK_SIZE;
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__stack_top = .;
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_sp = .;
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__freertos_irq_stack_top = .;
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} > ram
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}
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