move to CoreDSL v2.0.3

This commit is contained in:
2022-05-08 13:54:27 +02:00
parent b939c3b37c
commit 65f2b42a4c
4 changed files with 45 additions and 49 deletions

View File

@@ -12,6 +12,7 @@ Require-Bundle: com.minres.coredsl;bundle-version="2.0.0",
org.eclipse.equinox.preferences;bundle-version="3.8.0",
org.eclipse.xtend.lib;bundle-version="2.14.0",
org.eclipse.xtext;bundle-version="2.22.0",
org.eclipse.emf.mwe.utils;bundle-version="1.6.2",
org.apache.commons.logging;bundle-version="1.2.0",
org.json;bundle-version="1.0.0"
Bundle-RequiredExecutionEnvironment: JavaSE-11

View File

@@ -66,10 +66,10 @@ class CoreDslJsonGenerator extends AbstractGenerator {
def Iterable<Instruction> allInstr(CoreDef core) {
val unique = newLinkedHashMap
val instrList = if (core.contributingType.size == 0)
val instrList = if (core.providedInstructionSets.size == 0)
core.instructions
else {
val instrSets = core.contributingType?.map[InstructionSet i|i.allInstructionSets].flatten
val instrSets = core.providedInstructionSets?.map[InstructionSet i|i.allInstructionSets].flatten
val seen = newLinkedHashSet
seen.addAll(instrSets)
seen.map[InstructionSet i|i.instructions].flatten
@@ -97,11 +97,11 @@ class CoreDslJsonGenerator extends AbstractGenerator {
def String getBitEncoding(Encoding encoding) '''«FOR field : encoding.fields»«field.regEx»«ENDFOR»'''
def dispatch getRegEx(BitField i) '''«FOR idx : i.right.value.intValue .. i.left.value.intValue».«ENDFOR»'''
def dispatch getRegEx(BitField i) '''«FOR idx : i.startIndex.value.intValue .. i.endIndex.value.intValue».«ENDFOR»'''
def dispatch getRegEx(BitValue i) '''«i.value.toString(2)»'''
def dispatch asString(BitField i) '''«i.name»[«i.left.value.intValue»:«i.right.value.intValue»]'''
def dispatch asString(BitField i) '''«i.name»[«i.startIndex.value.intValue»:«i.endIndex.value.intValue»]'''
def dispatch asString(BitValue i) {
(i.value as BigIntegerWithRadix).toCString(2)