forked from Firmware/Firmwares
remove unused timer interrupt handler
This commit is contained in:
parent
9157a42042
commit
9e9b644e29
@ -3,7 +3,7 @@ TARGET = hello_raven
|
|||||||
C_SRCS = $(wildcard src/*.c) $(BSP_BASE)/drivers/fe300prci/fe300prci_driver.c $(BSP_BASE)/drivers/plic/plic_driver.c
|
C_SRCS = $(wildcard src/*.c) $(BSP_BASE)/drivers/fe300prci/fe300prci_driver.c $(BSP_BASE)/drivers/plic/plic_driver.c
|
||||||
CXX_SRCS = $(wildcard src/*.cpp)
|
CXX_SRCS = $(wildcard src/*.cpp)
|
||||||
HEADERS = $(wildcard src/*.h)
|
HEADERS = $(wildcard src/*.h)
|
||||||
CFLAGS = -g -fno-builtin-printf -DUSE_PLIC -DUSE_M_TIME -DNO_INIT -I./src
|
CFLAGS = -g -fno-builtin-printf -DUSE_PLIC -I./src
|
||||||
CXXFLAGS = -fno-use-cxa-atexit
|
CXXFLAGS = -fno-use-cxa-atexit
|
||||||
LDFLAGS = -Wl,--wrap=printf
|
LDFLAGS = -Wl,--wrap=printf
|
||||||
LDFLAGS += -g -lstdc++ -fno-use-cxa-atexit -march=$(RISCV_ARCH) -mabi=$(RISCV_ABI) -mcmodel=medany
|
LDFLAGS += -g -lstdc++ -fno-use-cxa-atexit -march=$(RISCV_ARCH) -mabi=$(RISCV_ABI) -mcmodel=medany
|
||||||
|
Binary file not shown.
@ -5,10 +5,7 @@
|
|||||||
|
|
||||||
#include <cstdio>
|
#include <cstdio>
|
||||||
#include <cstdint>
|
#include <cstdint>
|
||||||
|
#include <array>
|
||||||
#include "hifive1_io.h"
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#define IOF_ENABLE_TERMINAL (0x30000)
|
#define IOF_ENABLE_TERMINAL (0x30000)
|
||||||
|
|
||||||
@ -34,21 +31,6 @@ extern "C" void handle_m_ext_interrupt() {
|
|||||||
exit(1 + (uintptr_t) int_num);
|
exit(1 + (uintptr_t) int_num);
|
||||||
PLIC_complete_interrupt(&g_plic, int_num);
|
PLIC_complete_interrupt(&g_plic, int_num);
|
||||||
}
|
}
|
||||||
/*! \brief mtime interval interrupt
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
extern "C" void handle_m_time_interrupt(){
|
|
||||||
clear_csr(mie, MIP_MTIP);
|
|
||||||
// Reset the timer for 3s in the future.
|
|
||||||
// This also clears the existing timer interrupt.
|
|
||||||
volatile uint64_t * mtime = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIME);
|
|
||||||
volatile uint64_t * mtimecmp = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIMECMP);
|
|
||||||
uint64_t now = *mtime;
|
|
||||||
uint64_t then = now + RTC_FREQ;
|
|
||||||
*mtimecmp = then;
|
|
||||||
// Re-enable the timer interrupt.
|
|
||||||
set_csr(mie, MIP_MTIP);
|
|
||||||
}
|
|
||||||
/*! \brief dummy interrupt handler
|
/*! \brief dummy interrupt handler
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
@ -83,9 +65,10 @@ static void msi_interrupt_handler(){
|
|||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
void platform_init(){
|
void platform_init(){
|
||||||
// configure clocks
|
// UART init section TODO: clarify how to get the functions from init.c?
|
||||||
PRCI_use_hfxosc(1); // is equivalent to
|
GPIO_REG(GPIO_IOF_SEL) &= ~IOF0_UART0_MASK;
|
||||||
qspi1::sckdiv_reg() = 8;
|
GPIO_REG(GPIO_IOF_EN) |= IOF0_UART0_MASK;
|
||||||
|
UART0_REG(UART_REG_TXCTRL) |= UART_TXEN;
|
||||||
|
|
||||||
F_CPU=PRCI_measure_mcycle_freq(20, RTC_FREQ);
|
F_CPU=PRCI_measure_mcycle_freq(20, RTC_FREQ);
|
||||||
printf("core freq at %d Hz\n", F_CPU);
|
printf("core freq at %d Hz\n", F_CPU);
|
||||||
@ -98,18 +81,10 @@ void platform_init(){
|
|||||||
clear_csr(mie, MIP_MTIP);
|
clear_csr(mie, MIP_MTIP);
|
||||||
for (auto& h:g_ext_interrupt_handlers) h=no_interrupt_handler;
|
for (auto& h:g_ext_interrupt_handlers) h=no_interrupt_handler;
|
||||||
configure_irq(1, msi_interrupt_handler);
|
configure_irq(1, msi_interrupt_handler);
|
||||||
// Set the machine timer to go off in 1 second.
|
|
||||||
volatile uint64_t * mtime = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIME);
|
|
||||||
volatile uint64_t * mtimecmp = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIMECMP);
|
|
||||||
uint64_t now = *mtime;
|
|
||||||
uint64_t then = now + RTC_FREQ;
|
|
||||||
*mtimecmp = then;
|
|
||||||
// Enable the Machine-External bit in MIE
|
|
||||||
set_csr(mie, MIP_MEIP);
|
|
||||||
// Enable the Machine-Timer bit in MIE
|
|
||||||
set_csr(mie, MIP_MTIP);
|
|
||||||
// Enable interrupts in general.
|
// Enable interrupts in general.
|
||||||
set_csr(mstatus, MSTATUS_MIE);
|
set_csr(mstatus, MSTATUS_MIE);
|
||||||
|
// Enable the Machine-External bit in MIE
|
||||||
|
set_csr(mie, MIP_MEIP);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*! \brief main function
|
/*! \brief main function
|
||||||
@ -121,15 +96,12 @@ int main() {
|
|||||||
int * plic_b_pending = (int *)(0xA0000000+PLIC_PENDING_OFFSET);
|
int * plic_b_pending = (int *)(0xA0000000+PLIC_PENDING_OFFSET);
|
||||||
|
|
||||||
int * local_sync_bit = (int *)(local_mem_base + 10);
|
int * local_sync_bit = (int *)(local_mem_base + 10);
|
||||||
int * target_sync_bit = (int *)(target_mem_base + 10);
|
volatile int * target_sync_bit = (int *)(target_mem_base + 10);
|
||||||
|
|
||||||
int hartid = read_csr(mhartid);
|
int hartid = read_csr(mhartid);
|
||||||
|
|
||||||
*local_sync_bit = 0;
|
*local_sync_bit = 0;
|
||||||
GPIO_REG(GPIO_IOF_EN) |= IOF_ENABLE_TERMINAL; // enable GPIO connection to the terminal
|
|
||||||
platform_init();
|
platform_init();
|
||||||
// Enable the Machine-External bit in MIE
|
|
||||||
set_csr(mie, MIP_MEIP);
|
|
||||||
|
|
||||||
if (hartid == 0) {
|
if (hartid == 0) {
|
||||||
int val_a = 5;
|
int val_a = 5;
|
||||||
|
@ -2,6 +2,5 @@
|
|||||||
#define HELLO_RAVEN_H_
|
#define HELLO_RAVEN_H_
|
||||||
|
|
||||||
extern "C" void handle_m_ext_interrupt();
|
extern "C" void handle_m_ext_interrupt();
|
||||||
extern "C" void handle_m_time_interrupt();
|
|
||||||
|
|
||||||
#endif /* HELLO_RAVEN_H_ */
|
#endif /* HELLO_RAVEN_H_ */
|
||||||
|
@ -1,16 +0,0 @@
|
|||||||
/*
|
|
||||||
* peripherals.c
|
|
||||||
*
|
|
||||||
* Created on: 10.09.2018
|
|
||||||
* Author: eyck
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "hifive1_io.h"
|
|
||||||
|
|
||||||
template<> volatile bool qspi0::spi_active=false;
|
|
||||||
template<> volatile bool qspi1::spi_active=false;
|
|
||||||
template<> volatile bool qspi2::spi_active=false;
|
|
||||||
template<> volatile bool pwm0::pwm_active=false;
|
|
||||||
template<> volatile bool pwm1::pwm_active=false;
|
|
||||||
template<> volatile bool pwm2::pwm_active=false;
|
|
||||||
|
|
@ -1,26 +0,0 @@
|
|||||||
/*
|
|
||||||
* peripherals.h
|
|
||||||
*
|
|
||||||
* Created on: 29.07.2018
|
|
||||||
* Author: eyck
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef HIFIVE1_IO_H_
|
|
||||||
#define HIFIVE1_IO_H_
|
|
||||||
|
|
||||||
#include "io/gpio.h"
|
|
||||||
#include "io/spi.h"
|
|
||||||
#include "io/pwm.h"
|
|
||||||
#include "io/uart.h"
|
|
||||||
|
|
||||||
using gpio0=gpio_regs<0x10012000>;
|
|
||||||
using uart0=uart_regs<0x10013000>;
|
|
||||||
using uart1=uart_regs<0x10023000>;
|
|
||||||
using qspi0=spi_regs<0x10014000>;
|
|
||||||
using qspi1=spi_regs<0x10024000>;
|
|
||||||
using qspi2=spi_regs<0x10034000>;
|
|
||||||
using pwm0 =pwm_regs<0x10015000>;
|
|
||||||
using pwm1 =pwm_regs<0x10025000>;
|
|
||||||
using pwm2 =pwm_regs<0x10035000>;
|
|
||||||
|
|
||||||
#endif /* HIFIVE1_IO_H_ */
|
|
Loading…
Reference in New Issue
Block a user