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Firmwares/hello-world/hello.dis

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rework structure
2023-08-20 15:00:51 +02:00
hello: file format elf32-littleriscv
Disassembly of section .init:
00000020 <_start>:
.type _start,@function
_start:
.option push
.option norelax
la gp, __global_pointer$
20: 10000197 auipc gp,0x10000
24: 7e018193 addi gp,gp,2016 # 10000800 <__global_pointer$>
.option pop
la sp, _sp
28: 10004117 auipc sp,0x10004
2c: fd810113 addi sp,sp,-40 # 10004000 <_sp>
/* Load data section */
la a0, _data_lma
30: 00002517 auipc a0,0x2
34: dac50513 addi a0,a0,-596 # 1ddc <_data_lma>
la a1, _data
38: 10000597 auipc a1,0x10000
3c: fc858593 addi a1,a1,-56 # 10000000 <__DATA_BEGIN__>
la a2, _edata
40: 80818613 addi a2,gp,-2040 # 10000008 <__BSS_END__>
bgeu a1, a2, 2f
44: 00c5fc63 bgeu a1,a2,5c <_start+0x3c>
1:
lw t0, (a0)
48: 00052283 lw t0,0(a0)
sw t0, (a1)
4c: 0055a023 sw t0,0(a1)
addi a0, a0, 4
50: 00450513 addi a0,a0,4
addi a1, a1, 4
54: 00458593 addi a1,a1,4
bltu a1, a2, 1b
58: fec5e8e3 bltu a1,a2,48 <_start+0x28>
2:
/* Clear bss section */
la a0, __bss_start
5c: 80818513 addi a0,gp,-2040 # 10000008 <__BSS_END__>
la a1, _end
60: 80818593 addi a1,gp,-2040 # 10000008 <__BSS_END__>
bgeu a0, a1, 2f
64: 00b57863 bgeu a0,a1,74 <_start+0x54>
1:
sw zero, (a0)
68: 00052023 sw zero,0(a0)
addi a0, a0, 4
6c: 00450513 addi a0,a0,4
bltu a0, a1, 1b
70: feb56ce3 bltu a0,a1,68 <_start+0x48>
fssr x0
1:
#endif
/* argc = argv = 0 */
li a0, 0
74: 00000513 li a0,0
li a1, 0
78: 00000593 li a1,0
call main
7c: 008000ef jal ra,84 <main>
tail _exit
80: 3880006f j 408 <__wrap__exit>
Disassembly of section .text:
00000084 <main>:
return result;
}
int main()
{
84: fe010113 addi sp,sp,-32
volatile int result = 1;
88: 00100793 li a5,1
{
8c: 00812c23 sw s0,24(sp)
90: 00912a23 sw s1,20(sp)
94: 00112e23 sw ra,28(sp)
volatile int result = 1;
98: 00f12623 sw a5,12(sp)
for (int ii = 1; ii <= i; ii++) {
9c: 00100413 li s0,1
a0: 00b00493 li s1,11
result = result * ii;
a4: 00c12503 lw a0,12(sp)
a8: 00040593 mv a1,s0
for (int ii = 1; ii <= i; ii++) {
ac: 00140413 addi s0,s0,1
result = result * ii;
b0: 0dd010ef jal ra,198c <__mulsi3>
b4: 00a12623 sw a0,12(sp)
for (int ii = 1; ii <= i; ii++) {
b8: fe9416e3 bne s0,s1,a4 <main+0x20>
return result;
bc: 00c12783 lw a5,12(sp)
volatile int result = factorial (10);
printf("Factorial is %d\n", result);
c0: 00002517 auipc a0,0x2
c4: 9f050513 addi a0,a0,-1552 # 1ab0 <__clzsi2+0x4c>
volatile int result = factorial (10);
c8: 00f12423 sw a5,8(sp)
printf("Factorial is %d\n", result);
cc: 00812583 lw a1,8(sp)
d0: 2f1000ef jal ra,bc0 <__wrap_printf>
printf("End of execution");
d4: 00002517 auipc a0,0x2
d8: 9f050513 addi a0,a0,-1552 # 1ac4 <__clzsi2+0x60>
dc: 2e5000ef jal ra,bc0 <__wrap_printf>
return 0;
}
e0: 01c12083 lw ra,28(sp)
e4: 01812403 lw s0,24(sp)
e8: 01412483 lw s1,20(sp)
ec: 00000513 li a0,0
f0: 02010113 addi sp,sp,32
f4: 00008067 ret
000000f8 <trap_entry>:
.section .text.entry
.align 2
.global trap_entry
trap_entry:
addi sp, sp, -32*REGBYTES
f8: f8010113 addi sp,sp,-128
STORE x1, 1*REGBYTES(sp)
fc: 00112223 sw ra,4(sp)
STORE x2, 2*REGBYTES(sp)
100: 00212423 sw sp,8(sp)
STORE x3, 3*REGBYTES(sp)
104: 00312623 sw gp,12(sp)
STORE x4, 4*REGBYTES(sp)
108: 00412823 sw tp,16(sp)
STORE x5, 5*REGBYTES(sp)
10c: 00512a23 sw t0,20(sp)
STORE x6, 6*REGBYTES(sp)
110: 00612c23 sw t1,24(sp)
STORE x7, 7*REGBYTES(sp)
114: 00712e23 sw t2,28(sp)
STORE x8, 8*REGBYTES(sp)
118: 02812023 sw s0,32(sp)
STORE x9, 9*REGBYTES(sp)
11c: 02912223 sw s1,36(sp)
STORE x10, 10*REGBYTES(sp)
120: 02a12423 sw a0,40(sp)
STORE x11, 11*REGBYTES(sp)
124: 02b12623 sw a1,44(sp)
STORE x12, 12*REGBYTES(sp)
128: 02c12823 sw a2,48(sp)
STORE x13, 13*REGBYTES(sp)
12c: 02d12a23 sw a3,52(sp)
STORE x14, 14*REGBYTES(sp)
130: 02e12c23 sw a4,56(sp)
STORE x15, 15*REGBYTES(sp)
134: 02f12e23 sw a5,60(sp)
#ifndef __riscv_abi_rve
STORE x16, 16*REGBYTES(sp)
138: 05012023 sw a6,64(sp)
STORE x17, 17*REGBYTES(sp)
13c: 05112223 sw a7,68(sp)
STORE x18, 18*REGBYTES(sp)
140: 05212423 sw s2,72(sp)
STORE x19, 19*REGBYTES(sp)
144: 05312623 sw s3,76(sp)
STORE x20, 20*REGBYTES(sp)
148: 05412823 sw s4,80(sp)
STORE x21, 21*REGBYTES(sp)
14c: 05512a23 sw s5,84(sp)
STORE x22, 22*REGBYTES(sp)
150: 05612c23 sw s6,88(sp)
STORE x23, 23*REGBYTES(sp)
154: 05712e23 sw s7,92(sp)
STORE x24, 24*REGBYTES(sp)
158: 07812023 sw s8,96(sp)
STORE x25, 25*REGBYTES(sp)
15c: 07912223 sw s9,100(sp)
STORE x26, 26*REGBYTES(sp)
160: 07a12423 sw s10,104(sp)
STORE x27, 27*REGBYTES(sp)
164: 07b12623 sw s11,108(sp)
STORE x28, 28*REGBYTES(sp)
168: 07c12823 sw t3,112(sp)
STORE x29, 29*REGBYTES(sp)
16c: 07d12a23 sw t4,116(sp)
STORE x30, 30*REGBYTES(sp)
170: 07e12c23 sw t5,120(sp)
STORE x31, 31*REGBYTES(sp)
174: 07f12e23 sw t6,124(sp)
#endif
csrr a0, mcause
178: 34202573 csrr a0,mcause
csrr a1, mepc
17c: 341025f3 csrr a1,mepc
mv a2, sp
180: 00010613 mv a2,sp
call handle_trap
184: 174000ef jal ra,2f8 <handle_trap>
csrw mepc, a0
188: 34151073 csrw mepc,a0
# Remain in M-mode after mret
li t0, MSTATUS_MPP
18c: 000022b7 lui t0,0x2
190: 80028293 addi t0,t0,-2048 # 1800 <__muldf3+0x5bc>
csrs mstatus, t0
194: 3002a073 csrs mstatus,t0
LOAD x1, 1*REGBYTES(sp)
198: 00412083 lw ra,4(sp)
LOAD x2, 2*REGBYTES(sp)
19c: 00812103 lw sp,8(sp)
LOAD x3, 3*REGBYTES(sp)
1a0: 00c12183 lw gp,12(sp)
LOAD x4, 4*REGBYTES(sp)
1a4: 01012203 lw tp,16(sp)
LOAD x5, 5*REGBYTES(sp)
1a8: 01412283 lw t0,20(sp)
LOAD x6, 6*REGBYTES(sp)
1ac: 01812303 lw t1,24(sp)
LOAD x7, 7*REGBYTES(sp)
1b0: 01c12383 lw t2,28(sp)
LOAD x8, 8*REGBYTES(sp)
1b4: 02012403 lw s0,32(sp)
LOAD x9, 9*REGBYTES(sp)
1b8: 02412483 lw s1,36(sp)
LOAD x10, 10*REGBYTES(sp)
1bc: 02812503 lw a0,40(sp)
LOAD x11, 11*REGBYTES(sp)
1c0: 02c12583 lw a1,44(sp)
LOAD x12, 12*REGBYTES(sp)
1c4: 03012603 lw a2,48(sp)
LOAD x13, 13*REGBYTES(sp)
1c8: 03412683 lw a3,52(sp)
LOAD x14, 14*REGBYTES(sp)
1cc: 03812703 lw a4,56(sp)
LOAD x15, 15*REGBYTES(sp)
1d0: 03c12783 lw a5,60(sp)
#ifndef __riscv_abi_rve
LOAD x16, 16*REGBYTES(sp)
1d4: 04012803 lw a6,64(sp)
LOAD x17, 17*REGBYTES(sp)
1d8: 04412883 lw a7,68(sp)
LOAD x18, 18*REGBYTES(sp)
1dc: 04812903 lw s2,72(sp)
LOAD x19, 19*REGBYTES(sp)
1e0: 04c12983 lw s3,76(sp)
LOAD x20, 20*REGBYTES(sp)
1e4: 05012a03 lw s4,80(sp)
LOAD x21, 21*REGBYTES(sp)
1e8: 05412a83 lw s5,84(sp)
LOAD x22, 22*REGBYTES(sp)
1ec: 05812b03 lw s6,88(sp)
LOAD x23, 23*REGBYTES(sp)
1f0: 05c12b83 lw s7,92(sp)
LOAD x24, 24*REGBYTES(sp)
1f4: 06012c03 lw s8,96(sp)
LOAD x25, 25*REGBYTES(sp)
1f8: 06412c83 lw s9,100(sp)
LOAD x26, 26*REGBYTES(sp)
1fc: 06812d03 lw s10,104(sp)
LOAD x27, 27*REGBYTES(sp)
200: 06c12d83 lw s11,108(sp)
LOAD x28, 28*REGBYTES(sp)
204: 07012e03 lw t3,112(sp)
LOAD x29, 29*REGBYTES(sp)
208: 07412e83 lw t4,116(sp)
LOAD x30, 30*REGBYTES(sp)
20c: 07812f03 lw t5,120(sp)
LOAD x31, 31*REGBYTES(sp)
210: 07c12f83 lw t6,124(sp)
#endif
addi sp, sp, 32*REGBYTES
214: 08010113 addi sp,sp,128
mret
218: 30200073 mret
.weak handle_trap
handle_trap:
1:
j 1b
21c: 0000006f j 21c <trap_entry+0x124>
00000220 <factorial>:
int factorial(int i){
220: fe010113 addi sp,sp,-32
volatile int result = 1;
224: 00100793 li a5,1
int factorial(int i){
228: 00112e23 sw ra,28(sp)
22c: 00812c23 sw s0,24(sp)
230: 00912a23 sw s1,20(sp)
volatile int result = 1;
234: 00f12623 sw a5,12(sp)
for (int ii = 1; ii <= i; ii++) {
238: 02a05263 blez a0,25c <factorial+0x3c>
23c: 00150493 addi s1,a0,1
240: 00100413 li s0,1
result = result * ii;
244: 00c12503 lw a0,12(sp)
248: 00040593 mv a1,s0
for (int ii = 1; ii <= i; ii++) {
24c: 00140413 addi s0,s0,1
result = result * ii;
250: 73c010ef jal ra,198c <__mulsi3>
254: 00a12623 sw a0,12(sp)
for (int ii = 1; ii <= i; ii++) {
258: fe9416e3 bne s0,s1,244 <factorial+0x24>
}
25c: 01c12083 lw ra,28(sp)
260: 01812403 lw s0,24(sp)
return result;
264: 00c12503 lw a0,12(sp)
}
268: 01412483 lw s1,20(sp)
26c: 02010113 addi sp,sp,32
270: 00008067 ret
00000274 <time>:
/* The functions in this file are only meant to support Dhrystone on an
* embedded RV32 system and are obviously incorrect in general. */
long time(void)
{
274: ff010113 addi sp,sp,-16
278: 00112623 sw ra,12(sp)
27c: 00812423 sw s0,8(sp)
280: 00912223 sw s1,4(sp)
return get_timer_value() / get_timer_freq();
284: 048000ef jal ra,2cc <get_timer_value>
288: 00050493 mv s1,a0
28c: 00058413 mv s0,a1
290: 050000ef jal ra,2e0 <get_timer_freq>
294: 00050613 mv a2,a0
298: 00040593 mv a1,s0
29c: 00048513 mv a0,s1
2a0: 00000693 li a3,0
2a4: 1e1000ef jal ra,c84 <__udivdi3>
}
2a8: 00c12083 lw ra,12(sp)
2ac: 00812403 lw s0,8(sp)
2b0: 00412483 lw s1,4(sp)
2b4: 01010113 addi sp,sp,16
2b8: 00008067 ret
000002bc <__wrap_scanf>:
// set the number of dhrystone iterations
void __wrap_scanf(const char* fmt, int* n)
{
*n = 100000000;
2bc: 05f5e7b7 lui a5,0x5f5e
2c0: 10078793 addi a5,a5,256 # 5f5e100 <_data_lma+0x5f5c324>
2c4: 00f5a023 sw a5,0(a1)
}
2c8: 00008067 ret
000002cc <get_timer_value>:
#if __riscv_xlen==32
static uint32_t mtime_hi(void)
{
unsigned long ret;
__asm volatile("rdtimeh %0":"=r"(ret));
2cc: c81027f3 rdtimeh a5
__asm volatile("rdtime %0":"=r"(ret));
2d0: c0102573 rdtime a0
__asm volatile("rdtimeh %0":"=r"(ret));
2d4: c81025f3 rdtimeh a1
uint64_t get_timer_value()
{
while (1) {
uint32_t hi = mtime_hi();
uint32_t lo = mtime_lo();
if (hi == mtime_hi())
2d8: fef59ae3 bne a1,a5,2cc <get_timer_value>
return ((uint64_t)hi << 32) | lo;
}
}
2dc: 00008067 ret
000002e0 <get_timer_freq>:
#endif
unsigned long get_timer_freq()
{
return 32768;
}
2e0: 00008537 lui a0,0x8
2e4: 00008067 ret
000002e8 <get_cpu_freq>:
unsigned long get_cpu_freq()
{
return 10000000;
2e8: 00989537 lui a0,0x989
}
2ec: 68050513 addi a0,a0,1664 # 989680 <_data_lma+0x9878a4>
2f0: 00008067 ret
000002f4 <init_pll>:
void init_pll(void){
}
2f4: 00008067 ret
000002f8 <handle_trap>:
#ifdef USE_M_TIME
extern void handle_m_time_interrupt();
#endif
uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc)
{
2f8: ff010113 addi sp,sp,-16
2fc: 00812423 sw s0,8(sp)
} else if ((mcause & MCAUSE_INT) && ((mcause & MCAUSE_CAUSE) == IRQ_M_TIMER)){
handle_m_time_interrupt();
#endif
}
else {
write(1, "trap\n", 5);
300: 00500613 li a2,5
{
304: 00050413 mv s0,a0
write(1, "trap\n", 5);
308: 00001597 auipc a1,0x1
30c: 7d058593 addi a1,a1,2000 # 1ad8 <__clzsi2+0x74>
310: 00100513 li a0,1
{
314: 00112623 sw ra,12(sp)
write(1, "trap\n", 5);
318: 05c000ef jal ra,374 <__wrap_write>
_exit(1 + mcause);
31c: 00140513 addi a0,s0,1
320: 0e8000ef jal ra,408 <__wrap__exit>
00000324 <_init>:
void _init()
{
#ifndef NO_INIT
init_pll();
printf("core freq at %d Hz\n", get_cpu_freq());
324: 009895b7 lui a1,0x989
{
328: ff010113 addi sp,sp,-16
printf("core freq at %d Hz\n", get_cpu_freq());
32c: 68058593 addi a1,a1,1664 # 989680 <_data_lma+0x9878a4>
330: 00001517 auipc a0,0x1
334: 7b050513 addi a0,a0,1968 # 1ae0 <__clzsi2+0x7c>
{
338: 00112623 sw ra,12(sp)
printf("core freq at %d Hz\n", get_cpu_freq());
33c: 085000ef jal ra,bc0 <__wrap_printf>
write_csr(mtvec, &trap_entry);
340: 00000797 auipc a5,0x0
344: db878793 addi a5,a5,-584 # f8 <trap_entry>
348: 30579073 csrw mtvec,a5
if (read_csr(misa) & (1 << ('F' - 'A'))) { // if F extension is present
34c: 301027f3 csrr a5,misa
350: 0207f793 andi a5,a5,32
354: 00078863 beqz a5,364 <_init+0x40>
write_csr(mstatus, MSTATUS_FS); // allow FPU instructions without trapping
358: 000067b7 lui a5,0x6
35c: 30079073 csrw mstatus,a5
write_csr(fcsr, 0); // initialize rounding mode, undefined at reset
360: 00305073 csrwi fcsr,0
}
#endif
}
364: 00c12083 lw ra,12(sp)
368: 01010113 addi sp,sp,16
36c: 00008067 ret
00000370 <_fini>:
void _fini()
{
}
370: 00008067 ret
00000374 <__wrap_write>:
#include "platform.h"
#include "stub.h"
ssize_t __wrap_write(int fd, const void* ptr, size_t len)
{
374: ff010113 addi sp,sp,-16
378: 00812423 sw s0,8(sp)
37c: 00912223 sw s1,4(sp)
380: 00112623 sw ra,12(sp)
384: 00058413 mv s0,a1
388: 00060493 mv s1,a2
const uint8_t * current = (const char *)ptr;
if (isatty(fd)) {
38c: 070000ef jal ra,3fc <__wrap_isatty>
390: 06050263 beqz a0,3f4 <__wrap_write+0x80>
for (size_t jj = 0; jj < len; jj++) {
394: 02048c63 beqz s1,3cc <__wrap_write+0x58>
398: 00040593 mv a1,s0
39c: 00940833 add a6,s0,s1
while (UART0_REG(UART_REG_TXFIFO) & 0x80000000) ;
3a0: ffff0737 lui a4,0xffff0
UART0_REG(UART_REG_TXFIFO) = current[jj];
if (current[jj] == '\n') {
3a4: 00a00693 li a3,10
while (UART0_REG(UART_REG_TXFIFO) & 0x80000000) ;
UART0_REG(UART_REG_TXFIFO) = '\r';
3a8: 00d00613 li a2,13
while (UART0_REG(UART_REG_TXFIFO) & 0x80000000) ;
3ac: 00072783 lw a5,0(a4) # ffff0000 <tohost+0xffff0010>
3b0: fe07cee3 bltz a5,3ac <__wrap_write+0x38>
UART0_REG(UART_REG_TXFIFO) = current[jj];
3b4: 0005c783 lbu a5,0(a1)
3b8: 00f72023 sw a5,0(a4)
if (current[jj] == '\n') {
3bc: 0005c783 lbu a5,0(a1)
3c0: 02d78263 beq a5,a3,3e4 <__wrap_write+0x70>
for (size_t jj = 0; jj < len; jj++) {
3c4: 00158593 addi a1,a1,1
3c8: ff0592e3 bne a1,a6,3ac <__wrap_write+0x38>
}
}
return len;
3cc: 00048513 mv a0,s1
}
return _stub(EBADF);
}
3d0: 00c12083 lw ra,12(sp)
3d4: 00812403 lw s0,8(sp)
3d8: 00412483 lw s1,4(sp)
3dc: 01010113 addi sp,sp,16
3e0: 00008067 ret
while (UART0_REG(UART_REG_TXFIFO) & 0x80000000) ;
3e4: 00072783 lw a5,0(a4)
3e8: fe07cee3 bltz a5,3e4 <__wrap_write+0x70>
UART0_REG(UART_REG_TXFIFO) = '\r';
3ec: 00c72023 sw a2,0(a4)
3f0: fd5ff06f j 3c4 <__wrap_write+0x50>
return _stub(EBADF);
3f4: fff00513 li a0,-1
3f8: fd9ff06f j 3d0 <__wrap_write+0x5c>
000003fc <__wrap_isatty>:
#include <unistd.h>
int __wrap_isatty(int fd)
{
if (fd == STDOUT_FILENO || fd == STDERR_FILENO)
3fc: fff50513 addi a0,a0,-1
return 1;
return 0;
}
400: 00253513 sltiu a0,a0,2
404: 00008067 ret
00000408 <__wrap__exit>:
extern volatile uint32_t fromhost;
void __wrap__exit(int code)
{
//volatile uint32_t* leds = (uint32_t*) (GPIO_BASE_ADDR + GPIO_OUT_OFFSET);
const char message[] = "\nProgam has exited with code:";
408: 00001797 auipc a5,0x1
40c: 6f078793 addi a5,a5,1776 # 1af8 <__clzsi2+0x94>
410: 0007ae83 lw t4,0(a5)
414: 0047ae03 lw t3,4(a5)
418: 0087a303 lw t1,8(a5)
41c: 00c7a883 lw a7,12(a5)
420: 0107a803 lw a6,16(a5)
424: 0147a683 lw a3,20(a5)
428: 0187a703 lw a4,24(a5)
42c: 01c7d783 lhu a5,28(a5)
{
430: fd010113 addi sp,sp,-48
//*leds = (~(code));
write(STDERR_FILENO, message, sizeof(message) - 1);
434: 01d00613 li a2,29
{
438: 02812423 sw s0,40(sp)
write(STDERR_FILENO, message, sizeof(message) - 1);
43c: 00010593 mv a1,sp
{
440: 00050413 mv s0,a0
write(STDERR_FILENO, message, sizeof(message) - 1);
444: 00200513 li a0,2
const char message[] = "\nProgam has exited with code:";
448: 00f11e23 sh a5,28(sp)
{
44c: 02112623 sw ra,44(sp)
const char message[] = "\nProgam has exited with code:";
450: 01d12023 sw t4,0(sp)
454: 01c12223 sw t3,4(sp)
458: 00612423 sw t1,8(sp)
45c: 01112623 sw a7,12(sp)
460: 01012823 sw a6,16(sp)
464: 00d12a23 sw a3,20(sp)
468: 00e12c23 sw a4,24(sp)
write(STDERR_FILENO, message, sizeof(message) - 1);
46c: f09ff0ef jal ra,374 <__wrap_write>
write_hex(STDERR_FILENO, code);
470: 00040593 mv a1,s0
474: 00200513 li a0,2
478: 03c000ef jal ra,4b4 <write_hex>
write(STDERR_FILENO, "\n", 1);
47c: 00100613 li a2,1
480: 00001597 auipc a1,0x1
484: 65c58593 addi a1,a1,1628 # 1adc <__clzsi2+0x78>
488: 00200513 li a0,2
48c: ee9ff0ef jal ra,374 <__wrap_write>
tohost = code+1;
490: 00140413 addi s0,s0,1
write(STDERR_FILENO, "\x04", 1);
494: 00100613 li a2,1
498: 00001597 auipc a1,0x1
49c: 65c58593 addi a1,a1,1628 # 1af4 <__clzsi2+0x90>
4a0: 00200513 li a0,2
tohost = code+1;
4a4: 00000797 auipc a5,0x0
4a8: b487a623 sw s0,-1204(a5) # fffffff0 <tohost+0x0>
write(STDERR_FILENO, "\x04", 1);
4ac: ec9ff0ef jal ra,374 <__wrap_write>
for (;;);
4b0: 0000006f j 4b0 <__wrap__exit+0xa8>
000004b4 <write_hex>:
#include <stdint.h>
#include <unistd.h>
#include "platform.h"
void write_hex(int fd, uint32_t hex)
{
4b4: fd010113 addi sp,sp,-48
4b8: 02912223 sw s1,36(sp)
uint8_t ii;
uint8_t jj;
char towrite;
write(fd , "0x", 2);
4bc: 00200613 li a2,2
{
4c0: 00058493 mv s1,a1
write(fd , "0x", 2);
4c4: 00001597 auipc a1,0x1
4c8: 65458593 addi a1,a1,1620 # 1b18 <__clzsi2+0xb4>
{
4cc: 02812423 sw s0,40(sp)
4d0: 03212023 sw s2,32(sp)
4d4: 01312e23 sw s3,28(sp)
4d8: 01412c23 sw s4,24(sp)
4dc: 01512a23 sw s5,20(sp)
4e0: 02112623 sw ra,44(sp)
4e4: 00050913 mv s2,a0
write(fd , "0x", 2);
4e8: 01c00413 li s0,28
4ec: e89ff0ef jal ra,374 <__wrap_write>
for (ii = 8 ; ii > 0; ii--) {
jj = ii - 1;
uint8_t digit = ((hex & (0xF << (jj*4))) >> (jj*4));
4f0: 00f00a93 li s5,15
towrite = digit < 0xA ? ('0' + digit) : ('A' + (digit - 0xA));
4f4: 00900a13 li s4,9
for (ii = 8 ; ii > 0; ii--) {
4f8: ffc00993 li s3,-4
4fc: 0240006f j 520 <write_hex+0x6c>
towrite = digit < 0xA ? ('0' + digit) : ('A' + (digit - 0xA));
500: 0ff6f793 zext.b a5,a3
for (ii = 8 ; ii > 0; ii--) {
504: ffc40413 addi s0,s0,-4
write(fd, &towrite, 1);
508: 00100613 li a2,1
50c: 00f10593 addi a1,sp,15
510: 00090513 mv a0,s2
towrite = digit < 0xA ? ('0' + digit) : ('A' + (digit - 0xA));
514: 00f107a3 sb a5,15(sp)
write(fd, &towrite, 1);
518: e5dff0ef jal ra,374 <__wrap_write>
for (ii = 8 ; ii > 0; ii--) {
51c: 05340063 beq s0,s3,55c <write_hex+0xa8>
uint8_t digit = ((hex & (0xF << (jj*4))) >> (jj*4));
520: 008a97b3 sll a5,s5,s0
524: 0097f7b3 and a5,a5,s1
528: 0087d7b3 srl a5,a5,s0
52c: 0ff7f793 zext.b a5,a5
towrite = digit < 0xA ? ('0' + digit) : ('A' + (digit - 0xA));
530: 03078693 addi a3,a5,48
534: 03778713 addi a4,a5,55
538: fcfa74e3 bgeu s4,a5,500 <write_hex+0x4c>
53c: 0ff77793 zext.b a5,a4
for (ii = 8 ; ii > 0; ii--) {
540: ffc40413 addi s0,s0,-4
write(fd, &towrite, 1);
544: 00100613 li a2,1
548: 00f10593 addi a1,sp,15
54c: 00090513 mv a0,s2
towrite = digit < 0xA ? ('0' + digit) : ('A' + (digit - 0xA));
550: 00f107a3 sb a5,15(sp)
write(fd, &towrite, 1);
554: e21ff0ef jal ra,374 <__wrap_write>
for (ii = 8 ; ii > 0; ii--) {
558: fd3414e3 bne s0,s3,520 <write_hex+0x6c>
}
}
55c: 02c12083 lw ra,44(sp)
560: 02812403 lw s0,40(sp)
564: 02412483 lw s1,36(sp)
568: 02012903 lw s2,32(sp)
56c: 01c12983 lw s3,28(sp)
570: 01812a03 lw s4,24(sp)
574: 01412a83 lw s5,20(sp)
578: 03010113 addi sp,sp,48
57c: 00008067 ret
00000580 <sprintf_putch>:
}
static void sprintf_putch(int ch, void** data)
{
char** pstr = (char**)data;
**pstr = ch;
580: 0005a783 lw a5,0(a1)
584: 00a78023 sb a0,0(a5)
(*pstr)++;
588: 0005a783 lw a5,0(a1)
58c: 00178793 addi a5,a5,1
590: 00f5a023 sw a5,0(a1)
}
594: 00008067 ret
00000598 <putchar>:
{
598: fe010113 addi sp,sp,-32
59c: 00a12623 sw a0,12(sp)
return write(STDOUT_FILENO, &ch, 1) == 1 ? ch : -1;
5a0: 00100613 li a2,1
5a4: 00c10593 addi a1,sp,12
5a8: 00100513 li a0,1
{
5ac: 00112e23 sw ra,28(sp)
return write(STDOUT_FILENO, &ch, 1) == 1 ? ch : -1;
5b0: dc5ff0ef jal ra,374 <__wrap_write>
5b4: 00100793 li a5,1
5b8: 00f51a63 bne a0,a5,5cc <putchar+0x34>
5bc: 00c12503 lw a0,12(sp)
}
5c0: 01c12083 lw ra,28(sp)
5c4: 02010113 addi sp,sp,32
5c8: 00008067 ret
return write(STDOUT_FILENO, &ch, 1) == 1 ? ch : -1;
5cc: fff00513 li a0,-1
5d0: ff1ff06f j 5c0 <putchar+0x28>
000005d4 <vprintfmt>:
for (char* p = buf; p < pbuf; p++)
putch(*p, putdat);
}
static void vprintfmt(void (*putch)(int, void**), void **putdat, const char *fmt, va_list ap)
{
5d4: f1010113 addi sp,sp,-240
5d8: 0d512a23 sw s5,212(sp)
5dc: 40000ab7 lui s5,0x40000
5e0: fffa8793 addi a5,s5,-1 # 3fffffff <_sp+0x2fffbfff>
5e4: 0d912223 sw s9,196(sp)
u.u &= ~(1ULL << 63);
5e8: 80000cb7 lui s9,0x80000
5ec: 00f12223 sw a5,4(sp)
5f0: fffcc793 not a5,s9
{
5f4: 0e812423 sw s0,232(sp)
5f8: 0e912223 sw s1,228(sp)
5fc: 0f212023 sw s2,224(sp)
600: 0d312e23 sw s3,220(sp)
604: 0e112623 sw ra,236(sp)
608: 0d412c23 sw s4,216(sp)
60c: 0d612823 sw s6,208(sp)
610: 0d712623 sw s7,204(sp)
614: 0d812423 sw s8,200(sp)
618: 0da12023 sw s10,192(sp)
61c: 0bb12e23 sw s11,188(sp)
620: 00050913 mv s2,a0
624: 00058493 mv s1,a1
628: 00060413 mv s0,a2
62c: 00d12023 sw a3,0(sp)
unsigned long num;
int base, lflag, width, precision, altflag;
char padc;
while (1) {
while ((ch = *(unsigned char *) fmt) != '%') {
630: 02500993 li s3,37
u.u &= ~(1ULL << 63);
634: 00f12423 sw a5,8(sp)
while ((ch = *(unsigned char *) fmt) != '%') {
638: 0140006f j 64c <vprintfmt+0x78>
if (ch == '\0')
63c: 06050263 beqz a0,6a0 <vprintfmt+0xcc>
return;
fmt++;
putch(ch, putdat);
640: 00048593 mv a1,s1
fmt++;
644: 00140413 addi s0,s0,1
putch(ch, putdat);
648: 000900e7 jalr s2
while ((ch = *(unsigned char *) fmt) != '%') {
64c: 00044503 lbu a0,0(s0)
650: ff3516e3 bne a0,s3,63c <vprintfmt+0x68>
width = -1;
precision = -1;
lflag = 0;
altflag = 0;
reswitch:
switch (ch = *(unsigned char *) fmt++) {
654: 00144683 lbu a3,1(s0)
fmt++;
658: 00140d93 addi s11,s0,1
65c: 000d8713 mv a4,s11
padc = ' ';
660: 02000b93 li s7,32
precision = -1;
664: fff00d13 li s10,-1
width = -1;
668: fff00b13 li s6,-1
switch (ch = *(unsigned char *) fmt++) {
66c: 05500593 li a1,85
case '8':
case '9':
for (precision = 0; ; ++fmt) {
precision = precision * 10 + ch - '0';
ch = *fmt;
if (ch < '0' || ch > '9')
670: 00900513 li a0,9
switch (ch = *(unsigned char *) fmt++) {
674: fdd68793 addi a5,a3,-35
678: 0ff7f793 zext.b a5,a5
67c: 00170413 addi s0,a4,1
680: 06f5ec63 bltu a1,a5,6f8 <vprintfmt+0x124>
684: 00001617 auipc a2,0x1
688: 4a060613 addi a2,a2,1184 # 1b24 <__clzsi2+0xc0>
68c: 00279793 slli a5,a5,0x2
690: 00c787b3 add a5,a5,a2
694: 0007a783 lw a5,0(a5)
698: 00c787b3 add a5,a5,a2
69c: 00078067 jr a5
putch('%', putdat);
fmt = last_fmt;
break;
}
}
}
6a0: 0ec12083 lw ra,236(sp)
6a4: 0e812403 lw s0,232(sp)
6a8: 0e412483 lw s1,228(sp)
6ac: 0e012903 lw s2,224(sp)
6b0: 0dc12983 lw s3,220(sp)
6b4: 0d812a03 lw s4,216(sp)
6b8: 0d412a83 lw s5,212(sp)
6bc: 0d012b03 lw s6,208(sp)
6c0: 0cc12b83 lw s7,204(sp)
6c4: 0c812c03 lw s8,200(sp)
6c8: 0c412c83 lw s9,196(sp)
6cc: 0c012d03 lw s10,192(sp)
6d0: 0bc12d83 lw s11,188(sp)
6d4: 0f010113 addi sp,sp,240
6d8: 00008067 ret
padc = '0';
6dc: 00068b93 mv s7,a3
goto reswitch;
6e0: 00174683 lbu a3,1(a4)
switch (ch = *(unsigned char *) fmt++) {
6e4: 00040713 mv a4,s0
6e8: 00170413 addi s0,a4,1
6ec: fdd68793 addi a5,a3,-35
6f0: 0ff7f793 zext.b a5,a5
6f4: f8f5f8e3 bgeu a1,a5,684 <vprintfmt+0xb0>
putch('%', putdat);
6f8: 00048593 mv a1,s1
6fc: 02500513 li a0,37
700: 000900e7 jalr s2
fmt = last_fmt;
704: 000d8413 mv s0,s11
break;
708: f45ff06f j 64c <vprintfmt+0x78>
ch = *fmt;
70c: 00174683 lbu a3,1(a4)
switch (ch = *(unsigned char *) fmt++) {
710: 00040713 mv a4,s0
goto reswitch;
714: f61ff06f j 674 <vprintfmt+0xa0>
ch = *fmt;
718: 00174603 lbu a2,1(a4)
precision = precision * 10 + ch - '0';
71c: fd068d13 addi s10,a3,-48
switch (ch = *(unsigned char *) fmt++) {
720: 00040713 mv a4,s0
if (ch < '0' || ch > '9')
724: fd060793 addi a5,a2,-48
ch = *fmt;
728: 00060693 mv a3,a2
if (ch < '0' || ch > '9')
72c: 02f56663 bltu a0,a5,758 <vprintfmt+0x184>
precision = precision * 10 + ch - '0';
730: 002d1793 slli a5,s10,0x2
734: 01a787b3 add a5,a5,s10
for (precision = 0; ; ++fmt) {
738: 00170713 addi a4,a4,1
precision = precision * 10 + ch - '0';
73c: 00179793 slli a5,a5,0x1
740: 00c787b3 add a5,a5,a2
ch = *fmt;
744: 00074603 lbu a2,0(a4)
precision = precision * 10 + ch - '0';
748: fd078d13 addi s10,a5,-48
if (ch < '0' || ch > '9')
74c: fd060793 addi a5,a2,-48
ch = *fmt;
750: 00060693 mv a3,a2
if (ch < '0' || ch > '9')
754: fcf57ee3 bgeu a0,a5,730 <vprintfmt+0x15c>
if (width < 0)
758: f00b5ee3 bgez s6,674 <vprintfmt+0xa0>
width = precision, precision = -1;
75c: 000d0b13 mv s6,s10
760: fff00d13 li s10,-1
764: f11ff06f j 674 <vprintfmt+0xa0>
putch(ch, putdat);
768: 00048593 mv a1,s1
76c: 02500513 li a0,37
770: 000900e7 jalr s2
break;
774: ed9ff06f j 64c <vprintfmt+0x78>
precision = va_arg(ap, int);
778: 00012783 lw a5,0(sp)
ch = *fmt;
77c: 00174683 lbu a3,1(a4)
switch (ch = *(unsigned char *) fmt++) {
780: 00040713 mv a4,s0
precision = va_arg(ap, int);
784: 0007ad03 lw s10,0(a5)
788: 00478793 addi a5,a5,4
78c: 00f12023 sw a5,0(sp)
goto process_precision;
790: fc9ff06f j 758 <vprintfmt+0x184>
switch (ch = *(unsigned char *) fmt++) {
794: 01000a93 li s5,16
return va_arg(*ap, unsigned int);
798: 00012783 lw a5,0(sp)
79c: 0007ac03 lw s8,0(a5)
7a0: 00478793 addi a5,a5,4
7a4: 00f12023 sw a5,0(sp)
digs[pos++] = num % base;
7a8: 000a8593 mv a1,s5
7ac: 000c0513 mv a0,s8
7b0: 250010ef jal ra,1a00 <__umodsi3>
7b4: 02a12823 sw a0,48(sp)
7b8: 00050d13 mv s10,a0
7bc: 03410a13 addi s4,sp,52
7c0: 00100c93 li s9,1
if (num < base)
7c4: 355c6e63 bltu s8,s5,b20 <__stack_size+0x320>
num /= base;
7c8: 000a8593 mv a1,s5
7cc: 000c0513 mv a0,s8
7d0: 1e8010ef jal ra,19b8 <__udivsi3>
digs[pos++] = num % base;
7d4: 000a8593 mv a1,s5
num /= base;
7d8: 00050c13 mv s8,a0
digs[pos++] = num % base;
7dc: 224010ef jal ra,1a00 <__umodsi3>
7e0: 00aa2023 sw a0,0(s4)
7e4: 000c8d93 mv s11,s9
7e8: 00050d13 mv s10,a0
if (num < base)
7ec: 004a0a13 addi s4,s4,4
digs[pos++] = num % base;
7f0: 001c8c93 addi s9,s9,1 # 80000001 <tohost+0x80000011>
if (num < base)
7f4: fd5c7ae3 bgeu s8,s5,7c8 <vprintfmt+0x1f4>
while (width-- > pos)
7f8: 016cdc63 bge s9,s6,810 <__stack_size+0x10>
7fc: fffb0b13 addi s6,s6,-1
putch(padc, putdat);
800: 00048593 mv a1,s1
804: 000b8513 mv a0,s7
808: 000900e7 jalr s2
while (width-- > pos)
80c: ff6cc8e3 blt s9,s6,7fc <vprintfmt+0x228>
810: 00412783 lw a5,4(sp)
814: 02c10b93 addi s7,sp,44
putch(digs[pos] + (digs[pos] >= 10 ? 'a' - 10 : '0'), putdat);
818: 00900b13 li s6,9
81c: 00fd8db3 add s11,s11,a5
820: 002d9d93 slli s11,s11,0x2
824: 03010793 addi a5,sp,48
828: 01b78db3 add s11,a5,s11
82c: 00c0006f j 838 <__stack_size+0x38>
830: 000dad03 lw s10,0(s11)
834: ffcd8d93 addi s11,s11,-4
838: 01ab37b3 sltu a5,s6,s10
83c: 40f007b3 neg a5,a5
840: 0277f793 andi a5,a5,39
844: 03078793 addi a5,a5,48
848: 00048593 mv a1,s1
84c: 01a78533 add a0,a5,s10
850: 000900e7 jalr s2
while (pos-- > 0)
854: fdbb9ee3 bne s7,s11,830 <__stack_size+0x30>
858: df5ff06f j 64c <vprintfmt+0x78>
if ((p = va_arg(ap, char *)) == NULL)
85c: 00012783 lw a5,0(sp)
860: 0007ad83 lw s11,0(a5)
864: 00478a13 addi s4,a5,4
868: 2e0d8c63 beqz s11,b60 <__stack_size+0x360>
if (width > 0 && padc != '-')
86c: 0b605263 blez s6,910 <__stack_size+0x110>
870: 02d00793 li a5,45
874: 04fb9e63 bne s7,a5,8d0 <__stack_size+0xd0>
for (; (ch = *p) != '\0' && (precision < 0 || --precision >= 0); width--) {
878: 000dc503 lbu a0,0(s11)
87c: 02050863 beqz a0,8ac <__stack_size+0xac>
880: fff00b93 li s7,-1
884: 000d4663 bltz s10,890 <__stack_size+0x90>
888: fffd0d13 addi s10,s10,-1
88c: 017d0e63 beq s10,s7,8a8 <__stack_size+0xa8>
putch(ch, putdat);
890: 00048593 mv a1,s1
p++;
894: 001d8d93 addi s11,s11,1
putch(ch, putdat);
898: 000900e7 jalr s2
for (; (ch = *p) != '\0' && (precision < 0 || --precision >= 0); width--) {
89c: 000dc503 lbu a0,0(s11)
8a0: fffb0b13 addi s6,s6,-1
8a4: fe0510e3 bnez a0,884 <__stack_size+0x84>
for (; width > 0; width--)
8a8: 01605c63 blez s6,8c0 <__stack_size+0xc0>
8ac: fffb0b13 addi s6,s6,-1
putch(' ', putdat);
8b0: 00048593 mv a1,s1
8b4: 02000513 li a0,32
8b8: 000900e7 jalr s2
for (; width > 0; width--)
8bc: fe0b18e3 bnez s6,8ac <__stack_size+0xac>
if ((p = va_arg(ap, char *)) == NULL)
8c0: 01412023 sw s4,0(sp)
8c4: d89ff06f j 64c <vprintfmt+0x78>
p = "(null)";
8c8: 00001d97 auipc s11,0x1
8cc: 254d8d93 addi s11,s11,596 # 1b1c <__clzsi2+0xb8>
while (n-- > 0 && *str) str++;
8d0: 000d8793 mv a5,s11
8d4: 01ad86b3 add a3,s11,s10
8d8: 000d1863 bnez s10,8e8 <__stack_size+0xe8>
8dc: 0200006f j 8fc <__stack_size+0xfc>
8e0: 00178793 addi a5,a5,1
8e4: 00d78663 beq a5,a3,8f0 <__stack_size+0xf0>
8e8: 0007c703 lbu a4,0(a5)
8ec: fe071ae3 bnez a4,8e0 <__stack_size+0xe0>
return str - start;
8f0: 41b787b3 sub a5,a5,s11
for (width -= strnlen(p, precision); width > 0; width--)
8f4: 40fb0b33 sub s6,s6,a5
8f8: 01605c63 blez s6,910 <__stack_size+0x110>
8fc: fffb0b13 addi s6,s6,-1
putch(padc, putdat);
900: 00048593 mv a1,s1
904: 000b8513 mv a0,s7
908: 000900e7 jalr s2
for (width -= strnlen(p, precision); width > 0; width--)
90c: fe0b18e3 bnez s6,8fc <__stack_size+0xfc>
for (; (ch = *p) != '\0' && (precision < 0 || --precision >= 0); width--) {
910: 000dc503 lbu a0,0(s11)
914: fa0506e3 beqz a0,8c0 <__stack_size+0xc0>
918: fff00b93 li s7,-1
91c: f69ff06f j 884 <__stack_size+0x84>
putch(va_arg(ap, int), putdat);
920: 00012783 lw a5,0(sp)
924: 00048593 mv a1,s1
928: 0007a503 lw a0,0(a5)
92c: 00478a13 addi s4,a5,4
930: 000900e7 jalr s2
934: 01412023 sw s4,0(sp)
break;
938: d15ff06f j 64c <vprintfmt+0x78>
return va_arg(*ap, int);
93c: 00012783 lw a5,0(sp)
940: 0007ac03 lw s8,0(a5)
944: 00478a13 addi s4,a5,4
if ((long) num < 0) {
948: 000c5a63 bgez s8,95c <__stack_size+0x15c>
putch('-', putdat);
94c: 00048593 mv a1,s1
950: 02d00513 li a0,45
954: 000900e7 jalr s2
num = -(long) num;
958: 41800c33 neg s8,s8
return va_arg(*ap, int);
95c: 01412023 sw s4,0(sp)
num = -(long) num;
960: 00a00a93 li s5,10
964: e45ff06f j 7a8 <vprintfmt+0x1d4>
print_double(putch, putdat, va_arg(ap, double), width, precision);
968: 00012783 lw a5,0(sp)
96c: 00778a13 addi s4,a5,7
970: ff8a7a13 andi s4,s4,-8
974: 004a2d83 lw s11,4(s4)
978: 000a2a83 lw s5,0(s4)
97c: 008a0793 addi a5,s4,8
980: 00f12023 sw a5,0(sp)
u.d = num;
984: 000d8713 mv a4,s11
988: 000a8693 mv a3,s5
if (u.u & (1ULL << 63)) {
98c: 1a0dc063 bltz s11,b2c <__stack_size+0x32c>
for (int i = 0; i < prec; i++)
990: 05a05263 blez s10,9d4 <__stack_size+0x1d4>
994: 0ffff797 auipc a5,0xffff
998: 66c78793 addi a5,a5,1644 # 10000000 <__DATA_BEGIN__>
u.d *= 10;
99c: 0007ab03 lw s6,0(a5)
9a0: 0047ab83 lw s7,4(a5)
for (int i = 0; i < prec; i++)
9a4: 00000a13 li s4,0
u.d *= 10;
9a8: 00068513 mv a0,a3
9ac: 00070593 mv a1,a4
9b0: 000b8693 mv a3,s7
9b4: 000b0613 mv a2,s6
9b8: 08d000ef jal ra,1244 <__muldf3>
for (int i = 0; i < prec; i++)
9bc: 001a0a13 addi s4,s4,1
u.d *= 10;
9c0: 00050a93 mv s5,a0
9c4: 00058d93 mv s11,a1
9c8: 00050693 mv a3,a0
9cc: 00058713 mv a4,a1
for (int i = 0; i < prec; i++)
9d0: fd4d1ce3 bne s10,s4,9a8 <__stack_size+0x1a8>
printnum(sprintf_putch, (void**)&pbuf, (unsigned long)u.d, 10, 0, 0);
9d4: 000d8593 mv a1,s11
9d8: 000a8513 mv a0,s5
9dc: 735000ef jal ra,1910 <__fixunsdfsi>
digs[pos++] = num % base;
9e0: 00a00593 li a1,10
printnum(sprintf_putch, (void**)&pbuf, (unsigned long)u.d, 10, 0, 0);
9e4: 00050b13 mv s6,a0
digs[pos++] = num % base;
9e8: 018010ef jal ra,1a00 <__umodsi3>
9ec: 02a12823 sw a0,48(sp)
if (num < base)
9f0: 00900793 li a5,9
9f4: 1967f663 bgeu a5,s6,b80 <__stack_size+0x380>
9f8: 03410a13 addi s4,sp,52
digs[pos++] = num % base;
9fc: 00100d93 li s11,1
if (num < base)
a00: 06300b93 li s7,99
num /= base;
a04: 00a00593 li a1,10
a08: 000b0513 mv a0,s6
a0c: 7ad000ef jal ra,19b8 <__udivsi3>
digs[pos++] = num % base;
a10: 00a00593 li a1,10
a14: 000b0a93 mv s5,s6
num /= base;
a18: 00050b13 mv s6,a0
digs[pos++] = num % base;
a1c: 7e5000ef jal ra,1a00 <__umodsi3>
a20: 00aa2023 sw a0,0(s4)
a24: 000d8613 mv a2,s11
if (num < base)
a28: 004a0a13 addi s4,s4,4
digs[pos++] = num % base;
a2c: 001d8d93 addi s11,s11,1
if (num < base)
a30: fd5beae3 bltu s7,s5,a04 <__stack_size+0x204>
a34: 03010813 addi a6,sp,48
a38: 00261713 slli a4,a2,0x2
a3c: 00e80733 add a4,a6,a4
putch(digs[pos] + (digs[pos] >= 10 ? 'a' - 10 : '0'), putdat);
a40: 01010693 addi a3,sp,16
a44: 00900893 li a7,9
a48: 00c0006f j a54 <__stack_size+0x254>
a4c: ffc72503 lw a0,-4(a4)
a50: 00058713 mv a4,a1
a54: 00a8b7b3 sltu a5,a7,a0
a58: 40f007b3 neg a5,a5
a5c: 0277f793 andi a5,a5,39
a60: 03078793 addi a5,a5,48
a64: 00a787b3 add a5,a5,a0
**pstr = ch;
a68: 0ff7f793 zext.b a5,a5
a6c: 00f68023 sb a5,0(a3)
while (pos-- > 0)
a70: ffc70593 addi a1,a4,-4
(*pstr)++;
a74: 00168693 addi a3,a3,1
while (pos-- > 0)
a78: fce81ae3 bne a6,a4,a4c <__stack_size+0x24c>
(*pstr)++;
a7c: 01160713 addi a4,a2,17
a80: 00270bb3 add s7,a4,sp
if (prec > 0) {
a84: 03a05a63 blez s10,ab8 <__stack_size+0x2b8>
a88: 000b8713 mv a4,s7
a8c: 41ab86b3 sub a3,s7,s10
a90: 0080006f j a98 <__stack_size+0x298>
pbuf[-i] = pbuf[-i-1];
a94: fff74783 lbu a5,-1(a4)
a98: 00f70023 sb a5,0(a4)
for (int i = 0; i < prec; i++) {
a9c: fff70713 addi a4,a4,-1
aa0: fed71ae3 bne a4,a3,a94 <__stack_size+0x294>
pbuf[-prec] = '.';
aa4: 41ab8bb3 sub s7,s7,s10
aa8: 02e00793 li a5,46
aac: 00fb8023 sb a5,0(s7)
pbuf++;
ab0: 01260793 addi a5,a2,18
ab4: 00278bb3 add s7,a5,sp
for (char* p = buf; p < pbuf; p++)
ab8: 01010b13 addi s6,sp,16
abc: b97b78e3 bgeu s6,s7,64c <vprintfmt+0x78>
putch(*p, putdat);
ac0: 000b4503 lbu a0,0(s6)
ac4: 00048593 mv a1,s1
for (char* p = buf; p < pbuf; p++)
ac8: 001b0b13 addi s6,s6,1
putch(*p, putdat);
acc: 000900e7 jalr s2
for (char* p = buf; p < pbuf; p++)
ad0: ff7b18e3 bne s6,s7,ac0 <__stack_size+0x2c0>
ad4: b79ff06f j 64c <vprintfmt+0x78>
putch('0', putdat);
ad8: 03000513 li a0,48
adc: 00048593 mv a1,s1
ae0: 000900e7 jalr s2
putch('x', putdat);
ae4: 00048593 mv a1,s1
ae8: 07800513 li a0,120
aec: 000900e7 jalr s2
return va_arg(*ap, unsigned long);
af0: 00012783 lw a5,0(sp)
af4: 01000a93 li s5,16
af8: 00478793 addi a5,a5,4
afc: 00f12023 sw a5,0(sp)
b00: ffc7ac03 lw s8,-4(a5)
b04: ca5ff06f j 7a8 <vprintfmt+0x1d4>
if (width < 0)
b08: fffb4793 not a5,s6
b0c: 41f7d793 srai a5,a5,0x1f
ch = *fmt;
b10: 00174683 lbu a3,1(a4)
b14: 00fb7b33 and s6,s6,a5
switch (ch = *(unsigned char *) fmt++) {
b18: 00040713 mv a4,s0
goto reswitch;
b1c: b59ff06f j 674 <vprintfmt+0xa0>
while (width-- > pos)
b20: 00000d93 li s11,0
b24: cd6ccce3 blt s9,s6,7fc <vprintfmt+0x228>
b28: ce9ff06f j 810 <__stack_size+0x10>
putch('-', putdat);
b2c: 00048593 mv a1,s1
b30: 02d00513 li a0,45
b34: 01512623 sw s5,12(sp)
b38: 000900e7 jalr s2
u.u &= ~(1ULL << 63);
b3c: 00812783 lw a5,8(sp)
printnum(sprintf_putch, (void**)&pbuf, (unsigned long)u.d, 10, 0, 0);
b40: 00c12683 lw a3,12(sp)
u.u &= ~(1ULL << 63);
b44: 01b7f733 and a4,a5,s11
printnum(sprintf_putch, (void**)&pbuf, (unsigned long)u.d, 10, 0, 0);
b48: 00070d93 mv s11,a4
b4c: e45ff06f j 990 <__stack_size+0x190>
switch (ch = *(unsigned char *) fmt++) {
b50: 00800a93 li s5,8
b54: c45ff06f j 798 <vprintfmt+0x1c4>
b58: 00a00a93 li s5,10
b5c: c3dff06f j 798 <vprintfmt+0x1c4>
if (width > 0 && padc != '-')
b60: 01605663 blez s6,b6c <__stack_size+0x36c>
b64: 02d00793 li a5,45
b68: d6fb90e3 bne s7,a5,8c8 <__stack_size+0xc8>
b6c: 00001d97 auipc s11,0x1
b70: fb0d8d93 addi s11,s11,-80 # 1b1c <__clzsi2+0xb8>
for (; (ch = *p) != '\0' && (precision < 0 || --precision >= 0); width--) {
b74: 02800513 li a0,40
b78: fff00b93 li s7,-1
b7c: d09ff06f j 884 <__stack_size+0x84>
while (pos-- > 0)
b80: 00000613 li a2,0
b84: eb1ff06f j a34 <__stack_size+0x234>
00000b88 <strnlen>:
while (n-- > 0 && *str) str++;
b88: 00b506b3 add a3,a0,a1
b8c: 00050793 mv a5,a0
b90: 00059863 bnez a1,ba0 <strnlen+0x18>
b94: 0240006f j bb8 <strnlen+0x30>
b98: 00178793 addi a5,a5,1
b9c: 00f68a63 beq a3,a5,bb0 <strnlen+0x28>
ba0: 0007c703 lbu a4,0(a5)
ba4: fe071ae3 bnez a4,b98 <strnlen+0x10>
return str - start;
ba8: 40a78533 sub a0,a5,a0
}
bac: 00008067 ret
return str - start;
bb0: 40a68533 sub a0,a3,a0
bb4: 00008067 ret
while (n-- > 0 && *str) str++;
bb8: 00000513 li a0,0
bbc: 00008067 ret
00000bc0 <__wrap_printf>:
int __wrap_printf(const char* fmt, ...)
{
bc0: fc010113 addi sp,sp,-64
va_list ap;
va_start(ap, fmt);
bc4: 02410313 addi t1,sp,36
{
bc8: 00050e13 mv t3,a0
bcc: 02b12223 sw a1,36(sp)
bd0: 02c12423 sw a2,40(sp)
bd4: 02d12623 sw a3,44(sp)
vprintfmt((void*)putchar, 0, fmt, ap);
bd8: 00000517 auipc a0,0x0
bdc: 9c050513 addi a0,a0,-1600 # 598 <putchar>
be0: 00030693 mv a3,t1
be4: 000e0613 mv a2,t3
be8: 00000593 li a1,0
{
bec: 00112e23 sw ra,28(sp)
bf0: 02e12823 sw a4,48(sp)
bf4: 02f12a23 sw a5,52(sp)
bf8: 03012c23 sw a6,56(sp)
bfc: 03112e23 sw a7,60(sp)
va_start(ap, fmt);
c00: 00612623 sw t1,12(sp)
vprintfmt((void*)putchar, 0, fmt, ap);
c04: 9d1ff0ef jal ra,5d4 <vprintfmt>
va_end(ap);
return 0; // incorrect return value, but who cares, anyway?
}
c08: 01c12083 lw ra,28(sp)
c0c: 00000513 li a0,0
c10: 04010113 addi sp,sp,64
c14: 00008067 ret
00000c18 <__wrap_sprintf>:
int __wrap_sprintf(char* str, const char* fmt, ...)
{
c18: fb010113 addi sp,sp,-80
va_list ap;
char* str0 = str;
va_start(ap, fmt);
c1c: 03810313 addi t1,sp,56
{
c20: 02812423 sw s0,40(sp)
c24: 00a12623 sw a0,12(sp)
c28: 02c12c23 sw a2,56(sp)
c2c: 02d12e23 sw a3,60(sp)
char* str0 = str;
c30: 00050413 mv s0,a0
vprintfmt(sprintf_putch, (void**)&str, fmt, ap);
c34: 00058613 mv a2,a1
c38: 00000517 auipc a0,0x0
c3c: 94850513 addi a0,a0,-1720 # 580 <sprintf_putch>
c40: 00c10593 addi a1,sp,12
c44: 00030693 mv a3,t1
{
c48: 02112623 sw ra,44(sp)
c4c: 04f12223 sw a5,68(sp)
c50: 04e12023 sw a4,64(sp)
c54: 05012423 sw a6,72(sp)
c58: 05112623 sw a7,76(sp)
va_start(ap, fmt);
c5c: 00612e23 sw t1,28(sp)
vprintfmt(sprintf_putch, (void**)&str, fmt, ap);
c60: 975ff0ef jal ra,5d4 <vprintfmt>
*str = 0;
c64: 00c12783 lw a5,12(sp)
c68: 00078023 sb zero,0(a5)
va_end(ap);
return str - str0;
c6c: 00c12503 lw a0,12(sp)
}
c70: 02c12083 lw ra,44(sp)
c74: 40850533 sub a0,a0,s0
c78: 02812403 lw s0,40(sp)
c7c: 05010113 addi sp,sp,80
c80: 00008067 ret
00000c84 <__udivdi3>:
#endif
#ifdef L_udivdi3
UDWtype
__udivdi3 (UDWtype n, UDWtype d)
{
c84: fd010113 addi sp,sp,-48
c88: 01312e23 sw s3,28(sp)
c8c: 02112623 sw ra,44(sp)
c90: 02812423 sw s0,40(sp)
c94: 02912223 sw s1,36(sp)
c98: 03212023 sw s2,32(sp)
c9c: 01412c23 sw s4,24(sp)
ca0: 01512a23 sw s5,20(sp)
ca4: 01612823 sw s6,16(sp)
ca8: 01712623 sw s7,12(sp)
cac: 01812423 sw s8,8(sp)
cb0: 01912223 sw s9,4(sp)
cb4: 00050993 mv s3,a0
if (d1 == 0)
cb8: 38069463 bnez a3,1040 <__udivdi3+0x3bc>
cbc: 000027b7 lui a5,0x2
cc0: 00060a13 mv s4,a2
cc4: 00050493 mv s1,a0
if (d0 > n1)
cc8: c7c78793 addi a5,a5,-900 # 1c7c <__clz_tab>
ccc: 12c5f863 bgeu a1,a2,dfc <__udivdi3+0x178>
count_leading_zeros (bm, d0);
cd0: 00010737 lui a4,0x10
cd4: 00058913 mv s2,a1
cd8: 10e67863 bgeu a2,a4,de8 <__udivdi3+0x164>
cdc: 10063713 sltiu a4,a2,256
ce0: 00174713 xori a4,a4,1
ce4: 00371713 slli a4,a4,0x3
ce8: 00e656b3 srl a3,a2,a4
cec: 00d787b3 add a5,a5,a3
cf0: 0007c783 lbu a5,0(a5)
cf4: 02000693 li a3,32
cf8: 00e787b3 add a5,a5,a4
cfc: 40f68733 sub a4,a3,a5
if (bm != 0)
d00: 00f68c63 beq a3,a5,d18 <__udivdi3+0x94>
n1 = (n1 << bm) | (n0 >> (W_TYPE_SIZE - bm));
d04: 00e59933 sll s2,a1,a4
d08: 00f9d7b3 srl a5,s3,a5
d0 = d0 << bm;
d0c: 00e61a33 sll s4,a2,a4
n1 = (n1 << bm) | (n0 >> (W_TYPE_SIZE - bm));
d10: 0127e933 or s2,a5,s2
n0 = n0 << bm;
d14: 00e994b3 sll s1,s3,a4
udiv_qrnnd (q0, n0, n1, n0, d0);
d18: 010a5a93 srli s5,s4,0x10
d1c: 000a8593 mv a1,s5
d20: 00090513 mv a0,s2
d24: 010a1b13 slli s6,s4,0x10
d28: 491000ef jal ra,19b8 <__udivsi3>
d2c: 010b5b13 srli s6,s6,0x10
d30: 00050593 mv a1,a0
d34: 00050993 mv s3,a0
d38: 000b0513 mv a0,s6
d3c: 451000ef jal ra,198c <__mulsi3>
d40: 00050413 mv s0,a0
d44: 000a8593 mv a1,s5
d48: 00090513 mv a0,s2
d4c: 4b5000ef jal ra,1a00 <__umodsi3>
d50: 01051513 slli a0,a0,0x10
d54: 0104d713 srli a4,s1,0x10
d58: 00a76733 or a4,a4,a0
d5c: 00098913 mv s2,s3
d60: 00877e63 bgeu a4,s0,d7c <__udivdi3+0xf8>
d64: 01470733 add a4,a4,s4
d68: fff98913 addi s2,s3,-1
d6c: 01476863 bltu a4,s4,d7c <__udivdi3+0xf8>
d70: 00877663 bgeu a4,s0,d7c <__udivdi3+0xf8>
d74: ffe98913 addi s2,s3,-2
d78: 01470733 add a4,a4,s4
d7c: 40870433 sub s0,a4,s0
d80: 000a8593 mv a1,s5
d84: 00040513 mv a0,s0
d88: 431000ef jal ra,19b8 <__udivsi3>
d8c: 00050593 mv a1,a0
d90: 00050993 mv s3,a0
d94: 000b0513 mv a0,s6
d98: 3f5000ef jal ra,198c <__mulsi3>
d9c: 00050b13 mv s6,a0
da0: 000a8593 mv a1,s5
da4: 00040513 mv a0,s0
da8: 459000ef jal ra,1a00 <__umodsi3>
dac: 01049713 slli a4,s1,0x10
db0: 01051513 slli a0,a0,0x10
db4: 01075713 srli a4,a4,0x10
db8: 00a76733 or a4,a4,a0
dbc: 00098693 mv a3,s3
dc0: 01677c63 bgeu a4,s6,dd8 <__udivdi3+0x154>
dc4: 00ea0733 add a4,s4,a4
dc8: fff98693 addi a3,s3,-1
dcc: 01476663 bltu a4,s4,dd8 <__udivdi3+0x154>
dd0: 01677463 bgeu a4,s6,dd8 <__udivdi3+0x154>
dd4: ffe98693 addi a3,s3,-2
dd8: 01091793 slli a5,s2,0x10
ddc: 00d7e7b3 or a5,a5,a3
q1 = 0;
de0: 00000913 li s2,0
de4: 1200006f j f04 <__udivdi3+0x280>
count_leading_zeros (bm, d0);
de8: 010006b7 lui a3,0x1000
dec: 01000713 li a4,16
df0: eed66ce3 bltu a2,a3,ce8 <__udivdi3+0x64>
df4: 01800713 li a4,24
df8: ef1ff06f j ce8 <__udivdi3+0x64>
if (d0 == 0)
dfc: 00061463 bnez a2,e04 <__udivdi3+0x180>
d0 = 1 / d0; /* Divide intentionally by zero. */
e00: 00100073 ebreak
count_leading_zeros (bm, d0);
e04: 00010737 lui a4,0x10
e08: 12e67c63 bgeu a2,a4,f40 <__udivdi3+0x2bc>
e0c: 10063713 sltiu a4,a2,256
e10: 00174713 xori a4,a4,1
e14: 00371713 slli a4,a4,0x3
e18: 00e656b3 srl a3,a2,a4
e1c: 00d787b3 add a5,a5,a3
e20: 0007c783 lbu a5,0(a5)
e24: 02000693 li a3,32
e28: 00e787b3 add a5,a5,a4
e2c: 40f68733 sub a4,a3,a5
if (bm == 0)
e30: 12f69263 bne a3,a5,f54 <__udivdi3+0x2d0>
n1 -= d0;
e34: 40c589b3 sub s3,a1,a2
q1 = 1;
e38: 00100913 li s2,1
udiv_qrnnd (q0, n0, n1, n0, d0);
e3c: 010a5b13 srli s6,s4,0x10
e40: 000b0593 mv a1,s6
e44: 00098513 mv a0,s3
e48: 010a1b93 slli s7,s4,0x10
e4c: 36d000ef jal ra,19b8 <__udivsi3>
e50: 010bdb93 srli s7,s7,0x10
e54: 00050593 mv a1,a0
e58: 00050c13 mv s8,a0
e5c: 000b8513 mv a0,s7
e60: 32d000ef jal ra,198c <__mulsi3>
e64: 00050a93 mv s5,a0
e68: 000b0593 mv a1,s6
e6c: 00098513 mv a0,s3
e70: 391000ef jal ra,1a00 <__umodsi3>
e74: 01051513 slli a0,a0,0x10
e78: 0104d713 srli a4,s1,0x10
e7c: 00a76733 or a4,a4,a0
e80: 000c0993 mv s3,s8
e84: 01577e63 bgeu a4,s5,ea0 <__udivdi3+0x21c>
e88: 01470733 add a4,a4,s4
e8c: fffc0993 addi s3,s8,-1
e90: 01476863 bltu a4,s4,ea0 <__udivdi3+0x21c>
e94: 01577663 bgeu a4,s5,ea0 <__udivdi3+0x21c>
e98: ffec0993 addi s3,s8,-2
e9c: 01470733 add a4,a4,s4
ea0: 41570433 sub s0,a4,s5
ea4: 000b0593 mv a1,s6
ea8: 00040513 mv a0,s0
eac: 30d000ef jal ra,19b8 <__udivsi3>
eb0: 00050593 mv a1,a0
eb4: 00050a93 mv s5,a0
eb8: 000b8513 mv a0,s7
ebc: 2d1000ef jal ra,198c <__mulsi3>
ec0: 00050b93 mv s7,a0
ec4: 000b0593 mv a1,s6
ec8: 00040513 mv a0,s0
ecc: 335000ef jal ra,1a00 <__umodsi3>
ed0: 01049713 slli a4,s1,0x10
ed4: 01051513 slli a0,a0,0x10
ed8: 01075713 srli a4,a4,0x10
edc: 00a76733 or a4,a4,a0
ee0: 000a8693 mv a3,s5
ee4: 01777c63 bgeu a4,s7,efc <__udivdi3+0x278>
ee8: 00ea0733 add a4,s4,a4
eec: fffa8693 addi a3,s5,-1
ef0: 01476663 bltu a4,s4,efc <__udivdi3+0x278>
ef4: 01777463 bgeu a4,s7,efc <__udivdi3+0x278>
ef8: ffea8693 addi a3,s5,-2
efc: 01099793 slli a5,s3,0x10
f00: 00d7e7b3 or a5,a5,a3
return __udivmoddi4 (n, d, (UDWtype *) 0);
}
f04: 02c12083 lw ra,44(sp)
f08: 02812403 lw s0,40(sp)
f0c: 02412483 lw s1,36(sp)
f10: 01c12983 lw s3,28(sp)
f14: 01812a03 lw s4,24(sp)
f18: 01412a83 lw s5,20(sp)
f1c: 01012b03 lw s6,16(sp)
f20: 00c12b83 lw s7,12(sp)
f24: 00812c03 lw s8,8(sp)
f28: 00412c83 lw s9,4(sp)
f2c: 00090593 mv a1,s2
f30: 00078513 mv a0,a5
f34: 02012903 lw s2,32(sp)
f38: 03010113 addi sp,sp,48
f3c: 00008067 ret
count_leading_zeros (bm, d0);
f40: 010006b7 lui a3,0x1000
f44: 01000713 li a4,16
f48: ecd668e3 bltu a2,a3,e18 <__udivdi3+0x194>
f4c: 01800713 li a4,24
f50: ec9ff06f j e18 <__udivdi3+0x194>
d0 = d0 << bm;
f54: 00e61a33 sll s4,a2,a4
n2 = n1 >> b;
f58: 00f5d933 srl s2,a1,a5
udiv_qrnnd (q1, n1, n2, n1, d0);
f5c: 010a5b93 srli s7,s4,0x10
n1 = (n1 << bm) | (n0 >> b);
f60: 00e595b3 sll a1,a1,a4
f64: 00f9d7b3 srl a5,s3,a5
f68: 00b7eab3 or s5,a5,a1
n0 = n0 << bm;
f6c: 00e994b3 sll s1,s3,a4
udiv_qrnnd (q1, n1, n2, n1, d0);
f70: 000b8593 mv a1,s7
f74: 00090513 mv a0,s2
f78: 010a1993 slli s3,s4,0x10
f7c: 23d000ef jal ra,19b8 <__udivsi3>
f80: 0109d993 srli s3,s3,0x10
f84: 00050593 mv a1,a0
f88: 00050b13 mv s6,a0
f8c: 00098513 mv a0,s3
f90: 1fd000ef jal ra,198c <__mulsi3>
f94: 00050413 mv s0,a0
f98: 000b8593 mv a1,s7
f9c: 00090513 mv a0,s2
fa0: 261000ef jal ra,1a00 <__umodsi3>
fa4: 01051513 slli a0,a0,0x10
fa8: 010ad713 srli a4,s5,0x10
fac: 00a76733 or a4,a4,a0
fb0: 000b0913 mv s2,s6
fb4: 00877e63 bgeu a4,s0,fd0 <__udivdi3+0x34c>
fb8: 01470733 add a4,a4,s4
fbc: fffb0913 addi s2,s6,-1
fc0: 01476863 bltu a4,s4,fd0 <__udivdi3+0x34c>
fc4: 00877663 bgeu a4,s0,fd0 <__udivdi3+0x34c>
fc8: ffeb0913 addi s2,s6,-2
fcc: 01470733 add a4,a4,s4
fd0: 40870433 sub s0,a4,s0
fd4: 000b8593 mv a1,s7
fd8: 00040513 mv a0,s0
fdc: 1dd000ef jal ra,19b8 <__udivsi3>
fe0: 00050593 mv a1,a0
fe4: 00050b13 mv s6,a0
fe8: 00098513 mv a0,s3
fec: 1a1000ef jal ra,198c <__mulsi3>
ff0: 00050993 mv s3,a0
ff4: 000b8593 mv a1,s7
ff8: 00040513 mv a0,s0
ffc: 205000ef jal ra,1a00 <__umodsi3>
1000: 010a9793 slli a5,s5,0x10
1004: 01051513 slli a0,a0,0x10
1008: 0107d793 srli a5,a5,0x10
100c: 00a7e7b3 or a5,a5,a0
1010: 000b0713 mv a4,s6
1014: 0137fe63 bgeu a5,s3,1030 <__udivdi3+0x3ac>
1018: 014787b3 add a5,a5,s4
101c: fffb0713 addi a4,s6,-1
1020: 0147e863 bltu a5,s4,1030 <__udivdi3+0x3ac>
1024: 0137f663 bgeu a5,s3,1030 <__udivdi3+0x3ac>
1028: ffeb0713 addi a4,s6,-2
102c: 014787b3 add a5,a5,s4
1030: 01091913 slli s2,s2,0x10
1034: 413789b3 sub s3,a5,s3
1038: 00e96933 or s2,s2,a4
103c: e01ff06f j e3c <__udivdi3+0x1b8>
if (d1 > n1)
1040: 1ed5ec63 bltu a1,a3,1238 <__udivdi3+0x5b4>
count_leading_zeros (bm, d1);
1044: 000107b7 lui a5,0x10
1048: 04f6f463 bgeu a3,a5,1090 <__udivdi3+0x40c>
104c: 1006b513 sltiu a0,a3,256
1050: 00154513 xori a0,a0,1
1054: 00351513 slli a0,a0,0x3
1058: 000027b7 lui a5,0x2
105c: 00a6d733 srl a4,a3,a0
1060: c7c78793 addi a5,a5,-900 # 1c7c <__clz_tab>
1064: 00e787b3 add a5,a5,a4
1068: 0007c703 lbu a4,0(a5)
106c: 02000793 li a5,32
1070: 00a70733 add a4,a4,a0
1074: 40e78933 sub s2,a5,a4
if (bm == 0)
1078: 02e79663 bne a5,a4,10a4 <__udivdi3+0x420>
q0 = 1;
107c: 00100793 li a5,1
if (n1 > d1 || n0 >= d0)
1080: e8b6e2e3 bltu a3,a1,f04 <__udivdi3+0x280>
1084: 00c9b7b3 sltu a5,s3,a2
1088: 0017c793 xori a5,a5,1
108c: e79ff06f j f04 <__udivdi3+0x280>
count_leading_zeros (bm, d1);
1090: 010007b7 lui a5,0x1000
1094: 01000513 li a0,16
1098: fcf6e0e3 bltu a3,a5,1058 <__udivdi3+0x3d4>
109c: 01800513 li a0,24
10a0: fb9ff06f j 1058 <__udivdi3+0x3d4>
d1 = (d1 << bm) | (d0 >> b);
10a4: 012696b3 sll a3,a3,s2
10a8: 00e65b33 srl s6,a2,a4
10ac: 00db6b33 or s6,s6,a3
n2 = n1 >> b;
10b0: 00e5da33 srl s4,a1,a4
udiv_qrnnd (q0, n1, n2, n1, d1);
10b4: 010b5c13 srli s8,s6,0x10
n1 = (n1 << bm) | (n0 >> b);
10b8: 00e9d733 srl a4,s3,a4
10bc: 012595b3 sll a1,a1,s2
10c0: 00b76ab3 or s5,a4,a1
udiv_qrnnd (q0, n1, n2, n1, d1);
10c4: 000a0513 mv a0,s4
10c8: 000c0593 mv a1,s8
10cc: 010b1b93 slli s7,s6,0x10
d0 = d0 << bm;
10d0: 012614b3 sll s1,a2,s2
udiv_qrnnd (q0, n1, n2, n1, d1);
10d4: 010bdb93 srli s7,s7,0x10
10d8: 0e1000ef jal ra,19b8 <__udivsi3>
10dc: 00050593 mv a1,a0
10e0: 00050c93 mv s9,a0
10e4: 000b8513 mv a0,s7
10e8: 0a5000ef jal ra,198c <__mulsi3>
10ec: 00050413 mv s0,a0
10f0: 000c0593 mv a1,s8
10f4: 000a0513 mv a0,s4
10f8: 109000ef jal ra,1a00 <__umodsi3>
10fc: 01051513 slli a0,a0,0x10
1100: 010ad693 srli a3,s5,0x10
1104: 00a6e6b3 or a3,a3,a0
1108: 000c8a13 mv s4,s9
110c: 0086fe63 bgeu a3,s0,1128 <__udivdi3+0x4a4>
1110: 016686b3 add a3,a3,s6
1114: fffc8a13 addi s4,s9,-1
1118: 0166e863 bltu a3,s6,1128 <__udivdi3+0x4a4>
111c: 0086f663 bgeu a3,s0,1128 <__udivdi3+0x4a4>
1120: ffec8a13 addi s4,s9,-2
1124: 016686b3 add a3,a3,s6
1128: 40868433 sub s0,a3,s0
112c: 000c0593 mv a1,s8
1130: 00040513 mv a0,s0
1134: 085000ef jal ra,19b8 <__udivsi3>
1138: 00050593 mv a1,a0
113c: 00050c93 mv s9,a0
1140: 000b8513 mv a0,s7
1144: 049000ef jal ra,198c <__mulsi3>
1148: 00050b93 mv s7,a0
114c: 000c0593 mv a1,s8
1150: 00040513 mv a0,s0
1154: 0ad000ef jal ra,1a00 <__umodsi3>
1158: 010a9713 slli a4,s5,0x10
115c: 01051513 slli a0,a0,0x10
1160: 01075713 srli a4,a4,0x10
1164: 00a76733 or a4,a4,a0
1168: 000c8693 mv a3,s9
116c: 01777e63 bgeu a4,s7,1188 <__udivdi3+0x504>
1170: 01670733 add a4,a4,s6
1174: fffc8693 addi a3,s9,-1
1178: 01676863 bltu a4,s6,1188 <__udivdi3+0x504>
117c: 01777663 bgeu a4,s7,1188 <__udivdi3+0x504>
1180: ffec8693 addi a3,s9,-2
1184: 01670733 add a4,a4,s6
1188: 010a1793 slli a5,s4,0x10
umul_ppmm (m1, m0, q0, d0);
118c: 00010e37 lui t3,0x10
udiv_qrnnd (q0, n1, n2, n1, d1);
1190: 00d7e7b3 or a5,a5,a3
umul_ppmm (m1, m0, q0, d0);
1194: fffe0313 addi t1,t3,-1 # ffff <_data_lma+0xe223>
udiv_qrnnd (q0, n1, n2, n1, d1);
1198: 41770833 sub a6,a4,s7
umul_ppmm (m1, m0, q0, d0);
119c: 0067f733 and a4,a5,t1
11a0: 0064f333 and t1,s1,t1
11a4: 0107de93 srli t4,a5,0x10
11a8: 0104d493 srli s1,s1,0x10
11ac: 00070513 mv a0,a4
11b0: 00030593 mv a1,t1
11b4: 7d8000ef jal ra,198c <__mulsi3>
11b8: 00050893 mv a7,a0
11bc: 00048593 mv a1,s1
11c0: 00070513 mv a0,a4
11c4: 7c8000ef jal ra,198c <__mulsi3>
11c8: 00050713 mv a4,a0
11cc: 00030593 mv a1,t1
11d0: 000e8513 mv a0,t4
11d4: 7b8000ef jal ra,198c <__mulsi3>
11d8: 00050313 mv t1,a0
11dc: 00048593 mv a1,s1
11e0: 000e8513 mv a0,t4
11e4: 7a8000ef jal ra,198c <__mulsi3>
11e8: 00670733 add a4,a4,t1
11ec: 0108d693 srli a3,a7,0x10
11f0: 00d70733 add a4,a4,a3
11f4: 00677463 bgeu a4,t1,11fc <__udivdi3+0x578>
11f8: 01c50533 add a0,a0,t3
11fc: 01075693 srli a3,a4,0x10
1200: 00a686b3 add a3,a3,a0
if (m1 > n1 || (m1 == n1 && m0 > n0))
1204: 02d86663 bltu a6,a3,1230 <__udivdi3+0x5ac>
1208: bcd81ce3 bne a6,a3,de0 <__udivdi3+0x15c>
umul_ppmm (m1, m0, q0, d0);
120c: 00010637 lui a2,0x10
1210: fff60613 addi a2,a2,-1 # ffff <_data_lma+0xe223>
1214: 00c77733 and a4,a4,a2
1218: 01071713 slli a4,a4,0x10
121c: 00c8f8b3 and a7,a7,a2
n0 = n0 << bm;
1220: 012996b3 sll a3,s3,s2
umul_ppmm (m1, m0, q0, d0);
1224: 01170733 add a4,a4,a7
q1 = 0;
1228: 00000913 li s2,0
if (m1 > n1 || (m1 == n1 && m0 > n0))
122c: cce6fce3 bgeu a3,a4,f04 <__udivdi3+0x280>
q0--;
1230: fff78793 addi a5,a5,-1 # ffffff <_data_lma+0xffe223>
sub_ddmmss (m1, m0, m1, m0, d1, d0);
1234: badff06f j de0 <__udivdi3+0x15c>
q1 = 0;
1238: 00000913 li s2,0
q0 = 0;
123c: 00000793 li a5,0
1240: cc5ff06f j f04 <__udivdi3+0x280>
00001244 <__muldf3>:
#include "soft-fp.h"
#include "double.h"
DFtype
__muldf3 (DFtype a, DFtype b)
{
1244: fd010113 addi sp,sp,-48
1248: 01312e23 sw s3,28(sp)
FP_DECL_D (B);
FP_DECL_D (R);
DFtype r;
FP_INIT_ROUNDMODE;
FP_UNPACK_D (A, a);
124c: 0145d993 srli s3,a1,0x14
{
1250: 02812423 sw s0,40(sp)
1254: 02912223 sw s1,36(sp)
1258: 01412c23 sw s4,24(sp)
125c: 01512a23 sw s5,20(sp)
1260: 01712623 sw s7,12(sp)
FP_UNPACK_D (A, a);
1264: 00c59493 slli s1,a1,0xc
{
1268: 02112623 sw ra,44(sp)
126c: 03212023 sw s2,32(sp)
1270: 01612823 sw s6,16(sp)
FP_UNPACK_D (A, a);
1274: 7ff9f993 andi s3,s3,2047
{
1278: 00050413 mv s0,a0
127c: 00060b93 mv s7,a2
1280: 00068a13 mv s4,a3
FP_UNPACK_D (A, a);
1284: 00c4d493 srli s1,s1,0xc
1288: 01f5da93 srli s5,a1,0x1f
128c: 3c098863 beqz s3,165c <__muldf3+0x418>
1290: 7ff00793 li a5,2047
1294: 42f98663 beq s3,a5,16c0 <__muldf3+0x47c>
1298: 00349493 slli s1,s1,0x3
129c: 01d55793 srli a5,a0,0x1d
12a0: 0097e7b3 or a5,a5,s1
12a4: 008004b7 lui s1,0x800
12a8: 0097e4b3 or s1,a5,s1
12ac: 00351913 slli s2,a0,0x3
12b0: c0198993 addi s3,s3,-1023
12b4: 00000b13 li s6,0
FP_UNPACK_D (B, b);
12b8: 014a5713 srli a4,s4,0x14
12bc: 00ca1413 slli s0,s4,0xc
12c0: 7ff77713 andi a4,a4,2047
12c4: 00c45413 srli s0,s0,0xc
12c8: 01fa5a13 srli s4,s4,0x1f
12cc: 42070663 beqz a4,16f8 <__muldf3+0x4b4>
12d0: 7ff00793 li a5,2047
12d4: 48f70663 beq a4,a5,1760 <__muldf3+0x51c>
12d8: 00341413 slli s0,s0,0x3
12dc: 01dbd793 srli a5,s7,0x1d
12e0: 0087e7b3 or a5,a5,s0
12e4: 00800437 lui s0,0x800
12e8: 0087e433 or s0,a5,s0
12ec: c0170713 addi a4,a4,-1023 # fc01 <_data_lma+0xde25>
12f0: 003b9793 slli a5,s7,0x3
12f4: 00000613 li a2,0
FP_MUL_D (R, A, B);
12f8: 00e989b3 add s3,s3,a4
12fc: 002b1713 slli a4,s6,0x2
1300: 00c76733 or a4,a4,a2
1304: 00a00693 li a3,10
1308: 014ac833 xor a6,s5,s4
130c: 00198893 addi a7,s3,1
1310: 4ce6c863 blt a3,a4,17e0 <__muldf3+0x59c>
1314: 00200693 li a3,2
1318: 48e6c063 blt a3,a4,1798 <__muldf3+0x554>
131c: fff70713 addi a4,a4,-1
1320: 00100693 li a3,1
1324: 48e6fc63 bgeu a3,a4,17bc <__muldf3+0x578>
1328: 00010a37 lui s4,0x10
132c: fffa0393 addi t2,s4,-1 # ffff <_data_lma+0xe223>
1330: 0107d293 srli t0,a5,0x10
1334: 00797e33 and t3,s2,t2
1338: 0077f7b3 and a5,a5,t2
133c: 01095f93 srli t6,s2,0x10
1340: 000e0513 mv a0,t3
1344: 00078593 mv a1,a5
1348: 644000ef jal ra,198c <__mulsi3>
134c: 00050e93 mv t4,a0
1350: 00028593 mv a1,t0
1354: 000e0513 mv a0,t3
1358: 634000ef jal ra,198c <__mulsi3>
135c: 00050713 mv a4,a0
1360: 00078593 mv a1,a5
1364: 000f8513 mv a0,t6
1368: 624000ef jal ra,198c <__mulsi3>
136c: 00050913 mv s2,a0
1370: 00028593 mv a1,t0
1374: 000f8513 mv a0,t6
1378: 614000ef jal ra,198c <__mulsi3>
137c: 010ed313 srli t1,t4,0x10
1380: 01270733 add a4,a4,s2
1384: 00e30333 add t1,t1,a4
1388: 00050f13 mv t5,a0
138c: 01237463 bgeu t1,s2,1394 <__muldf3+0x150>
1390: 01450f33 add t5,a0,s4
1394: 01035913 srli s2,t1,0x10
1398: 00737333 and t1,t1,t2
139c: 007efeb3 and t4,t4,t2
13a0: 01031313 slli t1,t1,0x10
13a4: 007473b3 and t2,s0,t2
13a8: 01d30333 add t1,t1,t4
13ac: 01045a13 srli s4,s0,0x10
13b0: 000e0513 mv a0,t3
13b4: 00038593 mv a1,t2
13b8: 5d4000ef jal ra,198c <__mulsi3>
13bc: 00050e93 mv t4,a0
13c0: 000a0593 mv a1,s4
13c4: 000e0513 mv a0,t3
13c8: 5c4000ef jal ra,198c <__mulsi3>
13cc: 00050e13 mv t3,a0
13d0: 00038593 mv a1,t2
13d4: 000f8513 mv a0,t6
13d8: 5b4000ef jal ra,198c <__mulsi3>
13dc: 00050413 mv s0,a0
13e0: 000a0593 mv a1,s4
13e4: 000f8513 mv a0,t6
13e8: 5a4000ef jal ra,198c <__mulsi3>
13ec: 010ed713 srli a4,t4,0x10
13f0: 008e0e33 add t3,t3,s0
13f4: 01c70733 add a4,a4,t3
13f8: 00050693 mv a3,a0
13fc: 00877663 bgeu a4,s0,1408 <__muldf3+0x1c4>
1400: 00010637 lui a2,0x10
1404: 00c506b3 add a3,a0,a2
1408: 00010b37 lui s6,0x10
140c: fffb0e13 addi t3,s6,-1 # ffff <_data_lma+0xe223>
1410: 01075f93 srli t6,a4,0x10
1414: 01c77733 and a4,a4,t3
1418: 01071713 slli a4,a4,0x10
141c: 01cefeb3 and t4,t4,t3
1420: 01d70eb3 add t4,a4,t4
1424: 01c4fe33 and t3,s1,t3
1428: 00df8fb3 add t6,t6,a3
142c: 01d90933 add s2,s2,t4
1430: 0104da93 srli s5,s1,0x10
1434: 000e0513 mv a0,t3
1438: 00078593 mv a1,a5
143c: 550000ef jal ra,198c <__mulsi3>
1440: 00050413 mv s0,a0
1444: 00028593 mv a1,t0
1448: 000e0513 mv a0,t3
144c: 540000ef jal ra,198c <__mulsi3>
1450: 00050493 mv s1,a0
1454: 00078593 mv a1,a5
1458: 000a8513 mv a0,s5
145c: 530000ef jal ra,198c <__mulsi3>
1460: 00050b93 mv s7,a0
1464: 00028593 mv a1,t0
1468: 000a8513 mv a0,s5
146c: 520000ef jal ra,198c <__mulsi3>
1470: 01045793 srli a5,s0,0x10
1474: 017484b3 add s1,s1,s7
1478: 009787b3 add a5,a5,s1
147c: 00050713 mv a4,a0
1480: 0177f463 bgeu a5,s7,1488 <__muldf3+0x244>
1484: 01650733 add a4,a0,s6
1488: 000104b7 lui s1,0x10
148c: fff48693 addi a3,s1,-1 # ffff <_data_lma+0xe223>
1490: 0107d293 srli t0,a5,0x10
1494: 00e282b3 add t0,t0,a4
1498: 00d7f733 and a4,a5,a3
149c: 00d47433 and s0,s0,a3
14a0: 01071713 slli a4,a4,0x10
14a4: 00870733 add a4,a4,s0
14a8: 000e0513 mv a0,t3
14ac: 00038593 mv a1,t2
14b0: 4dc000ef jal ra,198c <__mulsi3>
14b4: 00050413 mv s0,a0
14b8: 000a0593 mv a1,s4
14bc: 000e0513 mv a0,t3
14c0: 4cc000ef jal ra,198c <__mulsi3>
14c4: 00050e13 mv t3,a0
14c8: 00038593 mv a1,t2
14cc: 000a8513 mv a0,s5
14d0: 4bc000ef jal ra,198c <__mulsi3>
14d4: 00050393 mv t2,a0
14d8: 000a0593 mv a1,s4
14dc: 000a8513 mv a0,s5
14e0: 4ac000ef jal ra,198c <__mulsi3>
14e4: 01045793 srli a5,s0,0x10
14e8: 007e0e33 add t3,t3,t2
14ec: 01c78e33 add t3,a5,t3
14f0: 00050593 mv a1,a0
14f4: 007e7463 bgeu t3,t2,14fc <__muldf3+0x2b8>
14f8: 009505b3 add a1,a0,s1
14fc: 000106b7 lui a3,0x10
1500: fff68693 addi a3,a3,-1 # ffff <_data_lma+0xe223>
1504: 00de77b3 and a5,t3,a3
1508: 00d47433 and s0,s0,a3
150c: 01079793 slli a5,a5,0x10
1510: 012f0f33 add t5,t5,s2
1514: 008787b3 add a5,a5,s0
1518: 01df3eb3 sltu t4,t5,t4
151c: 01f787b3 add a5,a5,t6
1520: 01d78533 add a0,a5,t4
1524: 00ef0f33 add t5,t5,a4
1528: 00ef3733 sltu a4,t5,a4
152c: 005506b3 add a3,a0,t0
1530: 00e68633 add a2,a3,a4
1534: 01f7b433 sltu s0,a5,t6
1538: 01d53533 sltu a0,a0,t4
153c: 010e5793 srli a5,t3,0x10
1540: 00e63733 sltu a4,a2,a4
1544: 00a46433 or s0,s0,a0
1548: 0056b6b3 sltu a3,a3,t0
154c: 00f40433 add s0,s0,a5
1550: 00e6e6b3 or a3,a3,a4
1554: 00d40433 add s0,s0,a3
1558: 00b40433 add s0,s0,a1
155c: 01765793 srli a5,a2,0x17
1560: 00941413 slli s0,s0,0x9
1564: 00f46433 or s0,s0,a5
1568: 009f1793 slli a5,t5,0x9
156c: 0067e7b3 or a5,a5,t1
1570: 00f037b3 snez a5,a5
1574: 017f5f13 srli t5,t5,0x17
1578: 00961713 slli a4,a2,0x9
157c: 01e7e7b3 or a5,a5,t5
1580: 00e7e7b3 or a5,a5,a4
1584: 01000737 lui a4,0x1000
1588: 00e47733 and a4,s0,a4
158c: 28070663 beqz a4,1818 <__muldf3+0x5d4>
1590: 0017d713 srli a4,a5,0x1
1594: 0017f793 andi a5,a5,1
1598: 00f76733 or a4,a4,a5
159c: 01f41793 slli a5,s0,0x1f
15a0: 00f767b3 or a5,a4,a5
15a4: 00145413 srli s0,s0,0x1
FP_PACK_D (r, R);
15a8: 3ff88693 addi a3,a7,1023
15ac: 26d05a63 blez a3,1820 <__muldf3+0x5dc>
15b0: 0077f713 andi a4,a5,7
15b4: 02070063 beqz a4,15d4 <__muldf3+0x390>
15b8: 00f7f713 andi a4,a5,15
15bc: 00400613 li a2,4
15c0: 00c70a63 beq a4,a2,15d4 <__muldf3+0x390>
15c4: 00478713 addi a4,a5,4
15c8: 00f737b3 sltu a5,a4,a5
15cc: 00f40433 add s0,s0,a5
15d0: 00070793 mv a5,a4
15d4: 01000737 lui a4,0x1000
15d8: 00e47733 and a4,s0,a4
15dc: 00070a63 beqz a4,15f0 <__muldf3+0x3ac>
15e0: ff000737 lui a4,0xff000
15e4: fff70713 addi a4,a4,-1 # feffffff <tohost+0xff00000f>
15e8: 00e47433 and s0,s0,a4
15ec: 40088693 addi a3,a7,1024
15f0: 7fe00713 li a4,2046
15f4: 2ed74e63 blt a4,a3,18f0 <__muldf3+0x6ac>
15f8: 01d41713 slli a4,s0,0x1d
15fc: 0037d793 srli a5,a5,0x3
1600: 00f76733 or a4,a4,a5
1604: 00345413 srli s0,s0,0x3
1608: 7ff007b7 lui a5,0x7ff00
160c: 01469693 slli a3,a3,0x14
1610: 00c41413 slli s0,s0,0xc
1614: 00f6f6b3 and a3,a3,a5
1618: 00c45413 srli s0,s0,0xc
FP_HANDLE_EXCEPTIONS;
return r;
}
161c: 02c12083 lw ra,44(sp)
FP_PACK_D (r, R);
1620: 0086e6b3 or a3,a3,s0
}
1624: 02812403 lw s0,40(sp)
FP_PACK_D (r, R);
1628: 01f81813 slli a6,a6,0x1f
162c: 0106e7b3 or a5,a3,a6
}
1630: 02412483 lw s1,36(sp)
1634: 02012903 lw s2,32(sp)
1638: 01c12983 lw s3,28(sp)
163c: 01812a03 lw s4,24(sp)
1640: 01412a83 lw s5,20(sp)
1644: 01012b03 lw s6,16(sp)
1648: 00c12b83 lw s7,12(sp)
164c: 00070513 mv a0,a4
1650: 00078593 mv a1,a5
1654: 03010113 addi sp,sp,48
1658: 00008067 ret
FP_UNPACK_D (A, a);
165c: 00a4e933 or s2,s1,a0
1660: 06090c63 beqz s2,16d8 <__muldf3+0x494>
1664: 04048063 beqz s1,16a4 <__muldf3+0x460>
1668: 00048513 mv a0,s1
166c: 3f8000ef jal ra,1a64 <__clzsi2>
1670: ff550713 addi a4,a0,-11
1674: 01c00793 li a5,28
1678: 02e7cc63 blt a5,a4,16b0 <__muldf3+0x46c>
167c: 01d00793 li a5,29
1680: ff850913 addi s2,a0,-8
1684: 40e787b3 sub a5,a5,a4
1688: 012494b3 sll s1,s1,s2
168c: 00f457b3 srl a5,s0,a5
1690: 0097e4b3 or s1,a5,s1
1694: 01241933 sll s2,s0,s2
1698: c0d00993 li s3,-1011
169c: 40a989b3 sub s3,s3,a0
16a0: c15ff06f j 12b4 <__muldf3+0x70>
16a4: 3c0000ef jal ra,1a64 <__clzsi2>
16a8: 02050513 addi a0,a0,32
16ac: fc5ff06f j 1670 <__muldf3+0x42c>
16b0: fd850493 addi s1,a0,-40
16b4: 009414b3 sll s1,s0,s1
16b8: 00000913 li s2,0
16bc: fddff06f j 1698 <__muldf3+0x454>
16c0: 00a4e933 or s2,s1,a0
16c4: 02090263 beqz s2,16e8 <__muldf3+0x4a4>
16c8: 00050913 mv s2,a0
16cc: 7ff00993 li s3,2047
16d0: 00300b13 li s6,3
16d4: be5ff06f j 12b8 <__muldf3+0x74>
16d8: 00000493 li s1,0
16dc: 00000993 li s3,0
16e0: 00100b13 li s6,1
16e4: bd5ff06f j 12b8 <__muldf3+0x74>
16e8: 00000493 li s1,0
16ec: 7ff00993 li s3,2047
16f0: 00200b13 li s6,2
16f4: bc5ff06f j 12b8 <__muldf3+0x74>
FP_UNPACK_D (B, b);
16f8: 017467b3 or a5,s0,s7
16fc: 06078e63 beqz a5,1778 <__muldf3+0x534>
1700: 04040063 beqz s0,1740 <__muldf3+0x4fc>
1704: 00040513 mv a0,s0
1708: 35c000ef jal ra,1a64 <__clzsi2>
170c: ff550693 addi a3,a0,-11
1710: 01c00793 li a5,28
1714: 02d7ce63 blt a5,a3,1750 <__muldf3+0x50c>
1718: 01d00713 li a4,29
171c: ff850793 addi a5,a0,-8
1720: 40d70733 sub a4,a4,a3
1724: 00f41433 sll s0,s0,a5
1728: 00ebd733 srl a4,s7,a4
172c: 00876433 or s0,a4,s0
1730: 00fb97b3 sll a5,s7,a5
1734: c0d00713 li a4,-1011
1738: 40a70733 sub a4,a4,a0
173c: bb9ff06f j 12f4 <__muldf3+0xb0>
1740: 000b8513 mv a0,s7
1744: 320000ef jal ra,1a64 <__clzsi2>
1748: 02050513 addi a0,a0,32
174c: fc1ff06f j 170c <__muldf3+0x4c8>
1750: fd850413 addi s0,a0,-40
1754: 008b9433 sll s0,s7,s0
1758: 00000793 li a5,0
175c: fd9ff06f j 1734 <__muldf3+0x4f0>
1760: 017467b3 or a5,s0,s7
1764: 02078263 beqz a5,1788 <__muldf3+0x544>
1768: 000b8793 mv a5,s7
176c: 7ff00713 li a4,2047
1770: 00300613 li a2,3
1774: b85ff06f j 12f8 <__muldf3+0xb4>
1778: 00000413 li s0,0
177c: 00000713 li a4,0
1780: 00100613 li a2,1
1784: b75ff06f j 12f8 <__muldf3+0xb4>
1788: 00000413 li s0,0
178c: 7ff00713 li a4,2047
1790: 00200613 li a2,2
1794: b65ff06f j 12f8 <__muldf3+0xb4>
1798: 00100693 li a3,1
179c: 00e696b3 sll a3,a3,a4
17a0: 5306f713 andi a4,a3,1328
17a4: 04071863 bnez a4,17f4 <__muldf3+0x5b0>
17a8: 2406f593 andi a1,a3,576
17ac: 12059463 bnez a1,18d4 <__muldf3+0x690>
17b0: 0886f693 andi a3,a3,136
17b4: b6068ae3 beqz a3,1328 <__muldf3+0xe4>
17b8: 000a0813 mv a6,s4
FP_PACK_D (r, R);
17bc: 00200713 li a4,2
17c0: 12e60863 beq a2,a4,18f0 <__muldf3+0x6ac>
17c4: 00300713 li a4,3
17c8: 10e60e63 beq a2,a4,18e4 <__muldf3+0x6a0>
17cc: 00100713 li a4,1
17d0: dce61ce3 bne a2,a4,15a8 <__muldf3+0x364>
17d4: 00000413 li s0,0
17d8: 00000713 li a4,0
17dc: 0bc0006f j 1898 <__muldf3+0x654>
FP_MUL_D (R, A, B);
17e0: 00f00693 li a3,15
17e4: 02d70063 beq a4,a3,1804 <__muldf3+0x5c0>
17e8: 00b00693 li a3,11
17ec: fcd706e3 beq a4,a3,17b8 <__muldf3+0x574>
FP_UNPACK_D (A, a);
17f0: 000a8813 mv a6,s5
FP_MUL_D (R, A, B);
17f4: 00048413 mv s0,s1
17f8: 00090793 mv a5,s2
17fc: 000b0613 mv a2,s6
1800: fbdff06f j 17bc <__muldf3+0x578>
1804: 00080437 lui s0,0x80
1808: 00000793 li a5,0
180c: 00000813 li a6,0
1810: 00300613 li a2,3
1814: fb1ff06f j 17c4 <__muldf3+0x580>
1818: 00098893 mv a7,s3
181c: d8dff06f j 15a8 <__muldf3+0x364>
FP_PACK_D (r, R);
1820: 00100613 li a2,1
1824: 40d60633 sub a2,a2,a3
1828: 03800713 li a4,56
182c: fac744e3 blt a4,a2,17d4 <__muldf3+0x590>
1830: 01f00713 li a4,31
1834: 06c74663 blt a4,a2,18a0 <__muldf3+0x65c>
1838: 41e88893 addi a7,a7,1054
183c: 01141733 sll a4,s0,a7
1840: 00c7d6b3 srl a3,a5,a2
1844: 011798b3 sll a7,a5,a7
1848: 00d76733 or a4,a4,a3
184c: 011038b3 snez a7,a7
1850: 011767b3 or a5,a4,a7
1854: 00c45433 srl s0,s0,a2
1858: 0077f713 andi a4,a5,7
185c: 02070063 beqz a4,187c <__muldf3+0x638>
1860: 00f7f713 andi a4,a5,15
1864: 00400693 li a3,4
1868: 00d70a63 beq a4,a3,187c <__muldf3+0x638>
186c: 00478713 addi a4,a5,4 # 7ff00004 <_sp+0x6fefc004>
1870: 00f737b3 sltu a5,a4,a5
1874: 00f40433 add s0,s0,a5
1878: 00070793 mv a5,a4
187c: 00800737 lui a4,0x800
1880: 00e47733 and a4,s0,a4
1884: 06071e63 bnez a4,1900 <__muldf3+0x6bc>
1888: 01d41713 slli a4,s0,0x1d
188c: 0037d793 srli a5,a5,0x3
1890: 00f76733 or a4,a4,a5
1894: 00345413 srli s0,s0,0x3
1898: 00000693 li a3,0
189c: d6dff06f j 1608 <__muldf3+0x3c4>
18a0: fe100713 li a4,-31
18a4: 40d70733 sub a4,a4,a3
18a8: 02000593 li a1,32
18ac: 00e45733 srl a4,s0,a4
18b0: 00000693 li a3,0
18b4: 00b60663 beq a2,a1,18c0 <__muldf3+0x67c>
18b8: 43e88893 addi a7,a7,1086
18bc: 011416b3 sll a3,s0,a7
18c0: 00f6e6b3 or a3,a3,a5
18c4: 00d036b3 snez a3,a3
18c8: 00d767b3 or a5,a4,a3
18cc: 00000413 li s0,0
18d0: f89ff06f j 1858 <__muldf3+0x614>
FP_MUL_D (R, A, B);
18d4: 00080437 lui s0,0x80
FP_PACK_D (r, R);
18d8: 7ff00693 li a3,2047
18dc: 00000813 li a6,0
18e0: d29ff06f j 1608 <__muldf3+0x3c4>
18e4: 00080437 lui s0,0x80
18e8: 00000713 li a4,0
18ec: fedff06f j 18d8 <__muldf3+0x694>
18f0: 00000413 li s0,0
18f4: 00000713 li a4,0
18f8: 7ff00693 li a3,2047
18fc: d0dff06f j 1608 <__muldf3+0x3c4>
1900: 00000413 li s0,0
1904: 00000713 li a4,0
1908: 00100693 li a3,1
190c: cfdff06f j 1608 <__muldf3+0x3c4>
00001910 <__fixunsdfsi>:
FP_DECL_EX;
FP_DECL_D (A);
USItype r;
FP_INIT_EXCEPTIONS;
FP_UNPACK_RAW_D (A, a);
1910: 0145d713 srli a4,a1,0x14
1914: 00100637 lui a2,0x100
{
1918: 00050693 mv a3,a0
FP_UNPACK_RAW_D (A, a);
191c: fff60793 addi a5,a2,-1 # fffff <_data_lma+0xfe223>
1920: 7ff77713 andi a4,a4,2047
FP_TO_INT_D (r, A, SI_BITS, 0);
1924: 3fe00513 li a0,1022
FP_UNPACK_RAW_D (A, a);
1928: 00b7f7b3 and a5,a5,a1
192c: 01f5d593 srli a1,a1,0x1f
FP_TO_INT_D (r, A, SI_BITS, 0);
1930: 04e55a63 bge a0,a4,1984 <__fixunsdfsi+0x74>
1934: 00000513 li a0,0
1938: 00059863 bnez a1,1948 <__fixunsdfsi+0x38>
193c: 41e00593 li a1,1054
1940: fff00513 li a0,-1
1944: 00e5d463 bge a1,a4,194c <__fixunsdfsi+0x3c>
FP_HANDLE_EXCEPTIONS;
return r;
}
1948: 00008067 ret
FP_TO_INT_D (r, A, SI_BITS, 0);
194c: 00c7e7b3 or a5,a5,a2
1950: 43300613 li a2,1075
1954: 40e60633 sub a2,a2,a4
1958: 01f00593 li a1,31
195c: 00c5cc63 blt a1,a2,1974 <__fixunsdfsi+0x64>
1960: bed70713 addi a4,a4,-1043 # 7ffbed <_data_lma+0x7fde11>
1964: 00e797b3 sll a5,a5,a4
1968: 00c6d533 srl a0,a3,a2
196c: 00a7e533 or a0,a5,a0
1970: 00008067 ret
1974: 41300693 li a3,1043
1978: 40e68733 sub a4,a3,a4
197c: 00e7d533 srl a0,a5,a4
1980: 00008067 ret
1984: 00000513 li a0,0
1988: 00008067 ret
0000198c <__mulsi3>:
/* Our RV64 64-bit routine is equivalent to our RV32 32-bit routine. */
# define __muldi3 __mulsi3
#endif
FUNC_BEGIN (__muldi3)
mv a2, a0
198c: 00050613 mv a2,a0
li a0, 0
1990: 00000513 li a0,0
.L1:
andi a3, a1, 1
1994: 0015f693 andi a3,a1,1
beqz a3, .L2
1998: 00068463 beqz a3,19a0 <__mulsi3+0x14>
add a0, a0, a2
199c: 00c50533 add a0,a0,a2
.L2:
srli a1, a1, 1
19a0: 0015d593 srli a1,a1,0x1
slli a2, a2, 1
19a4: 00161613 slli a2,a2,0x1
bnez a1, .L1
19a8: fe0596e3 bnez a1,1994 <__mulsi3+0x8>
ret
19ac: 00008067 ret
000019b0 <__divsi3>:
li t0, -1
beq a1, t0, .L20
#endif
FUNC_BEGIN (__divdi3)
bltz a0, .L10
19b0: 06054063 bltz a0,1a10 <__umodsi3+0x10>
bltz a1, .L11
19b4: 0605c663 bltz a1,1a20 <__umodsi3+0x20>
000019b8 <__udivsi3>:
/* Since the quotient is positive, fall into __udivdi3. */
FUNC_BEGIN (__udivdi3)
mv a2, a1
19b8: 00058613 mv a2,a1
mv a1, a0
19bc: 00050593 mv a1,a0
li a0, -1
19c0: fff00513 li a0,-1
beqz a2, .L5
19c4: 02060c63 beqz a2,19fc <__udivsi3+0x44>
li a3, 1
19c8: 00100693 li a3,1
bgeu a2, a1, .L2
19cc: 00b67a63 bgeu a2,a1,19e0 <__udivsi3+0x28>
.L1:
blez a2, .L2
19d0: 00c05863 blez a2,19e0 <__udivsi3+0x28>
slli a2, a2, 1
19d4: 00161613 slli a2,a2,0x1
slli a3, a3, 1
19d8: 00169693 slli a3,a3,0x1
bgtu a1, a2, .L1
19dc: feb66ae3 bltu a2,a1,19d0 <__udivsi3+0x18>
.L2:
li a0, 0
19e0: 00000513 li a0,0
.L3:
bltu a1, a2, .L4
19e4: 00c5e663 bltu a1,a2,19f0 <__udivsi3+0x38>
sub a1, a1, a2
19e8: 40c585b3 sub a1,a1,a2
or a0, a0, a3
19ec: 00d56533 or a0,a0,a3
.L4:
srli a3, a3, 1
19f0: 0016d693 srli a3,a3,0x1
srli a2, a2, 1
19f4: 00165613 srli a2,a2,0x1
bnez a3, .L3
19f8: fe0696e3 bnez a3,19e4 <__udivsi3+0x2c>
.L5:
ret
19fc: 00008067 ret
00001a00 <__umodsi3>:
FUNC_END (__udivdi3)
FUNC_BEGIN (__umoddi3)
/* Call __udivdi3(a0, a1), then return the remainder, which is in a1. */
move t0, ra
1a00: 00008293 mv t0,ra
jal __udivdi3
1a04: fb5ff0ef jal ra,19b8 <__udivsi3>
move a0, a1
1a08: 00058513 mv a0,a1
jr t0
1a0c: 00028067 jr t0
FUNC_END (__umoddi3)
/* Handle negative arguments to __divdi3. */
.L10:
neg a0, a0
1a10: 40a00533 neg a0,a0
/* Zero is handled as a negative so that the result will not be inverted. */
bgtz a1, .L12 /* Compute __udivdi3(-a0, a1), then negate the result. */
1a14: 00b04863 bgtz a1,1a24 <__umodsi3+0x24>
neg a1, a1
1a18: 40b005b3 neg a1,a1
j __udivdi3 /* Compute __udivdi3(-a0, -a1). */
1a1c: f9dff06f j 19b8 <__udivsi3>
.L11: /* Compute __udivdi3(a0, -a1), then negate the result. */
neg a1, a1
1a20: 40b005b3 neg a1,a1
.L12:
move t0, ra
1a24: 00008293 mv t0,ra
jal __udivdi3
1a28: f91ff0ef jal ra,19b8 <__udivsi3>
neg a0, a0
1a2c: 40a00533 neg a0,a0
jr t0
1a30: 00028067 jr t0
00001a34 <__modsi3>:
FUNC_END (__divdi3)
FUNC_BEGIN (__moddi3)
move t0, ra
1a34: 00008293 mv t0,ra
bltz a1, .L31
1a38: 0005ca63 bltz a1,1a4c <__modsi3+0x18>
bltz a0, .L32
1a3c: 00054c63 bltz a0,1a54 <__modsi3+0x20>
.L30:
jal __udivdi3 /* The dividend is not negative. */
1a40: f79ff0ef jal ra,19b8 <__udivsi3>
move a0, a1
1a44: 00058513 mv a0,a1
jr t0
1a48: 00028067 jr t0
.L31:
neg a1, a1
1a4c: 40b005b3 neg a1,a1
bgez a0, .L30
1a50: fe0558e3 bgez a0,1a40 <__modsi3+0xc>
.L32:
neg a0, a0
1a54: 40a00533 neg a0,a0
jal __udivdi3 /* The dividend is hella negative. */
1a58: f61ff0ef jal ra,19b8 <__udivsi3>
neg a0, a1
1a5c: 40b00533 neg a0,a1
jr t0
1a60: 00028067 jr t0
00001a64 <__clzsi2>:
count_leading_zeros (ret, x);
1a64: 000107b7 lui a5,0x10
1a68: 02f57a63 bgeu a0,a5,1a9c <__clzsi2+0x38>
1a6c: 10053793 sltiu a5,a0,256
1a70: 0017c793 xori a5,a5,1
1a74: 00379793 slli a5,a5,0x3
1a78: 00002737 lui a4,0x2
1a7c: 02000693 li a3,32
1a80: 40f686b3 sub a3,a3,a5
1a84: 00f55533 srl a0,a0,a5
1a88: c7c70793 addi a5,a4,-900 # 1c7c <__clz_tab>
1a8c: 00a787b3 add a5,a5,a0
1a90: 0007c503 lbu a0,0(a5) # 10000 <_data_lma+0xe224>
}
1a94: 40a68533 sub a0,a3,a0
1a98: 00008067 ret
count_leading_zeros (ret, x);
1a9c: 01000737 lui a4,0x1000
1aa0: 01000793 li a5,16
1aa4: fce56ae3 bltu a0,a4,1a78 <__clzsi2+0x14>
1aa8: 01800793 li a5,24
1aac: fcdff06f j 1a78 <__clzsi2+0x14>