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updates submodules and adapts design to changes

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This commit is contained in:
Eyck Jentzsch
2023-06-28 09:03:30 +02:00
parent 2d220181e8
commit 5c09ed24fb
10 changed files with 20 additions and 15 deletions
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2
src/tgc_vp/gen/platform_mmap.h
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@@ -7,7 +7,7 @@
#define _PLATFORM_MMAP_H_
// need double braces, see
// https://stackoverflow.com/questions/6893700/how-to-construct-stdarray-object-with-initializer-list#6894191
const std::array<scc::target_memory_map_entry<32>, 13> platfrom_mmap = {{
const std::array<scc::target_memory_map_entry<>, 13> platfrom_mmap = {{
{clint.socket, 0x2000000, 0xc000},
{plic.socket, 0xc000000, 0x200008},
{aon.socket, 0x10000000, 0x150},

5
src/tgc_vp/system.cpp
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@@ -13,7 +13,7 @@ using namespace sysc::tgfs;
system::system(sc_core::sc_module_name nm)
: sc_core::sc_module(nm)
, NAMED(router, platfrom_mmap.size() + 2, 1)
, NAMED(router, platfrom_mmap.size() + 2, 2)
, NAMEDC(qspi0_ptr, spi, spi_impl::beh)
, NAMEDC(qspi1_ptr, spi, spi_impl::beh)
, NAMEDC(qspi2_ptr, spi, spi_impl::beh)
@@ -24,7 +24,8 @@ system::system(sc_core::sc_module_name nm)
auto& qspi0 = *qspi0_ptr;
auto& qspi1 = *qspi1_ptr;
auto& qspi2 = *qspi2_ptr;
core_complex.initiator(router.target[0]);
core_complex.ibus(router.target[0]);
core_complex.dbus(router.target[1]);
size_t i = 0;
for (const auto &e : platfrom_mmap) {
router.initiator.at(i)(e.target);

4
src/tgc_vp/system.h
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@@ -52,9 +52,9 @@ private:
vpvper::sifive::prci prci{"prci"};
vpvper::sifive::clint clint{"clint"};
using mem_qspi_t = scc::memory<512_MB, 32>;
using mem_qspi_t = scc::memory<512_MB, scc::LT>;
mem_qspi_t mem_qspi{"mem_qspi"};
using mem_ram_t = scc::memory<128_kB, 32>;
using mem_ram_t = scc::memory<128_kB, scc::LT>;
mem_ram_t mem_ram{"mem_ram"};
sc_core::sc_signal<sc_core::sc_time, sc_core::SC_MANY_WRITERS> tlclk_s{"tlclk_s"};