105 lines
3.7 KiB
C++
105 lines
3.7 KiB
C++
////////////////////////////////////////////////////////////////////////////////
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// Copyright (C) 2017, MINRES Technologies GmbH
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright notice,
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// this list of conditions and the following disclaimer in the documentation
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// and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its contributors
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// may be used to endorse or promote products derived from this software
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// without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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//
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// Created on: Wed Sep 20 22:30:45 CEST 2017
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// * plic_regs.h Author: <RDL Generator>
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//
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////////////////////////////////////////////////////////////////////////////////
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#ifndef _PLIC_REGS_H_
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#define _PLIC_REGS_H_
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#include <sysc/utilities.h>
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#include <util/bit_field.h>
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#include <sysc/register.h>
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#include <sysc/tlm_target.h>
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namespace sysc {
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class plic_regs :
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public sc_core::sc_module,
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public sysc::resetable
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{
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protected:
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// storage declarations
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BEGIN_BF_DECL(priority_t, uint32_t);
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BF_FIELD(priority, 0, 3);
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END_BF_DECL() ;
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std::array<priority_t, 255> r_priority;
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uint32_t r_pending;
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uint32_t r_enabled;
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BEGIN_BF_DECL(threshold_t, uint32_t);
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BF_FIELD(threshold, 0, 3);
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END_BF_DECL() r_threshold;
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uint32_t r_claim_complete;
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// register declarations
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sysc::sc_register_indexed<priority_t, 255> priority;
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sysc::sc_register<uint32_t> pending;
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sysc::sc_register<uint32_t> enabled;
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sysc::sc_register<threshold_t> threshold;
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sysc::sc_register<uint32_t> claim_complete;
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public:
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plic_regs(sc_core::sc_module_name nm);
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template<unsigned BUSWIDTH=32>
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void registerResources(sysc::tlm_target<BUSWIDTH>& target);
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};
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}
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//////////////////////////////////////////////////////////////////////////////
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// member functions
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//////////////////////////////////////////////////////////////////////////////
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inline sysc::plic_regs::plic_regs(sc_core::sc_module_name nm)
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: sc_core::sc_module(nm)
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, NAMED(priority, r_priority, 0, *this)
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, NAMED(pending, r_pending, 0, *this)
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, NAMED(enabled, r_enabled, 0, *this)
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, NAMED(threshold, r_threshold, 0, *this)
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, NAMED(claim_complete, r_claim_complete, 0, *this)
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{
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}
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template<unsigned BUSWIDTH>
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inline void sysc::plic_regs::registerResources(sysc::tlm_target<BUSWIDTH>& target) {
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target.addResource(priority, 0x4UL);
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target.addResource(pending, 0x1000UL);
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target.addResource(enabled, 0x2000UL);
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target.addResource(threshold, 0xc200000UL);
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target.addResource(claim_complete, 0xc200004UL);
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}
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#endif // _PLIC_REGS_H_
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