116 lines
3.5 KiB
C++
116 lines
3.5 KiB
C++
/*******************************************************************************
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* Copyright (C) 2018 MINRES Technologies GmbH
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*******************************************************************************/
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#include "sysc/top/system.h"
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using namespace sysc;
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using namespace sc_core;
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system::system(sc_module_name nm)
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: sc_module(nm)
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, NAMED(s_ha)
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, NAMED(s_la)
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, NAMED(s_hb)
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, NAMED(s_lb)
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, NAMED(s_hc)
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, NAMED(s_lc)
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, NAMED(s_rst_n)
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, NAMED(s_vref)
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, NAMED(s_va)
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, NAMED(s_vb)
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, NAMED(s_vc)
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, NAMED(s_vasens)
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, NAMED(s_vbsens)
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, NAMED(s_vcsens)
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, NAMED(s_vcentersens)
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, NAMED(s_ana, 4)
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, NAMED(i_hifive1)
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, NAMED(i_h_bridge)
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, NAMED(i_motor) {
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// connect platform
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i_hifive1.erst_n(s_rst_n);
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// HiFive1 digital out
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i_hifive1.ha_o(s_ha);
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i_hifive1.la_o(s_la);
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i_hifive1.hb_o(s_hb);
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i_hifive1.lb_o(s_lb);
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i_hifive1.hc_o(s_hc);
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i_hifive1.lc_o(s_lc);
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// HiFive1 analog in
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i_hifive1.vref_i(s_vref);
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i_hifive1.adc_ch0_i(s_vasens);
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i_hifive1.adc_ch1_i(s_vbsens);
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i_hifive1.adc_ch2_i(s_vcsens);
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i_hifive1.adc_ch3_i(s_vcentersens);
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i_hifive1.adc_ch4_i(s_ana[0]);
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i_hifive1.adc_ch5_i(s_ana[1]);
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i_hifive1.adc_ch6_i(s_ana[2]);
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i_hifive1.adc_ch7_i(s_ana[3]);
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// H-bridge digital in
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i_h_bridge.ha_i(s_ha);
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i_h_bridge.la_i(s_la);
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i_h_bridge.hb_i(s_hb);
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i_h_bridge.lb_i(s_lb);
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i_h_bridge.hc_i(s_hc);
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i_h_bridge.lc_i(s_lc);
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// H-bridge analog out
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i_h_bridge.va_o(s_va);
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i_h_bridge.vb_o(s_vb);
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i_h_bridge.vc_o(s_vc);
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// motor analog in
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i_motor.va_i(s_va);
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i_motor.vb_i(s_vb);
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i_motor.vc_i(s_vc);
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// motor analog out
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i_motor.va_o(s_vasens);
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i_motor.vb_o(s_vbsens);
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i_motor.vc_o(s_vcsens);
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i_motor.vcenter_o(s_vcentersens);
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SC_THREAD(gen_por);
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}
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system::~system() = default;
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void sysc::system::gen_por() {
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// single shot
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s_rst_n = false;
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wait(1_us);
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s_rst_n = true;
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s_vref = 4.8;
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double val = 0.1;
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for (auto &sig : s_ana) {
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sig = val;
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val += 0.12;
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}
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}
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