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<scannerConfigBuildInfo instanceId="cdt.managedbuild.config.gnu.exe.release.446935686;cdt.managedbuild.config.gnu.exe.release.446935686.;cdt.managedbuild.tool.gnu.cpp.compiler.exe.release.1265053613;cdt.managedbuild.tool.gnu.cpp.compiler.input.1842530130">
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
</scannerConfigBuildInfo>
<scannerConfigBuildInfo instanceId="cdt.managedbuild.config.gnu.exe.release.1745230171.1259602404;cdt.managedbuild.config.gnu.exe.release.1745230171.1259602404.;cdt.managedbuild.tool.gnu.c.compiler.exe.release.1020243188;cdt.managedbuild.tool.gnu.c.compiler.input.693742822">
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
</scannerConfigBuildInfo>
<scannerConfigBuildInfo instanceId="cdt.managedbuild.config.gnu.exe.debug.1751741082;cdt.managedbuild.config.gnu.exe.debug.1751741082.;cdt.managedbuild.tool.gnu.c.compiler.exe.debug.1306991179;cdt.managedbuild.tool.gnu.c.compiler.input.140891728">
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
</scannerConfigBuildInfo>
</storageModule>
</cproject>

1
.gitignore vendored
View File

@ -31,4 +31,3 @@ language.settings.xml
/*.out /*.out
/dump.json /dump.json
/*.c /*.c
/_build/

14
.gitmodules vendored
View File

@ -1,15 +1,15 @@
[submodule "dbt-rise-core"] [submodule "dbt-core"]
path = dbt-rise-core path = dbt-core
url = https://github.com/Minres/DBT-RISE-Core.git url = https://git.minres.com/DBT-RISE/DBT-RISE-Core.git
[submodule "scc"] [submodule "scc"]
path = scc path = scc
url = https://github.com/Minres/SystemC-Components.git url = https://git.minres.com/SystemC/SystemC-Components.git
[submodule "external/elfio"] [submodule "external/elfio"]
path = external/elfio path = external/elfio
url = http://git.code.sf.net/p/elfio/code url = http://git.code.sf.net/p/elfio/code
[submodule "external/libGIS"] [submodule "external/libGIS"]
path = external/libGIS path = external/libGIS
url = https://github.com/vsergeev/libGIS.git url = https://github.com/vsergeev/libGIS.git
[submodule "dbt-rise-riscv"] [submodule "riscv"]
path = dbt-rise-riscv path = riscv
url = https://github.com/Minres/DBT-RISE-RISCV.git url = https://git.minres.com/DBT-RISE/DBT-RISE-RISCV.git

2
.project
View File

@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8"?> <?xml version="1.0" encoding="UTF-8"?>
<projectDescription> <projectDescription>
<name>HiFive1-VP</name> <name>RISCV-VP</name>
<comment></comment> <comment></comment>
<projects> <projects>
</projects> </projects>

8
.settings/org.eclipse.cdt.managedbuilder.core.prefs
View File

@ -1,4 +1,10 @@
eclipse.preferences.version=1 eclipse.preferences.version=1
environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.exe.debug.1751741082/CPATH/delimiter=\:
environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.exe.debug.1751741082/CPATH/operation=remove
environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.exe.debug.1751741082/CPLUS_INCLUDE_PATH/delimiter=\:
environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.exe.debug.1751741082/CPLUS_INCLUDE_PATH/operation=remove
environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.exe.debug.1751741082/C_INCLUDE_PATH/delimiter=\:
environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.exe.debug.1751741082/C_INCLUDE_PATH/operation=remove
environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.exe.debug.1751741082/append=true environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.exe.debug.1751741082/append=true
environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.exe.debug.1751741082/appendContributed=true environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.exe.debug.1751741082/appendContributed=true
environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.exe.release.1745230171.1259602404/CPATH/delimiter=\: environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.exe.release.1745230171.1259602404/CPATH/delimiter=\:
@ -17,6 +23,8 @@ environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.exe.release.1745
environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.exe.release.1745230171/C_INCLUDE_PATH/operation=remove environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.exe.release.1745230171/C_INCLUDE_PATH/operation=remove
environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.exe.release.1745230171/append=true environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.exe.release.1745230171/append=true
environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.exe.release.1745230171/appendContributed=true environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.exe.release.1745230171/appendContributed=true
environment/buildEnvironmentLibrary/cdt.managedbuild.config.gnu.exe.debug.1751741082/LIBRARY_PATH/delimiter=\:
environment/buildEnvironmentLibrary/cdt.managedbuild.config.gnu.exe.debug.1751741082/LIBRARY_PATH/operation=remove
environment/buildEnvironmentLibrary/cdt.managedbuild.config.gnu.exe.debug.1751741082/append=true environment/buildEnvironmentLibrary/cdt.managedbuild.config.gnu.exe.debug.1751741082/append=true
environment/buildEnvironmentLibrary/cdt.managedbuild.config.gnu.exe.debug.1751741082/appendContributed=true environment/buildEnvironmentLibrary/cdt.managedbuild.config.gnu.exe.debug.1751741082/appendContributed=true
environment/buildEnvironmentLibrary/cdt.managedbuild.config.gnu.exe.release.1745230171.1259602404/LIBRARY_PATH/delimiter=\: environment/buildEnvironmentLibrary/cdt.managedbuild.config.gnu.exe.release.1745230171.1259602404/LIBRARY_PATH/delimiter=\:

140
CMakeLists.txt
View File

@ -1,13 +1,32 @@
cmake_minimum_required(VERSION 3.12) cmake_minimum_required(VERSION 3.12)
set(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} ${CMAKE_CURRENT_SOURCE_DIR}/cmake ${CMAKE_CURRENT_SOURCE_DIR}/scc/cmake) set(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} ${CMAKE_CURRENT_SOURCE_DIR}/cmake ${CMAKE_CURRENT_SOURCE_DIR}/scc/cmake)
project(RISCV-VP VERSION 1.0.0 LANGUAGES CXX) project(RISCV-VP LANGUAGES CXX)
set(ENABLE_SCV TRUE CACHE BOOL "Enable use of SCV") set(ENABLE_SCV TRUE CACHE BOOL "Enable use of SCV")
set(ENABLE_SHARED TRUE CACHE BOOL "Build shared libraries") set(ENABLE_SHARED TRUE CACHE BOOL "Build shared libraries")
set(WITH_LLVM FALSE CACHE BOOL "Build LLVM based backend") include(GitFunctions)
get_branch_from_git()
# if we are not on master or develop set the submodules to develop
#IF(NOT ${GIT_BRANCH} MATCHES "master")
# IF(NOT ${GIT_BRANCH} MATCHES "develop")
# message(STATUS "main branch is '${GIT_BRANCH}', setting submodules to 'develop'")
# set(GIT_BRANCH develop)
# endif()
#endif()
### set the directory names of the submodules
set(GIT_SUBMODULES elfio libGIS scc dbt-core)
set(GIT_SUBMODULE_DIR_scc .)
set(GIT_SUBMODULE_DIR_dbt-core .)
set(GIT_SUBMODULE_DIR_riscv .)
### set each submodules's commit or tag that is to be checked out
### (leave empty if you want master)
#set(GIT_SUBMODULE_VERSION_sc-comp 3af6b9836589b082c19d9131c5d0b7afa8ddd7cd)
set(GIT_SUBMODULE_BRANCH_scc ${GIT_BRANCH})
set(GIT_SUBMODULE_BRANCH_dbt-core ${GIT_BRANCH})
set(GIT_SUBMODULE_BRANCH_riscv ${GIT_BRANCH})
include(GNUInstallDirs) include(GNUInstallDirs)
#include(Submodules) #include(Submodules)
@ -23,11 +42,11 @@ set(CMAKE_POSITION_INDEPENDENT_CODE ON)
include(CheckCXXCompilerFlag) include(CheckCXXCompilerFlag)
CHECK_CXX_COMPILER_FLAG("-march=native" COMPILER_SUPPORTS_MARCH_NATIVE) CHECK_CXX_COMPILER_FLAG("-march=native" COMPILER_SUPPORTS_MARCH_NATIVE)
if(COMPILER_SUPPORTS_MARCH_NATIVE) if(COMPILER_SUPPORTS_MARCH_NATIVE)
if("${CMAKE_BUILD_TYPE}" STREQUAL "") if("${CMAKE_BUILD_TYPE}" STREQUAL "")
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -march=native") set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -march=native")
elseif(NOT(${CMAKE_BUILD_TYPE} STREQUAL "RelWithDebInfo")) elseif(NOT(${CMAKE_BUILD_TYPE} STREQUAL "RelWithDebInfo"))
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -march=native") set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -march=native")
endif() endif()
endif() endif()
if ("${CMAKE_CXX_COMPILER_ID}" STREQUAL "GNU" OR "${CMAKE_CXX_COMPILER_ID}" STREQUAL "Clang") if ("${CMAKE_CXX_COMPILER_ID}" STREQUAL "GNU" OR "${CMAKE_CXX_COMPILER_ID}" STREQUAL "Clang")
@ -39,84 +58,20 @@ elseif ("${CMAKE_CXX_COMPILER_ID}" STREQUAL "MSVC")
set(warnings "/W4 /WX /EHsc") set(warnings "/W4 /WX /EHsc")
endif() endif()
include(GNUInstallDirs) setup_conan(TARGETS)
include(ConanInline)
set(CONAN_BOOST_OPTIONS
boost:fPIC=True
boost:shared=True
boost:header_only=False
boost:without_contract=True
boost:without_graph=True
boost:without_graph_parallel=True
boost:without_iostreams=True
boost:without_json=True
boost:without_locale=True
boost:without_log=True
boost:without_math=True
boost:without_mpi=True
boost:without_nowide=True
boost:without_python=True
boost:without_random=True
boost:without_regex=True
boost:without_stacktrace=True
boost:without_test=True
boost:without_timer=True
boost:without_type_erasure=True
boost:without_wave=True
)
set(B2_VERSION 4.8.0)
set(CONAN_PACKAGE_LIST fmt/6.1.2 zlib/1.2.11 b2/${B2_VERSION} boost/1.75.0 gsl-lite/0.37.0 elfio/3.8 tcc/0.9.27 seasocks/1.4.4)
set(CONAN_PACKAGE_OPTIONS seasocks:shared=True fmt:header_only=True ${CONAN_BOOST_OPTIONS})
if(FORCE_SYSTEMC OR NOT DEFINED ENV{SYSTEMC_HOME})
list(APPEND CONAN_PACKAGE_LIST systemc/2.3.3 systemc-cci/1.0.0)
list(APPEND CONAN_PACKAGE_OPTIONS systemc-cci:shared=False)
endif()
conan_check()
conan_add_remote(NAME minres URL https://git.minres.com/api/packages/Tooling/conan)
# Boost on CentOS 7 quirks: the b2 of conan-center is build against a newer libstdc++ and therefore does not run
# with the oooooold libs on CentOS 7. Therefore we build our own version of b2 if it is not there
set(B2_META $ENV{HOME}/.conan/data/b2/${B2_VERSION}/_/_/metadata.json)
if(DEFINED ENV{CONAN_USER_HOME})
set(B2_META $ENV{CONAN_USER_HOME}/.conan/data/b2/${B2_VERSION}/_/_/metadata.json)
endif()
if(NOT EXISTS ${B2_META})
conan_configure(REQUIRES b2/${B2_VERSION})
conan_cmake_autodetect(settings)
conan_cmake_install(PATH_OR_REFERENCE . BUILD b2 SETTINGS ${settings})
endif()
# Boost on CentOS 7 quirks end
# forca a local build of tcc to make sure path to libtcc1.a is correct
conan_configure(REQUIRES tcc/0.9.27)
conan_cmake_autodetect(settings)
set(settings ${settings} compiler.cppstd=${CMAKE_CXX_STANDARD})
conan_cmake_install(PATH_OR_REFERENCE . BUILD tcc SETTINGS ${settings})
conan_cmake_configure(REQUIRES ${CONAN_PACKAGE_LIST}
GENERATORS cmake_find_package cmake
OPTIONS ${CONAN_PACKAGE_OPTIONS}
)
conan_install()
#conan_setup(TARGETS)
include(conanbuildinfo)
find_package(tcc)
find_package(elfio)
find_package(fmt)
find_package(gsl-lite)
find_package(ZLIB)
find_package(Seasocks)
find_package(Threads REQUIRED)
# This line finds the boost lib and headers. # This line finds the boost lib and headers.
set(Boost_NO_BOOST_CMAKE ON) # Don't do a find_package in config mode before searching for a regular boost install. set(Boost_NO_BOOST_CMAKE ON) # Don't do a find_package in config mode before searching for a regular boost install.
set(BOOST_ROOT ${CONAN_BOOST_ROOT})
if(DEFINED ENV{LLVM_HOME})
find_path (LLVM_DIR LLVM-Config.cmake $ENV{LLVM_HOME}/lib/cmake/llvm)
endif(DEFINED ENV{LLVM_HOME})
find_package(LLVM REQUIRED CONFIG)
message(STATUS "Found LLVM ${LLVM_PACKAGE_VERSION}")
message(STATUS "Using LLVMConfig.cmake in: ${LLVM_DIR}")
llvm_map_components_to_libnames(llvm_libs support core mcjit x86codegen x86asmparser)
set(BUILD_SHARED_LIBS 1)
find_package(Threads) find_package(Threads)
find_package(Tcmalloc) find_package(Tcmalloc)
@ -135,13 +90,6 @@ if(SystemC_FOUND)
endif() endif()
endif(SystemC_FOUND) endif(SystemC_FOUND)
#find_package(Verilator)
if(VERILATOR_FOUND)
message(STATUS "Verilator found at ${VERILATOR_EXECUTABLE}")
else()
message(STATUS "Verilator not found, omitting RTL parts in build")
endif()
set(PROJECT_3PARTY_DIRS external) set(PROJECT_3PARTY_DIRS external)
include(clang-format) include(clang-format)
@ -159,8 +107,16 @@ if (ENABLE_CLANG_TIDY)
endif() endif()
endif() endif()
# Set the version number of your project here (format is MAJOR.MINOR.PATCHLEVEL - e.g. 1.0.0)
set(VERSION_MAJOR "1")
set(VERSION_MINOR "0")
set(VERSION_PATCH "0")
set(VERSION ${VERSION_MAJOR}.${VERSION_MINOR}.${VERSION_PATCH})
add_subdirectory(external) add_subdirectory(external)
add_subdirectory(dbt-rise-core) add_subdirectory(dbt-core)
add_subdirectory(dbt-rise-riscv) add_subdirectory(riscv)
add_subdirectory(scc) add_subdirectory(scc)
add_subdirectory(platform) add_subdirectory(platform)
message(STATUS "Build Type: ${CMAKE_BUILD_TYPE}")

107
Jenkinsfile vendored
View File

@ -1,107 +0,0 @@
void checkout_hifive_vp() {
checkout([
$class: 'GitSCM',
branches: [[name: '*/develop']],
browser: [$class: 'GogsGit', repoUrl: ''],
doGenerateSubmoduleConfigurations: false,
extensions: [
[
$class: 'SubmoduleOption',
disableSubmodules: false,
parentCredentials: false,
recursiveSubmodules: true,
reference: '',
trackingSubmodules: true
],
[$class: 'CleanBeforeCheckout'],
[$class: 'WipeWorkspace'],
[$class: 'RelativeTargetDirectory', relativeTargetDir: 'HIFIVE1-VP']
],
submoduleCfg: [],
userRemoteConfigs: [[
credentialsId: 'gitea-jenkins',
url: 'https://github.com/Minres/HIFIVE1-VP.git'
]]
])
}
void build_hifive_vp() {
try {
sh("conan profile new default --detect --force")
sh("conan profile update settings.compiler.libcxx=libstdc++11 default")
sh("conan remote add minres https://git.minres.com/api/packages/Tooling/conan --force")
sh("cmake --version")
}
catch (exc) {
echo 'Conan configured'
}
sh("rm -rf HIFIVE1-VP/build")
sh("mkdir -p HIFIVE1-VP/build")
sh("cd HIFIVE1-VP && git submodule update --recursive")
sh("cd HIFIVE1-VP/build && MAKE_FLAGS='-j4' cmake .. && make -j4")
fingerprint 'HIFIVE1-VP/build/bin/riscv.vp'
}
void build_hifive_without_scv() {
try {
sh("conan profile new default --detect --force")
sh("conan profile update settings.compiler.libcxx=libstdc++11 default")
sh("conan remote add minreshttps://git.minres.com/api/packages/Tooling/conan --force")
sh("cmake --version")
}
catch (exc) {
echo 'Conan configured'
}
sh("rm -rf HIFIVE1-VP/build")
sh("mkdir -p HIFIVE1-VP/build")
sh("cd HIFIVE1-VP && git submodule update --recursive")
sh("cd HIFIVE1-VP/build && MAKE_FLAGS='-j4' cmake .. -DENABLE_SCV=FALSE && make -j4")
fingerprint 'HIFIVE1-VP/build/bin/riscv.vp'
}
pipeline {
agent none
options {
// using the Timestamper plugin we can add timestamps to the console log
timestamps()
skipStagesAfterUnstable()
}
stages {
stage('HiFive-VP pipeline') {
parallel {
stage('ubuntu18'){
agent {docker { image 'ubuntu-18.04' } }
stages {
stage('Checkout on Ubuntu18.04') { steps { checkout_hifive_vp() }}
stage('Build') { steps { build_hifive_vp() } }
}
}
stage('ubuntu20'){
agent {docker { image 'ubuntu-20.04' } }
stages {
stage('Checkout on Ubuntu20.04') { steps { checkout_hifive_vp() }}
stage('Build') { steps { build_hifive_vp() } }
}
}
stage('Fedora28'){
agent {docker { image 'fedora28' } }
stages {
stage('Checkout on Fedora') { steps {checkout_hifive_vp()}}
stage('Build') { steps {build_hifive_vp() }}
}
}
stage('No SCV'){
agent {docker { image 'ubuntu-18.04' } }
stages {
stage('Checkout on Ubuntu') { steps {checkout_hifive_vp()}}
stage('Build without SCV') { steps {build_hifive_without_scv()}
}
}
}
}
}
}
}

87
README.md
View File

@ -1,51 +1,76 @@
# HIFIVE1-VP # RISCV-VP
An instruction set simulator based on DBT-RISE implementing the RISC-V ISA. The project is hosted at https://git.minres.com/VP/RISCV-VP.
An instruction set simulator based on DBT-RISE implementing the RISC-V ISA. The project is hosted at https://github.com/Minres/HIFIVE1-VP. **RISCV-VP README**
## HIFIVE1-VP README This is work in progress, so use at your own risk. Goal is to implement an open-source ISS which can easily embedded e.g. into SystemC Virtual Prototypes. It uses code generation to allow easy extension and adaptation of the used instruction. Please see also [https://git.minres.com/DBT-RISE/DBT-RISE-RISCV](https://git.minres.com/DBT-RISE/DBT-RISE-RISCV)
This is work in progress, so use at your own risk. Goal is to implement an open-source ISS which can easily embedded e.g. into SystemC Virtual Prototypes. It uses code generation to allow easy extension and adaptation of the used instruction. Please see also [https://github.com/Minres/DBT-RISE-RISCV](https://github.com/Minres/DBT-RISE-RISCV)
The RISC-V ISS reaches about 65MIPS running on a decent Intel Processor. The RISC-V ISS reaches about 65MIPS running on a decent Intel Processor.
HIFIVE1-VP uses libGIS (https://github.com/vsergeev/libGIS) under MIT license The implementation is based on LLVM > v4.0. Eclipse CDT 4.7 (Oxygen) is recommended as IDE.
## Setup steps RISCV-VP uses libGIS (https://github.com/vsergeev/libGIS) as well as ELFIO (http://elfio.sourceforge.net/), both under MIT license
**Quick start**
* you need to have a C++11 capable compiler (e.g. gcc >= 4.8), make, python, and cmake installed * you need to have a C++11 capable compiler (e.g. gcc >= 4.8), make, python, and cmake installed
* install LLVM >= 4.0 according to http://apt.llvm.org/ (if it is not already provided by your distribution e.g by Ubuntu 18.04)
* install conan.io (see also http://docs.conan.io/en/latest/installation.html): * install conan.io (see also http://docs.conan.io/en/latest/installation.html):
```
pip install conan
```
* setup conan to use the minres repo:
```
conan remote add minres https://api.bintray.com/conan/minres/conan-repo
conan remote add bincrafters https://api.bintray.com/conan/bincrafters/public-conan
```
* checkout source from git
* start an out-of-source build:
```
cd RISCV-VP
mkdir build
cd build
cmake ..
cmake --build .
```
* if you encounter issues when linking wrt. c++11 symbols you might have run into GCC ABI incompatibility introduced from GCC 5.0 onwards. You can fix this by adding '-s compiler.libcxx=libstdc++11' to the conan call or changing compiler.libcxx to
```
compiler.libcxx=libstdc++11
```
in $HOME/.conan/profiles/default
### prepare Ubuntu 18.04/20.04 ** Detailed Setup steps**
*** prepare Ubuntu 18.04 ***
``` ```
sudo apt-get install -y git python3-pip build-essential cmake libloki-dev zlib1g-dev libncurses5-dev \ sudo apt-get install -y git python-pip build-essential cmake libloki-dev zlib1g-dev libncurses5-dev \
libboost-dev libboost-program-options-dev libboost-system-dev libboost-thread-dev llvm-dev llvm-doc libboost-dev libboost-program-options-dev libboost-system-dev libboost-thread-dev llvm-dev llvm-doc
pip3 install --user conan pip install --user conan
``` ```
### prepare Fedora 28 *** prepare Fedora 28 ***
``` ```
#prepare system #prepare system
dnf install @development-tools gcc-c++ boost-devel zlib-devel loki-lib-devel cmake python2 python3 llvm-devel llvm-static dnf install @development-tools gcc-c++ boost-devel zlib-devel loki-lib-devel cmake python2 python3 llvm-devel llvm-static
#install conan #install conan
pip3 install --user conan pip3 install --user conan
export PATH=${PATH}:$HOME/.local/bin export PATH=${PATH}:$HOME/.local/bin
``` ```
### Build the ISS *** Build the ISS ***
``` ```
# checkout source from git: # configure conan
git clone --recursive https://github.com/Minres/HIFIVE1-VP.git conan remote add minres https://api.bintray.com/conan/minres/conan-repo
# build ISS: conan remote add bincrafters https://api.bintray.com/conan/bincrafters/public-conan
cd HIFIVE1-VP conan profile new default --detect
cmake -S . -B build # clone and build DBT-RISE-RISCV
cmake --build build -j8 git clone --recursive https://github.com/Minres/DBT-RISE-RISCV.git
``` cd DBT-RISE-RISCV/
git checkout develop
### Build the ISS mkdir build;cd build
MAKE_FLAGS="-j4" cmake ..
``` make -j4
build/platform/src/riscv-vp <elf file> -v4 -m 500ms
``` ```

2
build.sh
View File

@ -1,4 +1,4 @@
mkdir -p build/Release mkdir -f build/Release
cd build/Release cd build/Release
cmake ../.. -DCMAKE_BUILD_TYPE=RelWithDebInfo && \ cmake ../.. -DCMAKE_BUILD_TYPE=RelWithDebInfo && \
cmake --build . && \ cmake --build . && \

20
cmake/Common.cmake Normal file
View File

@ -0,0 +1,20 @@
# Function to link between sub-projects
function(add_dependent_subproject subproject_name)
#if (NOT TARGET ${subproject_name}) # target unknown
if(NOT PROJECT_${subproject_name}) # var unknown because we build only this subproject
find_package(${subproject_name} CONFIG REQUIRED)
else () # we know the target thus we are doing a build from the top directory
include_directories(../${subproject_name}/incl)
endif ()
endfunction(add_dependent_subproject)
# Make sure we tell the topdir CMakeLists that we exist (if build from topdir)
get_directory_property(hasParent PARENT_DIRECTORY)
if(hasParent)
set(PROJECT_${PROJECT_NAME} true PARENT_SCOPE)
endif()
# Function to link between sub-projects
function(add_dependent_header subproject_name)
include_directories(../${subproject_name}/incl)
endfunction(add_dependent_header)

24
conanfile.txt Normal file
View File

@ -0,0 +1,24 @@
[requires]
gsl_microsoft/20180102@bincrafters/stable
fmt/6.1.2
Seasocks/1.3.2@minres/stable
SystemC/2.3.3@minres/stable
SystemCVerification/2.0.1@minres/stable
SystemC-CCI/1.0.0@minres/stable
#fbrdb/0.1.0@minres/testing
tcc/0.9.27@minres/stable
[generators]
cmake
[options]
Seasocks:shared=True
fmt:header_only=True
SystemC:stdcxx=11
SystemC:shared=True
SystemCVerification:stdcxx=11
SystemCVerification:shared=True
SystemC-CCI:stdcxx=11
SystemC-CCI:shared=True
#fbrdb:stdcxx=11

1
dbt-core Submodule

@ -0,0 +1 @@
Subproject commit a6ece2625702e2d18d5f872140a25698539f4f6f

1
dbt-rise-core

@ -1 +0,0 @@
Subproject commit 061b78825a53fbb5568dd4d4351373ae71898bbe

1
dbt-rise-riscv

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Subproject commit 4ccf927faaf2ecb16df7b320a9918b522ff55199

88
etc/hello Debug.launch
View File

@ -1,47 +1,47 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?> <?xml version="1.0" encoding="UTF-8" standalone="no"?>
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78
etc/riscv-sim Debug hello gdb.launch
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@ -1,42 +1,42 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?> <?xml version="1.0" encoding="UTF-8" standalone="no"?>
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78
etc/riscv-sim Debug hello w plugin.launch
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@ -1,42 +1,42 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?> <?xml version="1.0" encoding="UTF-8" standalone="no"?>
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78
etc/riscv-sim Debug hello.launch
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@ -1,42 +1,42 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?> <?xml version="1.0" encoding="UTF-8" standalone="no"?>
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<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="gdb"/> <stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="gdb"/>
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_ON_FORK" value="false"/> <booleanAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_ON_FORK" value="false"/>
<stringAttribute key="org.eclipse.cdt.dsf.gdb.GDB_INIT" value=".gdbinit"/> <stringAttribute key="org.eclipse.cdt.dsf.gdb.GDB_INIT" value=".gdbinit"/>
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.NON_STOP" value="false"/> <booleanAttribute key="org.eclipse.cdt.dsf.gdb.NON_STOP" value="false"/>
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.REVERSE" value="false"/> <booleanAttribute key="org.eclipse.cdt.dsf.gdb.REVERSE" value="false"/>
<stringAttribute key="org.eclipse.cdt.dsf.gdb.REVERSE_MODE" value="UseSoftTrace"/> <stringAttribute key="org.eclipse.cdt.dsf.gdb.REVERSE_MODE" value="UseSoftTrace"/>
<listAttribute key="org.eclipse.cdt.dsf.gdb.SOLIB_PATH"/> <listAttribute key="org.eclipse.cdt.dsf.gdb.SOLIB_PATH"/>
<stringAttribute key="org.eclipse.cdt.dsf.gdb.TRACEPOINT_MODE" value="TP_NORMAL_ONLY"/> <stringAttribute key="org.eclipse.cdt.dsf.gdb.TRACEPOINT_MODE" value="TP_NORMAL_ONLY"/>
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/> <booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.internal.ui.launching.LocalApplicationCDebuggerTab.DEFAULTS_SET" value="true"/> <booleanAttribute key="org.eclipse.cdt.dsf.gdb.internal.ui.launching.LocalApplicationCDebuggerTab.DEFAULTS_SET" value="true"/>
<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="1"/> <intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="1"/>
<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/> <stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="gdb"/> <stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="gdb"/>
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="run"/> <stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="run"/>
<booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/> <booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/>
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN_SYMBOL" value="main"/> <stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN_SYMBOL" value="main"/>
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_ARGUMENTS" value="-v4&#10;${project_loc:hello}/hello"/> <stringAttribute key="org.eclipse.cdt.launch.PROGRAM_ARGUMENTS" value="-v4&#10;${project_loc:hello}/hello"/>
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="build/Debug/riscv/bin/riscv-sim"/> <stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="build/Debug/riscv/bin/riscv-sim"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="HiFive1-VP"/> <stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="RISCV-VP"/>
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/> <booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="cdt.managedbuild.config.gnu.exe.debug.1751741082"/> <stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="cdt.managedbuild.config.gnu.exe.debug.1751741082"/>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> <listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
<listEntry value="/HiFive1-VP"/> <listEntry value="/RISCV-VP"/>
</listAttribute> </listAttribute>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> <listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
<listEntry value="4"/> <listEntry value="4"/>
</listAttribute> </listAttribute>
<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;memoryBlockExpressionList context=&quot;reserved-for-future-use&quot;/&gt;&#10;"/> <stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;memoryBlockExpressionList context=&quot;reserved-for-future-use&quot;/&gt;&#10;"/>
<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/> <stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
</launchConfiguration> </launchConfiguration>

4
etc/riscv-sim Release dhrystone.launch
View File

@ -28,11 +28,11 @@
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN_SYMBOL" value="main"/> <stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN_SYMBOL" value="main"/>
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_ARGUMENTS" value="-v4&#10;${project_loc:dhrystone}/dhrystone"/> <stringAttribute key="org.eclipse.cdt.launch.PROGRAM_ARGUMENTS" value="-v4&#10;${project_loc:dhrystone}/dhrystone"/>
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="build/Release/riscv/bin/riscv-sim"/> <stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="build/Release/riscv/bin/riscv-sim"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="HiFive1-VP"/> <stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="RISCV-VP"/>
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/> <booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="cdt.managedbuild.config.gnu.exe.release.1745230171"/> <stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="cdt.managedbuild.config.gnu.exe.release.1745230171"/>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> <listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
<listEntry value="/HiFive1-VP"/> <listEntry value="/RISCV-VP"/>
</listAttribute> </listAttribute>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> <listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
<listEntry value="4"/> <listEntry value="4"/>

78
etc/riscv-vp Debug hello.launch
View File

@ -1,42 +1,42 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?> <?xml version="1.0" encoding="UTF-8" standalone="no"?>
<launchConfiguration type="org.eclipse.cdt.launch.applicationLaunchType"> <launchConfiguration type="org.eclipse.cdt.launch.applicationLaunchType">
<booleanAttribute key="de.toem.impulse.launchactivateLaunch" value="false"/> <booleanAttribute key="de.toem.impulse.launchactivateLaunch" value="false"/>
<booleanAttribute key="de.toem.impulse.launchactivateTermination" value="false"/> <booleanAttribute key="de.toem.impulse.launchactivateTermination" value="false"/>
<intAttribute key="de.toem.impulse.launchdelayLaunch" value="0"/> <intAttribute key="de.toem.impulse.launchdelayLaunch" value="0"/>
<intAttribute key="de.toem.impulse.launchlaunch" value="2"/> <intAttribute key="de.toem.impulse.launchlaunch" value="2"/>
<intAttribute key="de.toem.impulse.launchmode" value="3"/> <intAttribute key="de.toem.impulse.launchmode" value="3"/>
<stringAttribute key="de.toem.impulse.launchport" value=""/> <stringAttribute key="de.toem.impulse.launchport" value=""/>
<booleanAttribute key="de.toem.impulse.launchrestart" value="true"/> <booleanAttribute key="de.toem.impulse.launchrestart" value="true"/>
<intAttribute key="de.toem.impulse.launchterminate" value="1"/> <intAttribute key="de.toem.impulse.launchterminate" value="1"/>
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.AUTO_SOLIB" value="true"/> <booleanAttribute key="org.eclipse.cdt.dsf.gdb.AUTO_SOLIB" value="true"/>
<listAttribute key="org.eclipse.cdt.dsf.gdb.AUTO_SOLIB_LIST"/> <listAttribute key="org.eclipse.cdt.dsf.gdb.AUTO_SOLIB_LIST"/>
<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="gdb"/> <stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="gdb"/>
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_ON_FORK" value="false"/> <booleanAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_ON_FORK" value="false"/>
<stringAttribute key="org.eclipse.cdt.dsf.gdb.GDB_INIT" value=".gdbinit"/> <stringAttribute key="org.eclipse.cdt.dsf.gdb.GDB_INIT" value=".gdbinit"/>
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.NON_STOP" value="false"/> <booleanAttribute key="org.eclipse.cdt.dsf.gdb.NON_STOP" value="false"/>
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.REVERSE" value="false"/> <booleanAttribute key="org.eclipse.cdt.dsf.gdb.REVERSE" value="false"/>
<stringAttribute key="org.eclipse.cdt.dsf.gdb.REVERSE_MODE" value="UseSoftTrace"/> <stringAttribute key="org.eclipse.cdt.dsf.gdb.REVERSE_MODE" value="UseSoftTrace"/>
<listAttribute key="org.eclipse.cdt.dsf.gdb.SOLIB_PATH"/> <listAttribute key="org.eclipse.cdt.dsf.gdb.SOLIB_PATH"/>
<stringAttribute key="org.eclipse.cdt.dsf.gdb.TRACEPOINT_MODE" value="TP_NORMAL_ONLY"/> <stringAttribute key="org.eclipse.cdt.dsf.gdb.TRACEPOINT_MODE" value="TP_NORMAL_ONLY"/>
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/> <booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.internal.ui.launching.LocalApplicationCDebuggerTab.DEFAULTS_SET" value="true"/> <booleanAttribute key="org.eclipse.cdt.dsf.gdb.internal.ui.launching.LocalApplicationCDebuggerTab.DEFAULTS_SET" value="true"/>
<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="1"/> <intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="1"/>
<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/> <stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="gdb"/> <stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="gdb"/>
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="run"/> <stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="run"/>
<booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/> <booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/>
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN_SYMBOL" value="sc_main"/> <stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN_SYMBOL" value="sc_main"/>
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_ARGUMENTS" value="-v5&#10;-c system.json&#10;${project_loc:hello}/hello.rv32i"/> <stringAttribute key="org.eclipse.cdt.launch.PROGRAM_ARGUMENTS" value="-v5&#10;-c system.json&#10;${project_loc:hello}/hello"/>
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="build/Debug/bin/riscv-vp"/> <stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="build/Debug/bin/riscv-vp"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="HiFive1-VP"/> <stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="RISCV-VP"/>
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/> <booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="cdt.managedbuild.config.gnu.exe.debug.1751741082"/> <stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="cdt.managedbuild.config.gnu.exe.debug.1751741082"/>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> <listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
<listEntry value="/HiFive1-VP"/> <listEntry value="/RISCV-VP"/>
</listAttribute> </listAttribute>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> <listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
<listEntry value="4"/> <listEntry value="4"/>
</listAttribute> </listAttribute>
<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;memoryBlockExpressionList context=&quot;reserved-for-future-use&quot;/&gt;&#10;"/> <stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;memoryBlockExpressionList context=&quot;reserved-for-future-use&quot;/&gt;&#10;"/>
<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/> <stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
</launchConfiguration> </launchConfiguration>

20
external/CMakeLists.txt vendored
View File

@ -1,14 +1,28 @@
cmake_minimum_required(VERSION 3.12) cmake_minimum_required(VERSION 3.12)
set(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} ${CMAKE_CURRENT_SOURCE_DIR}/../cmake)
# Set the name of your project here # Set the name of your project here
project("external") project("external")
include(Common)
include_directories( ${PROJECT_SOURCE_DIR}/libGIS )
FILE(GLOB ElfioHeaders elfio *.hpp)
FILE(GLOB GISHeaders libGis *.h)
set(LIB_HEADERS ${ElfioHeaders} ${GISHeaders})
set(LIB_SOURCES set(LIB_SOURCES
libGIS/atmel_generic.c libGIS/atmel_generic.c
libGIS/ihex.c libGIS/ihex.c
libGIS/srecord.c libGIS/srecord.c
) )
# Define the library # Define two variables in order not to repeat ourselves.
add_library(${PROJECT_NAME} ${LIB_SOURCES}) set(LIBRARY_NAME external)
target_include_directories(${PROJECT_NAME} PUBLIC ${PROJECT_SOURCE_DIR}/libGIS)
# Define the library
add_library(${LIBRARY_NAME} ${LIB_SOURCES})

1
external/elfio vendored Submodule

@ -0,0 +1 @@
Subproject commit 580da2467b3d7da4c817d45a99a367e4b0d6d326

57
platform/CMakeLists.txt
View File

@ -1,3 +1,60 @@
cmake_minimum_required(VERSION 3.12) cmake_minimum_required(VERSION 3.12)
set(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} ${CMAKE_CURRENT_SOURCE_DIR}/../cmake) # main (top) cmake dir
set(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} ${CMAKE_CURRENT_SOURCE_DIR}/cmake) # project specific cmake dir
# CMake useful variables
set(CMAKE_RUNTIME_OUTPUT_DIRECTORY "${CMAKE_BINARY_DIR}/bin")
set(CMAKE_ARCHIVE_OUTPUT_DIRECTORY "${CMAKE_BINARY_DIR}/lib")
set(CMAKE_LIBRARY_OUTPUT_DIRECTORY "${CMAKE_BINARY_DIR}/lib")
# Set the name of your project here
project("platform")
include(Common)
find_package(Boost COMPONENTS program_options system thread filesystem REQUIRED)
# check that we have averything we need
if(!SystemC_FOUND)
message( FATAL_ERROR "SystemC library not found." )
endif()
if(!CCI_FOUND)
message( FATAL_ERROR "SystemC CCI library not found." )
endif()
# This sets the include directory for the reference project. This is the -I flag in gcc.
add_dependent_subproject(dbt-core)
add_dependent_subproject(scc)
add_dependent_subproject(riscv)
include_directories(
${PROJECT_SOURCE_DIR}/../external/elfio
${PROJECT_SOURCE_DIR}/../external/libGIS
${Boost_INCLUDE_DIRS}
)
# Mac needed variables (adapt for your needs - http://www.cmake.org/Wiki/CMake_RPATH_handling#Mac_OS_X_and_the_RPATH)
set(CMAKE_MACOSX_RPATH ON)
set(CMAKE_SKIP_BUILD_RPATH FALSE)
set(CMAKE_BUILD_WITH_INSTALL_RPATH FALSE)
set(CMAKE_INSTALL_RPATH "${CMAKE_INSTALL_PREFIX}/lib")
set(CMAKE_INSTALL_RPATH_USE_LINK_PATH TRUE)
## the following setting needs to be consistent with the library
#add_definitions(-DSC_DEFAULT_WRITER_POLICY=SC_MANY_WRITERS)
add_subdirectory(src) add_subdirectory(src)
#
# SYSTEM PACKAGING (RPM, TGZ, ...)
# _____________________________________________________________________________
#include(CPackConfig)
#
# CMAKE PACKAGING (for other CMake projects to use this one easily)
# _____________________________________________________________________________
#include(PackageConfigurator)

10
platform/incl/sysc/SiFive/fe310.h
View File

@ -47,7 +47,7 @@
#include "scc/memory.h" #include "scc/memory.h"
#include "scc/router.h" #include "scc/router.h"
#include "scc/utilities.h" #include "scc/utilities.h"
#include "tlm/scc/tlm_signal_sockets.h" #include "tlm/tlm_signal_sockets.h"
#include <array> #include <array>
#include <memory> #include <memory>
#include <sysc/kernel/sc_module.h> #include <sysc/kernel/sc_module.h>
@ -58,8 +58,8 @@ class fe310 : public sc_core::sc_module {
public: public:
SC_HAS_PROCESS(fe310);// NOLINT SC_HAS_PROCESS(fe310);// NOLINT
sc_core::sc_vector<tlm::scc::tlm_signal_initiator_socket<sc_dt::sc_logic>> pins_o; sc_core::sc_vector<tlm::tlm_signal_initiator_socket<sc_dt::sc_logic>> pins_o;
sc_core::sc_vector<tlm::scc::tlm_signal_target_socket<sc_dt::sc_logic>> pins_i; sc_core::sc_vector<tlm::tlm_signal_target_socket<sc_dt::sc_logic>> pins_i;
sc_core::sc_in<bool> erst_n; sc_core::sc_in<bool> erst_n;
@ -92,8 +92,8 @@ private:
sc_core::sc_vector<sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS>> s_global_int, s_local_int; sc_core::sc_vector<sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS>> s_global_int, s_local_int;
sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS> s_core_int; sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS> s_core_int;
sc_core::sc_vector<tlm::scc::tlm_signal_bool_opt_in> s_dummy_sck_i; sc_core::sc_vector<scc::tlm_signal_bool_opt_in> s_dummy_sck_i;
sc_core::sc_vector<tlm::scc::tlm_signal_bool_opt_out> s_dummy_sck_o; sc_core::sc_vector<scc::tlm_signal_bool_opt_out> s_dummy_sck_o;
protected: protected:
void gen_reset(); void gen_reset();

26
platform/incl/sysc/SiFive/gpio.h
View File

@ -34,11 +34,11 @@
#define _GPIO_H_ #define _GPIO_H_
#include "cci_configuration" #include "cci_configuration"
#include "tlm/scc/signal_initiator_mixin.h" #include "scc/signal_initiator_mixin.h"
#include "tlm/scc/signal_target_mixin.h" #include "scc/signal_target_mixin.h"
#include "scc/tlm_target.h" #include "scc/tlm_target.h"
#include <memory> #include <memory>
#include <tlm/scc/tlm_signal.h> #include <tlm/tlm_signal.h>
namespace sysc { namespace sysc {
@ -52,13 +52,13 @@ public:
sc_core::sc_in<bool> rst_i; sc_core::sc_in<bool> rst_i;
// sc_core::sc_inout_rv<32> pins_io; // sc_core::sc_inout_rv<32> pins_io;
sc_core::sc_vector<tlm::scc::tlm_signal_logic_out> pins_o; sc_core::sc_vector<scc::tlm_signal_logic_out> pins_o;
sc_core::sc_vector<tlm::scc::tlm_signal_logic_in> pins_i; sc_core::sc_vector<scc::tlm_signal_logic_in> pins_i;
sc_core::sc_vector<tlm::scc::tlm_signal_bool_opt_out> iof0_o; sc_core::sc_vector<scc::tlm_signal_bool_opt_out> iof0_o;
sc_core::sc_vector<tlm::scc::tlm_signal_bool_opt_out> iof1_o; sc_core::sc_vector<scc::tlm_signal_bool_opt_out> iof1_o;
sc_core::sc_vector<tlm::scc::tlm_signal_bool_opt_in> iof0_i; sc_core::sc_vector<scc::tlm_signal_bool_opt_in> iof0_i;
sc_core::sc_vector<tlm::scc::tlm_signal_bool_opt_in> iof1_i; sc_core::sc_vector<scc::tlm_signal_bool_opt_in> iof1_i;
gpio(sc_core::sc_module_name nm); gpio(sc_core::sc_module_name nm);
virtual ~gpio() override; // need to keep it in source file because of fwd declaration of gpio_regs virtual ~gpio() override; // need to keep it in source file because of fwd declaration of gpio_regs
@ -70,16 +70,16 @@ protected:
void reset_cb(); void reset_cb();
void update_pins(uint32_t changed_bits); void update_pins(uint32_t changed_bits);
void before_end_of_elaboration() override; void before_end_of_elaboration() override;
void pin_input(unsigned int tag, tlm::scc::tlm_signal_gp<sc_dt::sc_logic> &gp, sc_core::sc_time &delay); void pin_input(unsigned int tag, tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, sc_core::sc_time &delay);
void forward_pin_input(unsigned int tag, tlm::scc::tlm_signal_gp<sc_dt::sc_logic> &gp); void forward_pin_input(unsigned int tag, tlm::tlm_signal_gp<sc_dt::sc_logic> &gp);
void iof_input(unsigned int tag, unsigned iof_idx, tlm::scc::tlm_signal_gp<> &gp, sc_core::sc_time &delay); void iof_input(unsigned int tag, unsigned iof_idx, tlm::tlm_signal_gp<> &gp, sc_core::sc_time &delay);
sc_core::sc_time clk; sc_core::sc_time clk;
std::array<bool, 32> last_iof0, last_iof1; std::array<bool, 32> last_iof0, last_iof1;
std::unique_ptr<gpio_regs> regs; std::unique_ptr<gpio_regs> regs;
std::shared_ptr<sysc::WsHandler> handler; std::shared_ptr<sysc::WsHandler> handler;
private: private:
tlm::tlm_phase write_output(tlm::scc::tlm_signal_gp<sc_dt::sc_logic> &gp, size_t i, sc_dt::sc_logic val); tlm::tlm_phase write_output(tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, size_t i, sc_dt::sc_logic val);
}; };
} /* namespace sysc */ } /* namespace sysc */

8
platform/incl/sysc/SiFive/pwm.h
View File

@ -34,10 +34,10 @@
#define _PWM_H_ #define _PWM_H_
#include "cci_configuration" #include "cci_configuration"
#include "tlm/scc/signal_initiator_mixin.h" #include "scc/signal_initiator_mixin.h"
#include "tlm/scc/signal_target_mixin.h" #include "scc/signal_target_mixin.h"
#include "scc/tlm_target.h" #include "scc/tlm_target.h"
#include <tlm/scc/tlm_signal.h> #include <tlm/tlm_signal.h>
namespace sysc { namespace sysc {
@ -49,7 +49,7 @@ public:
sc_core::sc_in<sc_core::sc_time> clk_i; sc_core::sc_in<sc_core::sc_time> clk_i;
sc_core::sc_in<bool> rst_i; sc_core::sc_in<bool> rst_i;
sc_core::sc_vector<tlm::scc::tlm_signal_bool_opt_out> cmpgpio_o; sc_core::sc_vector<scc::tlm_signal_bool_opt_out> cmpgpio_o;
sc_core::sc_vector<sc_core::sc_out<bool>> cmpip_o; sc_core::sc_vector<sc_core::sc_out<bool>> cmpip_o;
pwm(sc_core::sc_module_name nm); pwm(sc_core::sc_module_name nm);

6
platform/incl/sysc/SiFive/spi.h
View File

@ -34,7 +34,7 @@
#define _SPI_H_ #define _SPI_H_
#include <sysc/utils/sc_vector.h> #include <sysc/utils/sc_vector.h>
#include <tlm/scc/tlm_signal.h> #include <tlm/tlm_signal.h>
namespace sysc { namespace sysc {
@ -48,8 +48,8 @@ public:
template <typename TYPE> template <typename TYPE>
static std::unique_ptr<spi> create(sc_core::sc_module_name nm); static std::unique_ptr<spi> create(sc_core::sc_module_name nm);
template <typename T> using tlm_in = tlm::scc::tlm_signal_opt_target_socket<T>; template <typename T> using tlm_in = tlm::tlm_signal_opt_target_socket<T>;
template <typename T> using tlm_out = tlm::scc::tlm_signal_opt_initiator_socket<T>; template <typename T> using tlm_out = tlm::tlm_signal_opt_initiator_socket<T>;
tlm::tlm_target_socket<> socket; tlm::tlm_target_socket<> socket;
sc_core::sc_in<sc_core::sc_time> clk_i; sc_core::sc_in<sc_core::sc_time> clk_i;

12
platform/incl/sysc/SiFive/uart.h
View File

@ -34,10 +34,10 @@
#define _UART_H_ #define _UART_H_
#include "cci_configuration" #include "cci_configuration"
#include "tlm/scc/signal_initiator_mixin.h" #include "scc/signal_initiator_mixin.h"
#include "tlm/scc/signal_target_mixin.h" #include "scc/signal_target_mixin.h"
#include "scc/tlm_target.h" #include "scc/tlm_target.h"
#include <tlm/scc/tlm_signal.h> #include <tlm/tlm_signal.h>
namespace sysc { namespace sysc {
class tlm_signal_uart_extension; class tlm_signal_uart_extension;
@ -49,8 +49,8 @@ public:
SC_HAS_PROCESS(uart);// NOLINT SC_HAS_PROCESS(uart);// NOLINT
sc_core::sc_in<sc_core::sc_time> clk_i; sc_core::sc_in<sc_core::sc_time> clk_i;
sc_core::sc_in<bool> rst_i; sc_core::sc_in<bool> rst_i;
tlm::scc::tlm_signal_bool_out tx_o; scc::tlm_signal_bool_out tx_o;
tlm::scc::tlm_signal_bool_in rx_i; scc::tlm_signal_bool_in rx_i;
sc_core::sc_out<bool> irq_o; sc_core::sc_out<bool> irq_o;
@ -63,7 +63,7 @@ protected:
void clock_cb(); void clock_cb();
void reset_cb(); void reset_cb();
void transmit_data(); void transmit_data();
void receive_data(tlm::scc::tlm_signal_gp<> &gp, sc_core::sc_time &delay); void receive_data(tlm::tlm_signal_gp<> &gp, sc_core::sc_time &delay);
void update_irq(); void update_irq();
sc_core::sc_time clk{sc_core::SC_ZERO_TIME}, rx_last_start{sc_core::SC_ZERO_TIME}; sc_core::sc_time clk{sc_core::SC_ZERO_TIME}, rx_last_start{sc_core::SC_ZERO_TIME};
std::unique_ptr<uart_regs> regs; std::unique_ptr<uart_regs> regs;

374
platform/incl/sysc/rtl/VTLSPI.h
View File

@ -1,374 +0,0 @@
// Verilated -*- SystemC -*-
// DESCRIPTION: Verilator output: Primary design header
//
// This header should be included by all source files instantiating the design.
// The class here is then constructed to instantiate the design.
// See the Verilator manual for examples.
#ifndef _VTLSPI_H_
#define _VTLSPI_H_
#include "systemc.h"
#include "verilated_heavy.h"
#include "verilated_sc.h"
class VTLSPI__Syms;
//----------
SC_MODULE(VTLSPI) {
public:
// PORTS
// The application code writes and reads these signals to
// propagate new values into/out from the Verilated model.
sc_in<bool> clock;
sc_in<bool> reset;
sc_out<bool> auto_int_xing_out_sync_0;
sc_out<bool> auto_control_xing_in_a_ready;
sc_in<bool> auto_control_xing_in_a_valid;
sc_in<uint32_t> auto_control_xing_in_a_bits_opcode;
sc_in<uint32_t> auto_control_xing_in_a_bits_param;
sc_in<uint32_t> auto_control_xing_in_a_bits_size;
sc_in<uint32_t> auto_control_xing_in_a_bits_source;
sc_in<uint32_t> auto_control_xing_in_a_bits_mask;
sc_in<bool> auto_control_xing_in_a_bits_corrupt;
sc_in<bool> auto_control_xing_in_d_ready;
sc_out<bool> auto_control_xing_in_d_valid;
sc_out<uint32_t> auto_control_xing_in_d_bits_opcode;
sc_out<uint32_t> auto_control_xing_in_d_bits_size;
sc_out<uint32_t> auto_control_xing_in_d_bits_source;
sc_out<bool> auto_io_out_sck;
sc_in<bool> auto_io_out_dq_0_i;
sc_out<bool> auto_io_out_dq_0_o;
sc_out<bool> auto_io_out_dq_0_oe;
sc_in<bool> auto_io_out_dq_1_i;
sc_out<bool> auto_io_out_dq_1_o;
sc_out<bool> auto_io_out_dq_1_oe;
sc_in<bool> auto_io_out_dq_2_i;
sc_in<bool> auto_io_out_dq_3_i;
sc_out<bool> auto_io_out_cs_0;
sc_out<bool> auto_io_out_cs_2;
sc_out<bool> auto_io_out_cs_3;
sc_in<uint32_t> auto_control_xing_in_a_bits_address;
sc_in<uint32_t> auto_control_xing_in_a_bits_data;
sc_out<uint32_t> auto_control_xing_in_d_bits_data;
// LOCAL SIGNALS
// Internals; generally not touched by application code
// Anonymous structures to workaround compiler member-count bugs
struct {
VL_SIG8(TLSPI__DOT__fifo_io_tx_valid, 0, 0);
VL_SIG8(TLSPI__DOT__fifo_io_ip_txwm, 0, 0);
VL_SIG8(TLSPI__DOT__fifo_io_ip_rxwm, 0, 0);
VL_SIG8(TLSPI__DOT__mac_io_link_tx_ready, 0, 0);
VL_SIG8(TLSPI__DOT__ctrl_fmt_proto, 1, 0);
VL_SIG8(TLSPI__DOT__ctrl_fmt_endian, 0, 0);
VL_SIG8(TLSPI__DOT__ctrl_fmt_iodir, 0, 0);
VL_SIG8(TLSPI__DOT__ctrl_fmt_len, 3, 0);
VL_SIG8(TLSPI__DOT__ctrl_sck_pol, 0, 0);
VL_SIG8(TLSPI__DOT__ctrl_sck_pha, 0, 0);
VL_SIG8(TLSPI__DOT__ctrl_cs_id, 1, 0);
VL_SIG8(TLSPI__DOT__ctrl_cs_dflt_0, 0, 0);
VL_SIG8(TLSPI__DOT__ctrl_cs_dflt_1, 0, 0);
VL_SIG8(TLSPI__DOT__ctrl_cs_dflt_2, 0, 0);
VL_SIG8(TLSPI__DOT__ctrl_cs_dflt_3, 0, 0);
VL_SIG8(TLSPI__DOT__ctrl_cs_mode, 1, 0);
VL_SIG8(TLSPI__DOT__ctrl_dla_cssck, 7, 0);
VL_SIG8(TLSPI__DOT__ctrl_dla_sckcs, 7, 0);
VL_SIG8(TLSPI__DOT__ctrl_dla_intercs, 7, 0);
VL_SIG8(TLSPI__DOT__ctrl_dla_interxfr, 7, 0);
VL_SIG8(TLSPI__DOT__ctrl_wm_tx, 3, 0);
VL_SIG8(TLSPI__DOT__ctrl_wm_rx, 3, 0);
VL_SIG8(TLSPI__DOT__ie_txwm, 0, 0);
VL_SIG8(TLSPI__DOT__ie_rxwm, 0, 0);
VL_SIG8(TLSPI__DOT___T_426, 7, 0);
VL_SIG8(TLSPI__DOT___T_1495, 0, 0);
VL_SIG8(TLSPI__DOT___T_1732, 0, 0);
VL_SIG8(TLSPI__DOT___T_1766, 0, 0);
VL_SIG8(TLSPI__DOT___T_1796, 0, 0);
VL_SIG8(TLSPI__DOT___T_1742, 0, 0);
VL_SIG8(TLSPI__DOT___T_1904, 0, 0);
VL_SIG8(TLSPI__DOT___T_1844, 0, 0);
VL_SIG8(TLSPI__DOT___T_1832, 0, 0);
VL_SIG8(TLSPI__DOT___T_1802, 0, 0);
VL_SIG8(TLSPI__DOT___GEN_155, 0, 0);
VL_SIG8(TLSPI__DOT___GEN_162, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_52, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_55, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_73, 3, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_97, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_167, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_181, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_245, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_486, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_496, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_499, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_500, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_509, 2, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_511, 2, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_513, 1, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_515, 5, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_522, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_526, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_530, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_534, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_538, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_541, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_542, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_551, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_554, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_555, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_564, 2, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_568, 1, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_570, 5, 0);
};
struct {
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_579, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_587, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_591, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_602, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_615, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_618, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_619, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_636, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_639, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_640, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_658, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_673, 0, 0);
VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_687, 0, 0);
VL_SIG8(TLSPI__DOT__intsource__DOT__AsyncResetRegVec_w1_i0__DOT__reg_0_q, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_52, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_55, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_73, 3, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_97, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_167, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_181, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_245, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_486, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_496, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_499, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_500, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_509, 2, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_511, 2, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_513, 1, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_515, 5, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_522, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_526, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_530, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_534, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_538, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_541, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_542, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_551, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_554, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_555, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_564, 2, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_568, 1, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_570, 5, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_579, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_587, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_591, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_602, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_615, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_618, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_619, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_636, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_639, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_640, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_658, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_673, 0, 0);
VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_687, 0, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__rxq_io_enq_valid, 0, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__rxen, 0, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT___T_57, 3, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__cs_mode, 1, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data, 7, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT__value, 2, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT__value_1, 2, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_39, 0, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_40, 0, 0);
};
struct {
VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_42, 0, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_43, 0, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_44, 0, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_47, 0, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_52, 2, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_54, 2, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT__value, 2, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT__value_1, 2, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_39, 0, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_40, 0, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_42, 0, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_43, 0, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_44, 0, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_47, 0, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_52, 2, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_54, 2, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy_io_op_valid, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy_io_op_bits_fn, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy_io_op_bits_stb, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy_io_op_bits_cnt, 7, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__cs_id, 1, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__cs_dflt_0, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__cs_dflt_1, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__cs_dflt_2, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__cs_dflt_3, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__cs_set, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT___T_69, 3, 0);
VL_SIG8(TLSPI__DOT__mac__DOT___T_88, 3, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__clear, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__cs_assert, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__cs_deassert, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT___T_94, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__state, 1, 0);
VL_SIG8(TLSPI__DOT__mac__DOT___T_97, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT___T_99, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT___T_102, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT___T_107, 3, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_pol, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_pha, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_proto, 1, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_endian, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_iodir, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__setup_d, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_42, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_43, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__sample_d, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_44, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_45, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__last_d, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__scnt, 7, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__sched, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__sck, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__cref, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__cinv, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__rxd, 3, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__buffer, 7, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_71, 7, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__shift, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_96, 7, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__txd, 3, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_154, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_155, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__accept, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__txd_in, 3, 0);
};
struct {
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_102, 1, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__done, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_156, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__xfr, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___GEN_15, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___GEN_22, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_111, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__txen_2, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_128, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_148, 0, 0);
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___GEN_13, 0, 0);
VL_SIG16(TLSPI__DOT__ctrl_sck_div, 11, 0);
VL_SIG16(TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_div, 11, 0);
VL_SIG16(TLSPI__DOT__mac__DOT__phy__DOT__tcnt, 11, 0);
VL_SIG16(TLSPI__DOT__mac__DOT__phy__DOT___T_47, 11, 0);
VL_SIG16(TLSPI__DOT__mac__DOT__phy__DOT___GEN_16, 11, 0);
VL_SIG(TLSPI__DOT___T_626, 31, 0);
VL_SIG(TLSPI__DOT___GEN_172, 31, 0);
VL_SIG(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_517, 28, 0);
VL_SIG(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_679, 31, 0);
VL_SIG(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_690, 31, 0);
VL_SIG(TLSPI__DOT__buffer__DOT__TLMonitor__DOT__plusarg_reader__DOT__myplus, 31, 0);
VL_SIG(TLSPI__DOT__TLMonitor__DOT___T_517, 28, 0);
VL_SIG(TLSPI__DOT__TLMonitor__DOT___T_679, 31, 0);
VL_SIG(TLSPI__DOT__TLMonitor__DOT___T_690, 31, 0);
VL_SIG(TLSPI__DOT__TLMonitor__DOT__plusarg_reader__DOT__myplus, 31, 0);
VL_SIG64(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_604, 63, 0);
VL_SIG64(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___GEN_15, 63, 0);
VL_SIG64(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_677, 63, 0);
VL_SIG64(TLSPI__DOT__TLMonitor__DOT___T_604, 63, 0);
VL_SIG64(TLSPI__DOT__TLMonitor__DOT___GEN_15, 63, 0);
VL_SIG64(TLSPI__DOT__TLMonitor__DOT___T_677, 63, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_35[8], 7, 0);
VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_35[8], 7, 0);
};
// LOCAL VARIABLES
// Internals; generally not touched by application code
VL_SIG8(__Vcellinp__TLSPI__reset, 0, 0);
VL_SIG8(__Vcellinp__TLSPI__clock, 0, 0);
VL_SIG8(__Vcellinp__TLSPI__auto_io_out_dq_3_i, 0, 0);
VL_SIG8(__Vcellinp__TLSPI__auto_io_out_dq_2_i, 0, 0);
VL_SIG8(__Vcellinp__TLSPI__auto_io_out_dq_1_i, 0, 0);
VL_SIG8(__Vcellinp__TLSPI__auto_io_out_dq_0_i, 0, 0);
VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_d_ready, 0, 0);
VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_corrupt, 0, 0);
VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask, 3, 0);
VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_source, 5, 0);
VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size, 1, 0);
VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param, 2, 0);
VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode, 2, 0);
VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_a_valid, 0, 0);
VL_SIG8(__VinpClk__TOP____Vcellinp__TLSPI__reset, 0, 0);
VL_SIG8(__Vclklast__TOP____Vcellinp__TLSPI__clock, 0, 0);
VL_SIG8(__Vclklast__TOP____VinpClk__TOP____Vcellinp__TLSPI__reset, 0, 0);
VL_SIG8(__Vchglast__TOP____Vcellinp__TLSPI__reset, 0, 0);
VL_SIG(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data, 31, 0);
VL_SIG(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address, 28, 0);
// INTERNAL VARIABLES
// Internals; generally not touched by application code
VTLSPI__Syms *__VlSymsp; // Symbol table
// PARAMETERS
// Parameters marked /*verilator public*/ for use by application code
// CONSTRUCTORS
private:
VL_UNCOPYABLE(VTLSPI); ///< Copying not allowed
public:
SC_CTOR(VTLSPI);
virtual ~VTLSPI();
// API METHODS
private:
void eval();
public:
void final();
// INTERNAL METHODS
private:
static void _eval_initial_loop(VTLSPI__Syms * __restrict vlSymsp);
public:
void __Vconfigure(VTLSPI__Syms * symsp, bool first);
private:
static QData _change_request(VTLSPI__Syms * __restrict vlSymsp);
public:
static void _combo__TOP__2(VTLSPI__Syms * __restrict vlSymsp);
static void _combo__TOP__6(VTLSPI__Syms * __restrict vlSymsp);
static void _combo__TOP__8(VTLSPI__Syms * __restrict vlSymsp);
private:
void _ctor_var_reset();
public:
static void _eval(VTLSPI__Syms * __restrict vlSymsp);
private:
#ifdef VL_DEBUG
void _eval_debug_assertions();
#endif // VL_DEBUG
public:
static void _eval_initial(VTLSPI__Syms * __restrict vlSymsp);
static void _eval_settle(VTLSPI__Syms * __restrict vlSymsp);
static void _initial__TOP__1(VTLSPI__Syms * __restrict vlSymsp);
static void _sequent__TOP__4(VTLSPI__Syms * __restrict vlSymsp);
static void _sequent__TOP__5(VTLSPI__Syms * __restrict vlSymsp);
static void _sequent__TOP__7(VTLSPI__Syms * __restrict vlSymsp);
static void _settle__TOP__3(VTLSPI__Syms * __restrict vlSymsp);
}
VL_ATTR_ALIGNED(128);
#endif // guard

37
platform/incl/sysc/rtl/VTLSPI__Syms.h
View File

@ -1,37 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Symbol table internal header
//
// Internal details; most calling programs do not need this header
#ifndef _VTLSPI__Syms_H_
#define _VTLSPI__Syms_H_
#include "verilated_heavy.h"
// INCLUDE MODULE CLASSES
#include "VTLSPI.h"
// SYMS CLASS
class VTLSPI__Syms : public VerilatedSyms {
public:
// LOCAL STATE
const char *__Vm_namep;
bool __Vm_didInit;
// SUBCELL STATE
VTLSPI *TOPp;
// SCOPE NAMES
VerilatedScope __Vscope_TLSPI__TLMonitor;
VerilatedScope __Vscope_TLSPI__buffer__TLMonitor;
// CREATORS
VTLSPI__Syms(VTLSPI *topp, const char *namep);
~VTLSPI__Syms() {}
// METHODS
inline const char *name() { return __Vm_namep; }
} VL_ATTR_ALIGNED(64);
#endif // guard

83
platform/incl/sysc/rtl/tl_uh_bfm.h
View File

@ -1,83 +0,0 @@
/*******************************************************************************
* Copyright (C) 2018 MINRES Technologies GmbH
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
*******************************************************************************/
#ifndef _TLBFM_H_
#define _TLBFM_H_
#include "scc/target_mixin.h"
#include "scv4tlm/tlm_rec_target_socket.h"
#include <tlm.h>
namespace sysc {
class tl_uh_bfm : public sc_core::sc_module {
public:
SC_HAS_PROCESS(tl_uh_bfm);// NOLINT
enum { Get = 4, AccessAckData = 1, PutFullData = 0, PutPartialData = 1, AccessAck = 0 };
scc::target_mixin<scv4tlm::tlm_rec_target_socket<32>> socket;
sc_core::sc_in<bool> clock;
sc_core::sc_in<bool> reset;
sc_core::sc_in<bool> a_ready;
sc_core::sc_out<bool> a_valid;
sc_core::sc_out<uint32_t> a_bits_address;
sc_core::sc_out<uint32_t> a_bits_data;
sc_core::sc_out<uint32_t> a_bits_opcode;
sc_core::sc_out<uint32_t> a_bits_param;
sc_core::sc_out<uint32_t> a_bits_size;
sc_core::sc_out<uint32_t> a_bits_source;
sc_core::sc_out<uint32_t> a_bits_mask;
sc_core::sc_out<bool> a_bits_corrupt;
sc_core::sc_in<uint32_t> d_bits_data;
sc_core::sc_out<bool> d_ready;
sc_core::sc_in<bool> d_valid;
sc_core::sc_in<uint32_t> d_bits_opcode;
sc_core::sc_in<uint32_t> d_bits_size;
sc_core::sc_in<uint32_t> d_bits_source;
tl_uh_bfm(sc_core::sc_module_name nm, int64_t offset = 0);
~tl_uh_bfm() override;
private:
const int64_t offset;
tlm_utils::peq_with_get<tlm::tlm_generic_payload> fw_queue;
std::deque<tlm::tlm_generic_payload *> tl_in_progress;
void fw_thread();
void tl_response_method();
};
} /* namespace sysc */
#endif /* _TLBFM_H_ */

8
platform/incl/sysc/tlm_extensions.h
View File

@ -33,10 +33,10 @@
#ifndef _SYSC_TLM_EXTENSIONS_H_ #ifndef _SYSC_TLM_EXTENSIONS_H_
#define _SYSC_TLM_EXTENSIONS_H_ #define _SYSC_TLM_EXTENSIONS_H_
#include "tlm/scc/tlm_extensions.h" #include "tlm/tlm_extensions.h"
namespace sysc { namespace sysc {
struct tlm_signal_uart_extension : public tlm::scc::tlm_unmanaged_extension<tlm_signal_uart_extension> { struct tlm_signal_uart_extension : public tlm::tlm_unmanaged_extension<tlm_signal_uart_extension> {
struct uart_tx { struct uart_tx {
unsigned data_bits : 4; unsigned data_bits : 4;
@ -48,7 +48,7 @@ struct tlm_signal_uart_extension : public tlm::scc::tlm_unmanaged_extension<tlm_
sc_core::sc_time start_time; sc_core::sc_time start_time;
}; };
struct tlm_signal_spi_extension : public tlm::scc::tlm_unmanaged_extension<tlm_signal_spi_extension> { struct tlm_signal_spi_extension : public tlm::tlm_unmanaged_extension<tlm_signal_spi_extension> {
struct spi_tx { struct spi_tx {
unsigned data_bits : 5; unsigned data_bits : 5;
@ -59,7 +59,7 @@ struct tlm_signal_spi_extension : public tlm::scc::tlm_unmanaged_extension<tlm_s
} tx; } tx;
sc_core::sc_time start_time; sc_core::sc_time start_time;
void copy_from(tlm::tlm_extension_base const &other) override { void copy_from(tlm_extension_base const &other) override {
auto &o = static_cast<const type &>(other); auto &o = static_cast<const type &>(other);
this->tx = o.tx; this->tx = o.tx;
this->start_time = o.start_time; this->start_time = o.start_time;

6
platform/incl/sysc/top/hifive1.h
View File

@ -35,7 +35,7 @@
#include <sysc/top/terminal.h> #include <sysc/top/terminal.h>
#include <sysc/top/mcp_adc.h> #include <sysc/top/mcp_adc.h>
#include "tlm/scc/tlm_signal_sockets.h" #include "tlm/tlm_signal_sockets.h"
#include <boost/preprocessor.hpp> #include <boost/preprocessor.hpp>
#include <systemc> #include <systemc>
#include <sysc/SiFive/fe310.h> #include <sysc/SiFive/fe310.h>
@ -56,8 +56,8 @@ struct hifive1 : public sc_core::sc_module {
hifive1(sc_core::sc_module_name nm); hifive1(sc_core::sc_module_name nm);
protected: protected:
sc_core::sc_vector<tlm::scc::tlm_signal<sc_dt::sc_logic>> s_gpio; sc_core::sc_vector<tlm::tlm_signal<sc_dt::sc_logic>> s_gpio;
sc_core::sc_vector<tlm::scc::tlm_signal_logic_in> h_bridge; sc_core::sc_vector<scc::tlm_signal_logic_in> h_bridge;
fe310 i_fe310; fe310 i_fe310;
terminal i_terminal; terminal i_terminal;
mcp_3208 i_adc; mcp_3208 i_adc;

18
platform/incl/sysc/top/mcp_adc.h
View File

@ -34,12 +34,12 @@
#define _SYSC_TOP_MCP3008_H_ #define _SYSC_TOP_MCP3008_H_
#include "cci_configuration" #include "cci_configuration"
#include "tlm/scc/signal_initiator_mixin.h" #include "scc/signal_initiator_mixin.h"
#include "tlm/scc/signal_target_mixin.h" #include "scc/signal_target_mixin.h"
#include "sysc/tlm_extensions.h" #include "sysc/tlm_extensions.h"
#include <sysc/kernel/sc_module.h> #include <sysc/kernel/sc_module.h>
#include <sysc/utils/sc_vector.h> #include <sysc/utils/sc_vector.h>
#include <tlm/scc/tlm_signal.h> #include <tlm/tlm_signal.h>
namespace sysc { namespace sysc {
@ -49,10 +49,10 @@ public:
template <typename TYPE> template <typename TYPE>
static std::unique_ptr<mcp_adc> create(sc_core::sc_module_name nm); static std::unique_ptr<mcp_adc> create(sc_core::sc_module_name nm);
tlm::scc::tlm_signal_logic_in sck_i; scc::tlm_signal_logic_in sck_i;
tlm::scc::tlm_signal_logic_out miso_o; scc::tlm_signal_logic_out miso_o;
tlm::scc::tlm_signal_logic_in mosi_i; scc::tlm_signal_logic_in mosi_i;
tlm::scc::tlm_signal_logic_in cs_i; scc::tlm_signal_logic_in cs_i;
sc_core::sc_in<double> vref_i; sc_core::sc_in<double> vref_i;
sc_core::sc_vector<sc_core::sc_in<double>> ch_i; sc_core::sc_vector<sc_core::sc_in<double>> ch_i;
@ -86,7 +86,7 @@ public:
~mcp_3008() override = default; ~mcp_3008() override = default;
private: private:
tlm::tlm_sync_enum receive(tlm::scc::tlm_signal_gp<sc_dt::sc_logic> &, tlm::tlm_phase &, sc_core::sc_time &); tlm::tlm_sync_enum receive(tlm::tlm_signal_gp<sc_dt::sc_logic> &, tlm::tlm_phase &, sc_core::sc_time &);
void do_conversion(); void do_conversion();
unsigned idx, rx_bits; unsigned idx, rx_bits;
std::array<uint8_t, 3> rx_bytes, tx_bytes; std::array<uint8_t, 3> rx_bytes, tx_bytes;
@ -103,7 +103,7 @@ public:
~mcp_3208() override = default; ~mcp_3208() override = default;
private: private:
tlm::tlm_sync_enum receive(tlm::scc::tlm_signal_gp<sc_dt::sc_logic> &, tlm::tlm_phase &, sc_core::sc_time &); tlm::tlm_sync_enum receive(tlm::tlm_signal_gp<sc_dt::sc_logic> &, tlm::tlm_phase &, sc_core::sc_time &);
void sample_inputs(); void sample_inputs();
void do_conversion(); void do_conversion();
unsigned idx, rx_bits, byte_offs, bit_offs; unsigned idx, rx_bits, byte_offs, bit_offs;

12
platform/incl/sysc/top/terminal.h
View File

@ -34,9 +34,9 @@
#define _SYSC_TOP_TERMINAL_H_ #define _SYSC_TOP_TERMINAL_H_
#include "cci_configuration" #include "cci_configuration"
#include "tlm/scc/signal_initiator_mixin.h" #include "scc/signal_initiator_mixin.h"
#include "tlm/scc/signal_target_mixin.h" #include "scc/signal_target_mixin.h"
#include "tlm/scc/tlm_signal.h" #include "tlm/tlm_signal.h"
#include <memory> #include <memory>
#include <sysc/kernel/sc_module.h> #include <sysc/kernel/sc_module.h>
@ -45,8 +45,8 @@ class WsHandler;
class terminal : public sc_core::sc_module { class terminal : public sc_core::sc_module {
public: public:
tlm::scc::tlm_signal_logic_out tx_o; scc::tlm_signal_logic_out tx_o;
tlm::scc::tlm_signal_logic_in rx_i; scc::tlm_signal_logic_in rx_i;
terminal(); terminal();
@ -58,7 +58,7 @@ public:
protected: protected:
void before_end_of_elaboration(); void before_end_of_elaboration();
void receive(tlm::scc::tlm_signal_gp<sc_dt::sc_logic> &gp, sc_core::sc_time &delay); void receive(tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, sc_core::sc_time &delay);
std::vector<uint8_t> queue; std::vector<uint8_t> queue;
std::shared_ptr<sysc::WsHandler> handler; std::shared_ptr<sysc::WsHandler> handler;

53
platform/src/CLIParser.cpp
View File

@ -68,7 +68,6 @@ CLIParser::CLIParser(int argc, char *argv[])
// --help option // --help option
if (vm_.count("help")) { if (vm_.count("help")) {
std::cout << "DBT-RISE-RiscV simulator for RISC-V" << std::endl << desc << std::endl; std::cout << "DBT-RISE-RiscV simulator for RISC-V" << std::endl << desc << std::endl;
exit(0);
} }
po::notify(vm_); // throws on error, so do after help in case there are any problems po::notify(vm_); // throws on error, so do after help in case there are any problems
valid = true; valid = true;
@ -76,58 +75,50 @@ CLIParser::CLIParser(int argc, char *argv[])
std::cerr << "ERROR: " << e.what() << std::endl << std::endl; std::cerr << "ERROR: " << e.what() << std::endl << std::endl;
std::cerr << desc << std::endl; std::cerr << desc << std::endl;
} }
auto log_level = vm_["verbose"].as<unsigned>();
auto verbosity = !vm_["Verbose"].defaulted()?vm_["Verbose"].as<unsigned>():vm_["verbose"].as<unsigned>();
auto colored_output = vm_["Verbose"].defaulted();
auto dbg_level = std::min<unsigned>(logging::DBGTRACE, verbosity);
auto verbosity = !vm_["Verbose"].defaulted() ? vm_["Verbose"].as<unsigned>() : vm_.count("verbose") ? vm_["verbose"].as<unsigned>() : 3; auto l = logging::as_log_level(log_level > 6 ? 6 : log_level);
auto colored_output = vm_["Verbose"].defaulted();
auto dbg_level = vm_.count("debug-level")
? vm_["debug-level"].as<scc::log>()
: static_cast<scc::log>(std::min<unsigned>(static_cast<unsigned>(scc::log::DBGTRACE), verbosity));
auto log_regex = vm_["log-filter"].as<std::string>(); auto log_regex = vm_["log-filter"].as<std::string>();
if (vm_.count("log-file")) { if (vm_.count("log-file")) {
auto log_file_name = vm_["log-file"].as<std::string>(); auto log_file_name = vm_["log-file"].as<std::string>();
scc::init_logging(scc::LogConfig() scc::init_logging(scc::LogConfig()
.logFileName(log_file_name) .logFileName(log_file_name)
.logLevel(dbg_level) .logLevel(static_cast<logging::log_level>(dbg_level))
.logFilterRegex(log_regex) .logFilterRegex(log_regex)
.coloredOutput(colored_output) .coloredOutput(colored_output)
); );
} else { } else {
scc::init_logging(scc::LogConfig() scc::init_logging(scc::LogConfig()
.logLevel(dbg_level) .logLevel(static_cast<logging::log_level>(dbg_level))
.logFilterRegex(log_regex) .logFilterRegex(log_regex)
.coloredOutput(colored_output) .coloredOutput(colored_output)
); );
} }
LOGGER(DEFAULT)::reporting_level()=static_cast<logging::log_level>(dbg_level);
LOGGER(DEFAULT)::print_time()=false;
LOGGER(DEFAULT)::print_severity()=false;
LOG_OUTPUT(DEFAULT)::ostream() = &std::cout;
} }
void CLIParser::build() { void CLIParser::build() {
// clang-format off // clang-format off
desc.add_options() desc.add_options()
("help,h", "Print help message") ("help,h", "Print help message")
("verbose,v", po::value<unsigned>()->implicit_value(4), "Sets logging verbosity") ("verbose,v", po::value<unsigned>()->implicit_value(3), "Sets logging verbosity")
("Verbose,V", po::value<unsigned>()->default_value(logging::INFO), "Debug output level as with --verbose but print non-colored") ("Verbose,V", po::value<unsigned>()->default_value(logging::INFO), "Debug output level as with --verbose but print non-colored")
("debug-level,D", po::value<scc::log>(), "Debug output level (textual) as with --verbose") ("log-file", po::value<std::string>(), "Sets default log file.")
("log-file", po::value<std::string>(), "Sets default log file.") ("log-filter", po::value<std::string>()->default_value(""), "log filter regular expression name")
("log-filter", po::value<std::string>()->default_value(""), "log filter regular expression name") ("disass,d", po::value<std::string>()->implicit_value(""), "Enables disassembly")
("disass,d", po::value<std::string>()->implicit_value(""), "Enables disassembly") ("elf,l", po::value<std::string>(), "ELF file to load")
("elf,l", po::value<std::string>(), "ELF file to load") ("gdb-port,g", po::value<unsigned short>()->default_value(0), "enable gdb server and specify port to use")
("gdb-port,g", po::value<unsigned short>()->default_value(0), "enable gdb server and specify port to use") ("dump-ir", "dump the intermediate representation")
("dump-ir", "dump the intermediate representation") ("quantum", po::value<unsigned>(), "SystemC quantum time in ns")
("quantum", po::value<unsigned>(), "SystemC quantum time in ns") ("reset,r", po::value<std::string>(), "reset address")
("reset,r", po::value<std::string>(), "reset address") ("trace-level,t", po::value<unsigned>()->default_value(0), "enable tracing, or combination of 1=signals and 2=TX text, 4=TX compressed text, 6=TX in SQLite")
("trace-level,t", po::value<unsigned>()->default_value(0), "enable tracing, or combination of 1=signals and 2=TX text, 4=TX compressed text, 6=TX in SQLite")
("trace-default-on", "enables tracing for all unspecified modules") ("trace-default-on", "enables tracing for all unspecified modules")
("trace-file", po::value<std::string>()->default_value("system"), "set th ename of the trace file") ("trace-file", po::value<std::string>()->default_value("system"), "set th ename of the trace file")
("max_time,m", po::value<std::string>(), "maximum time to run") ("max_time,m", po::value<std::string>(), "maximum time to run")
("backend", po::value<std::string>()->default_value("tcc"), "ISS engine to use") ("config-file,c", po::value<std::string>()->default_value(""), "read configuration from file")
("heart-beat,b", "Enable heartbeat printing")
("config-file,c", po::value<std::string>()->default_value(""), "read configuration from file")
("dump-config,dc", po::value<std::string>()->default_value(""), "dump configuration to file file"); ("dump-config,dc", po::value<std::string>()->default_value(""), "dump configuration to file file");
// clang-format on // clang-format on
} }

113
platform/src/CMakeLists.txt
View File

@ -1,14 +1,6 @@
cmake_minimum_required(VERSION 3.12)
project(platform VERSION 1.0.0)
include(GNUInstallDirs)
# library files # library files
FILE(GLOB RiscVSCHeaders ${PROJECT_SOURCE_DIR}/incl/sysc/*.h ${PROJECT_SOURCE_DIR}/incl/sysc/*/*.h) FILE(GLOB RiscVSCHeaders ${PROJECT_SOURCE_DIR}/incl/sysc/*.h ${PROJECT_SOURCE_DIR}/incl/sysc/*/*.h)
set(LIB_HEADERS ${RiscVSCHeaders} ) set(LIB_HEADERS ${RiscVSCHeaders} )
set(LIB_SOURCES set(LIB_SOURCES
sysc/aon.cpp sysc/aon.cpp
sysc/BLDC.cpp sysc/BLDC.cpp
@ -29,51 +21,86 @@ set(LIB_SOURCES
sysc/uart.cpp sysc/uart.cpp
CLIParser.cpp ) CLIParser.cpp )
if(VERILATOR_FOUND) set(APP_SOURCES sc_main.cpp)
set(LIB_SOURCES ${LIB_SOURCES}
rtl/spi_rtl.cpp
rtl/tl_uh_bfm.cpp
rtl/VTLSPI__Syms.cpp
rtl/VTLSPI.cpp
)
set_source_files_properties(beh/fe310.cpp PROPERTIES COMPILE_DEFINITIONS "HAS_VERILATOR")
endif()
add_library(platform ${LIB_SOURCES}) # Define two variables in order not to repeat ourselves.
target_include_directories(platform PUBLIC ../incl) set(LIBRARY_NAME platform)
target_link_libraries(platform PUBLIC dbt-rise-riscv-sc Seasocks::seasocks external)
if(VERILATOR_FOUND) ## the following setting needs to be consistent with the library
message(STATUS "Verilator found at ${VERILATOR_EXECUTABLE}") #add_definitions(-DSC_DEFAULT_WRITER_POLICY=SC_MANY_WRITERS)
target_include_directories(platform PRIVATE ${PROJECT_SOURCE_DIR}/incl/sysc/rtl)
target_include_directories(platform SYSTEM PRIVATE ${VERILATOR_INCLUDE_DIR}) # Define the library
endif() add_library(${LIBRARY_NAME} ${LIB_SOURCES})
set_target_properties(platform PROPERTIES
VERSION ${PROJECT_VERSION} # ${VERSION} was defined in the main CMakeLists. # Links the target exe against the libraries
target_link_libraries(${LIBRARY_NAME} riscv_sc)
target_link_libraries(${LIBRARY_NAME} dbt-core)
target_link_libraries(${LIBRARY_NAME} softfloat)
target_link_libraries(${LIBRARY_NAME} scc)
target_link_libraries(${LIBRARY_NAME} CONAN_PKG::Seasocks)
target_link_libraries(${LIBRARY_NAME} external)
target_link_libraries(${LIBRARY_NAME} ${llvm_libs})
target_link_libraries(${LIBRARY_NAME} ${Boost_LIBRARIES} )
set_target_properties(${LIBRARY_NAME} PROPERTIES
VERSION ${VERSION} # ${VERSION} was defined in the main CMakeLists.
FRAMEWORK FALSE FRAMEWORK FALSE
PUBLIC_HEADER "${LIB_HEADERS}" # specify the public headers PUBLIC_HEADER "${LIB_HEADERS}" # specify the public headers
) )
add_executable(riscv-vp sc_main.cpp) # This is a make target, so you can do a "make riscv-sc"
# include files for this application set(APPLICATION_NAME riscv-vp)
target_include_directories(riscv-vp SYSTEM PRIVATE ${LLVM_INCLUDE_DIRS})
target_link_libraries(riscv-vp PUBLIC platform dbt-rise-riscv-sc) include_directories(${PROJECT_SOURCE_DIR}/incl)
if(VERILATOR_FOUND) include_directories(${CONAN_INCLUDE_DIRS_SEASOCKS})
set_source_files_properties(sc_main.cpp PROPERTIES COMPILE_DEFINITIONS HAS_VERILATOR) add_definitions(-DWITH_SYSTEMC) # or -DSC_NO_WRITE_CHECK
target_include_directories(riscv-vp SYSTEM PRIVATE ${VERILATOR_INCLUDE_DIR}) include_directories(${SystemC_INCLUDE_DIRS})
target_link_libraries(riscv-vp verilated) include_directories(${CCI_INCLUDE_DIRS})
if(SCV_FOUND)
add_definitions(-DWITH_SCV)
include_directories(${SCV_INCLUDE_DIRS})
endif() endif()
link_directories(${SystemC_LIBRARY_DIRS})
link_directories(${CCI_LIBRARY_DIRS})
link_directories(${CONAN_LIB_DIRS_SEASOCKS})
add_executable(${APPLICATION_NAME} ${APP_SOURCES})
# include files for this application
target_include_directories(${APPLICATION_NAME} SYSTEM PRIVATE ${LLVM_INCLUDE_DIRS})
# Links the target exe against the libraries
target_link_libraries(${APPLICATION_NAME} ${LIBRARY_NAME})
target_link_libraries(${APPLICATION_NAME} riscv_sc)
target_link_libraries(${APPLICATION_NAME} dbt-core)
target_link_libraries(${APPLICATION_NAME} softfloat)
target_link_libraries(${APPLICATION_NAME} scc)
target_link_libraries(${APPLICATION_NAME} ${CONAN_LIBS_SEASOCKS})
target_link_libraries(${APPLICATION_NAME} external)
target_link_libraries(${APPLICATION_NAME} ${llvm_libs})
target_link_libraries(${APPLICATION_NAME} ${CCI_LIBRARIES} )
target_link_libraries(${APPLICATION_NAME} ${SystemC_LIBRARIES} )
if(SCV_FOUND)
link_directories(${SCV_LIBRARY_DIRS})
target_link_libraries (${APPLICATION_NAME} ${SCV_LIBRARIES})
endif()
target_link_libraries(${APPLICATION_NAME} ${Boost_LIBRARIES} )
if (Tcmalloc_FOUND) if (Tcmalloc_FOUND)
target_link_libraries(riscv-vp PUBLIC ${Tcmalloc_LIBRARIES}) target_link_libraries(${APPLICATION_NAME} ${Tcmalloc_LIBRARIES})
endif(Tcmalloc_FOUND) endif(Tcmalloc_FOUND)
install(TARGETS platform riscv-vp # Says how and where to install software
# Targets:
# * <prefix>/lib/<libraries>
# * header location after install: <prefix>/include/<project>/*.h
# * headers can be included by C++ code `#<project>/Bar.hpp>`
install(TARGETS ${LIBRARY_NAME} ${APPLICATION_NAME}
EXPORT ${PROJECT_NAME}Targets # for downstream dependencies EXPORT ${PROJECT_NAME}Targets # for downstream dependencies
ARCHIVE DESTINATION ${CMAKE_INSTALL_LIBDIR} COMPONENT libs # static lib ARCHIVE DESTINATION lib COMPONENT libs # static lib
RUNTIME DESTINATION ${CMAKE_INSTALL_BINDIR} COMPONENT libs # binaries RUNTIME DESTINATION bin COMPONENT libs # binaries
LIBRARY DESTINATION ${CMAKE_INSTALL_LIBDIR} COMPONENT libs # shared lib LIBRARY DESTINATION lib COMPONENT libs # shared lib
FRAMEWORK DESTINATION ${CMAKE_INSTALL_LIBDIR} COMPONENT libs # for mac FRAMEWORK DESTINATION bin COMPONENT libs # for mac
PUBLIC_HEADER DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}/${PROJECT_NAME} COMPONENT devel # headers for mac (note the different component -> different package) PUBLIC_HEADER DESTINATION incl/${PROJECT_NAME} COMPONENT devel # headers for mac (note the different component -> different package)
INCLUDES DESTINATION ${CMAKE_INSTALL_INCLUDEDIR} # headers INCLUDES DESTINATION incl # headers
) )

4364
platform/src/rtl/VTLSPI.cpp
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22
platform/src/rtl/VTLSPI__Syms.cpp
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@ -1,22 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Symbol table implementation internals
#include "VTLSPI__Syms.h"
#include "VTLSPI.h"
// FUNCTIONS
VTLSPI__Syms::VTLSPI__Syms(VTLSPI *topp, const char *namep)
// Setup locals
: __Vm_namep(namep)
, __Vm_didInit(false)
// Setup submodule names
{
// Pointer to top level
TOPp = topp;
// Setup each module's pointers to their submodules
// Setup each module's pointer back to symbol table (for public functions)
TOPp->__Vconfigure(this, true);
// Setup scope names
__Vscope_TLSPI__TLMonitor.configure(this, name(), "TLSPI.TLMonitor");
__Vscope_TLSPI__buffer__TLMonitor.configure(this, name(), "TLSPI.buffer.TLMonitor");
}

214
platform/src/rtl/spi_rtl.cpp
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@ -1,214 +0,0 @@
/*******************************************************************************
* Copyright (C) 2018 MINRES Technologies GmbH
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
*******************************************************************************/
#include "scc/signal_initiator_mixin.h"
#include "scc/time2tick.h"
#include "sysc/SiFive/spi.h"
#include "sysc/rtl/tl_uh_bfm.h"
#include <VTLSPI.h>
#include <scc/utilities.h>
#include <tlm.h>
#include <tlm/tlm_signal_conv.h>
namespace sysc {
namespace spi_impl {
using namespace sc_core;
class rtl : public spi {
public:
SC_HAS_PROCESS(beh);// NOLINT
rtl(sc_module_name nm);
~rtl() override;
// void trace( sc_trace_file* tf ) const override {
// }
private:
sc_signal<bool> clock;
sc_signal<uint32_t> a_bits_address;
sc_signal<uint32_t> a_bits_data;
sc_signal<bool> a_ready;
sc_signal<bool> a_valid;
sc_signal<uint32_t> a_bits_opcode;
sc_signal<uint32_t> a_bits_param;
sc_signal<uint32_t> a_bits_size;
sc_signal<uint32_t> a_bits_source;
sc_signal<uint32_t> a_bits_mask;
sc_signal<bool> a_bits_corrupt;
sc_signal<uint32_t> d_bits_data;
sc_signal<bool> d_ready;
sc_signal<bool> d_valid;
sc_signal<uint32_t> d_bits_opcode;
sc_signal<uint32_t> d_bits_size;
sc_signal<uint32_t> d_bits_source;
sc_signal<bool> sck;
sc_signal<bool> dq_0_i;
sc_signal<bool> dq_0_o;
sc_signal<bool> dq_0_oe;
sc_signal<bool> dq_1_i;
sc_signal<bool> dq_1_o;
sc_signal<bool> dq_1_oe;
sc_signal<bool> dq_2_i;
sc_signal<bool> dq_3_i;
sc_signal<bool> cs_0;
sc_signal<bool> cs_2;
sc_signal<bool> cs_3;
VTLSPI i_vtlspi;
tl_uh_bfm i_tlbfm;
scc::time2tick i_time2tick;
tlm::sc_signal2tlm_signal<bool> i_sck_conv;
tlm::sc_signal2tlm_signal<bool> i_mosi_conv;
tlm::tlm_signal2sc_signal<bool> i_miso_conv;
tlm::sc_signal2tlm_signal<bool> i_scs0_conv, i_scs2_conv, i_scs3_conv;
scc::tlm_signal_bool_opt_out scs_1;
};
rtl::rtl(sc_module_name nm)
: spi(nm)
, NAMED(a_bits_address)
, NAMED(a_bits_data)
, NAMED(a_ready)
, NAMED(a_valid)
, NAMED(a_bits_opcode)
, NAMED(a_bits_param)
, NAMED(a_bits_size)
, NAMED(a_bits_source)
, NAMED(a_bits_mask)
, NAMED(a_bits_corrupt)
, NAMED(d_bits_data)
, NAMED(d_ready)
, NAMED(d_valid)
, NAMED(d_bits_opcode)
, NAMED(d_bits_size)
, NAMED(d_bits_source)
, NAMED(sck)
, NAMED(dq_0_i)
, NAMED(dq_0_o)
, NAMED(dq_0_oe)
, NAMED(dq_1_i)
, NAMED(dq_1_o)
, NAMED(dq_1_oe)
, NAMED(dq_2_i)
, NAMED(dq_3_i)
, NAMED(cs_0)
, NAMED(cs_2)
, NAMED(cs_3)
, NAMED(i_vtlspi)
, NAMED(i_tlbfm, 0x10024000)
, NAMED(i_time2tick)
, NAMED(i_sck_conv)
, NAMED(i_mosi_conv)
, NAMED(i_miso_conv)
, NAMED(i_scs0_conv)
, NAMED(i_scs2_conv)
, NAMED(i_scs3_conv)
, NAMED(scs_1) {
i_vtlspi.clock(clock);
i_vtlspi.reset(rst_i);
i_vtlspi.auto_int_xing_out_sync_0(irq_o);
i_vtlspi.auto_control_xing_in_a_ready(a_ready);
i_vtlspi.auto_control_xing_in_a_valid(a_valid);
i_vtlspi.auto_control_xing_in_a_bits_address(a_bits_address);
i_vtlspi.auto_control_xing_in_a_bits_data(a_bits_data);
i_vtlspi.auto_control_xing_in_a_bits_opcode(a_bits_opcode);
i_vtlspi.auto_control_xing_in_a_bits_param(a_bits_param);
i_vtlspi.auto_control_xing_in_a_bits_size(a_bits_size);
i_vtlspi.auto_control_xing_in_a_bits_source(a_bits_source);
i_vtlspi.auto_control_xing_in_a_bits_mask(a_bits_mask);
i_vtlspi.auto_control_xing_in_a_bits_corrupt(a_bits_corrupt);
i_vtlspi.auto_control_xing_in_d_ready(d_ready);
i_vtlspi.auto_control_xing_in_d_valid(d_valid);
i_vtlspi.auto_control_xing_in_d_bits_data(d_bits_data);
i_vtlspi.auto_control_xing_in_d_bits_opcode(d_bits_opcode);
i_vtlspi.auto_control_xing_in_d_bits_size(d_bits_size);
i_vtlspi.auto_control_xing_in_d_bits_source(d_bits_source);
i_vtlspi.auto_io_out_sck(sck);
i_vtlspi.auto_io_out_dq_0_i(dq_0_i);
i_vtlspi.auto_io_out_dq_0_o(dq_0_o);
i_vtlspi.auto_io_out_dq_0_oe(dq_0_oe);
i_vtlspi.auto_io_out_dq_1_i(dq_1_i);
i_vtlspi.auto_io_out_dq_1_o(dq_1_o);
i_vtlspi.auto_io_out_dq_1_oe(dq_1_oe);
i_vtlspi.auto_io_out_dq_2_i(dq_2_i);
i_vtlspi.auto_io_out_dq_3_i(dq_3_i);
i_vtlspi.auto_io_out_cs_0(cs_0);
i_vtlspi.auto_io_out_cs_2(cs_2);
i_vtlspi.auto_io_out_cs_3(cs_3);
i_tlbfm.clock(clock);
i_tlbfm.reset(rst_i);
spi::socket(i_tlbfm.socket);
i_tlbfm.a_ready(a_ready);
i_tlbfm.a_valid(a_valid);
i_tlbfm.a_bits_address(a_bits_address);
i_tlbfm.a_bits_data(a_bits_data);
i_tlbfm.d_bits_data(d_bits_data);
i_tlbfm.a_bits_opcode(a_bits_opcode);
i_tlbfm.a_bits_param(a_bits_param);
i_tlbfm.a_bits_size(a_bits_size);
i_tlbfm.a_bits_source(a_bits_source);
i_tlbfm.a_bits_mask(a_bits_mask);
i_tlbfm.a_bits_corrupt(a_bits_corrupt);
i_tlbfm.d_ready(d_ready);
i_tlbfm.d_valid(d_valid);
i_tlbfm.d_bits_opcode(d_bits_opcode);
i_tlbfm.d_bits_size(d_bits_size);
i_tlbfm.d_bits_source(d_bits_source);
i_time2tick.clk_i(clk_i);
i_time2tick.clk_o(clock);
i_sck_conv.s_i(sck);
i_sck_conv.t_o(sck_o);
i_mosi_conv.s_i(dq_0_o);
i_mosi_conv.t_o(mosi_o);
miso_i(i_miso_conv.t_i);
i_miso_conv.s_o(dq_0_i);
i_scs0_conv.s_i(cs_0);
i_scs0_conv.t_o(scs_o[0]);
i_scs2_conv.s_i(cs_2);
i_scs2_conv.t_o(scs_o[2]);
scs_1(scs_o[1]); // dummy to drive port
i_scs3_conv.s_i(cs_3);
i_scs3_conv.t_o(scs_o[3]);
}
rtl::~rtl() = default;
}
template <> std::unique_ptr<spi> spi::create<sysc::spi_impl::rtl>(sc_core::sc_module_name nm) {
auto *res = new sysc::spi_impl::rtl(nm);
return std::unique_ptr<spi>(res);
}
} /* namespace sysc */

142
platform/src/rtl/tl_uh_bfm.cpp
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@ -1,142 +0,0 @@
/*******************************************************************************
* Copyright (C) 2018 MINRES Technologies GmbH
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
*******************************************************************************/
#include "sysc/rtl/tl_uh_bfm.h"
#include <scc/report.h>
#include <scc/utilities.h>
namespace sysc {
using namespace sc_core;
tl_uh_bfm::tl_uh_bfm(sc_module_name nm, int64_t offset)
: sc_module(nm)
, offset(offset)
, NAMED(socket)
, NAMED(clock)
, NAMED(reset)
, NAMED(a_bits_address)
, NAMED(a_bits_data)
, NAMED(a_ready)
, NAMED(a_valid)
, NAMED(a_bits_opcode)
, NAMED(a_bits_param)
, NAMED(a_bits_size)
, NAMED(a_bits_source)
, NAMED(a_bits_mask)
, NAMED(a_bits_corrupt)
, NAMED(d_bits_data)
, NAMED(d_ready)
, NAMED(d_valid)
, NAMED(d_bits_opcode)
, NAMED(d_bits_size)
, NAMED(d_bits_source)
, NAMED(fw_queue) {
socket.register_nb_transport_fw(
[this](tlm::tlm_generic_payload &gp, tlm::tlm_phase &phase, sc_core::sc_time &delay) -> tlm::tlm_sync_enum {
if (phase == tlm::BEGIN_REQ && gp.get_command() != tlm::TLM_IGNORE_COMMAND) {
gp.acquire();
fw_queue.notify(gp, delay);
return tlm::TLM_ACCEPTED;
} else if (phase == tlm::END_RESP) {
gp.release();
d_ready = true;
}
});
SC_METHOD(tl_response_method);
sensitive << clock.pos();
SC_THREAD(fw_thread);
}
tl_uh_bfm::~tl_uh_bfm() = default;
void tl_uh_bfm::fw_thread() {
d_ready = true;
while (true) {
a_valid = false;
wait(fw_queue.get_event());
auto gp = fw_queue.get_next_transaction();
if (gp->get_data_length() == 4) {
auto addr = gp->get_address() + offset;
a_bits_address = addr;
a_valid = true;
a_bits_param = 0;
a_bits_size = 2; // 2^2 bytes
a_bits_source = 0x55;
a_bits_mask = 0xf;
a_bits_corrupt = false;
if (gp->get_command() == tlm::TLM_WRITE_COMMAND) {
a_bits_opcode = PutFullData;
a_bits_data = *(uint32_t *)gp->get_data_ptr();
} else {
a_bits_opcode = Get;
a_bits_data = 0;
}
tl_in_progress.push_back(gp);
do {
wait(clock.posedge_event());
} while (a_ready == false);
} else
SCCERR("tlbfm") << "Got transaction with unequal length";
}
}
void tl_uh_bfm::tl_response_method() {
if (d_valid && d_ready) {
// if(d_bits_source==0x55){ // this is ours
auto gp = tl_in_progress.front();
sc_assert(gp && "Got TL response without a request in queue");
tl_in_progress.pop_front();
if (gp->get_command() == tlm::TLM_WRITE_COMMAND) {
sc_assert(d_bits_opcode == AccessAck &&
"TL did not respond with AccessAck to write request");
} else {
sc_assert(d_bits_opcode == AccessAckData &&
"TL did not respond with AccessAckData to read request");
*(uint32_t *)(gp->get_data_ptr()) = d_bits_data;
}
gp->set_response_status(tlm::TLM_OK_RESPONSE);
sc_core::sc_time delay;
tlm::tlm_phase phase{tlm::BEGIN_RESP};
auto ret = socket->nb_transport_bw(*gp, phase, delay);
if (ret == tlm::TLM_COMPLETED || (ret == tlm::TLM_UPDATED && phase == tlm::END_RESP)) {
d_ready = true;
gp->release();
} else
d_ready = false;
// }
}
}
} /* namespace sysc */

52
platform/src/sc_main.cpp
View File

@ -36,31 +36,18 @@
#include <scc/configurable_tracer.h> #include <scc/configurable_tracer.h>
#include <scc/configurer.h> #include <scc/configurer.h>
#include <scc/perf_estimator.h>
#include <scc/report.h> #include <scc/report.h>
#include <scc/scv/scv_tr_db.h> #include <scc/scv_tr_db.h>
#include <scc/tracer.h> #include <scc/tracer.h>
#include <scc/perf_estimator.h> #include <scc/perf_estimator.h>
#include <cci_utils/broker.h> #include <cci_utils/broker.h>
#include <boost/program_options.hpp> #include <boost/program_options.hpp>
#ifdef WITH_LLVM
#include <iss/llvm/jit_helper.h> #include <iss/llvm/jit_helper.h>
#endif
#include <fstream> #include <fstream>
#include <sstream> #include <sstream>
#ifdef HAS_VERILATOR
#include <verilated.h>
inline void configure_verilator() {
Verilated::commandArgs(sc_core::sc_argc(), const_cast<char **>(sc_core::sc_argv()));
}
#else
inline void configure_verilator() {}
#endif
const std::string core_path{"i_system.i_hifive1.i_fe310.i_core_complex"};
using namespace sc_core;
using namespace sysc; using namespace sysc;
namespace po = boost::program_options; namespace po = boost::program_options;
@ -76,23 +63,18 @@ int sc_main(int argc, char *argv[]) {
/////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////
sc_report_handler::set_actions(SC_ID_MORE_THAN_ONE_SIGNAL_DRIVER_, SC_DO_NOTHING); sc_report_handler::set_actions(SC_ID_MORE_THAN_ONE_SIGNAL_DRIVER_, SC_DO_NOTHING);
/////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////
// Setup verilator infrastructure (if used) // create global CCI broker
/////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////
configure_verilator(); cci::cci_register_broker(new cci_utils::broker("Global Broker"));
/////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////
// CLI argument parsing & logging setup // CLI argument parsing & logging setup
/////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////
CLIParser parser(argc, argv); CLIParser parser(argc, argv);
scc::stream_redirection cout_redir(std::cout, scc::log::INFO);
scc::stream_redirection cerr_redir(std::cerr, scc::log::ERROR);
sc_report_handler::set_actions(SC_ERROR, SC_LOG | SC_CACHE_REPORT | SC_DISPLAY | SC_STOP);
if (!parser.is_valid()) return ERROR_IN_COMMAND_LINE; if (!parser.is_valid()) return ERROR_IN_COMMAND_LINE;
/////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////
// set up infrastructure // set up infrastructure
/////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////
#ifdef WITH_LLVM
iss::init_jit_debug(argc, argv); iss::init_jit_debug(argc, argv);
#endif
/////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////
// set up configuration // set up configuration
/////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////
@ -108,7 +90,6 @@ int sc_main(int argc, char *argv[]) {
/////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////
// instantiate top level // instantiate top level
/////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////
auto estimator = scc::make_unique<scc::perf_estimator>(parser.is_set("heart-beat") ? 10_us : SC_ZERO_TIME);
auto i_system = scc::make_unique<sysc::system>("i_system"); auto i_system = scc::make_unique<sysc::system>("i_system");
/////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////
// add non-implemented 'enableTracing' properties // add non-implemented 'enableTracing' properties
@ -125,18 +106,17 @@ int sc_main(int argc, char *argv[]) {
/////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////
// overwrite config with command line settings // overwrite config with command line settings
/////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////
cfg.set_value("i_system.i_hifive1.i_fe310.i_core_complex.backend", parser.get<std::string>("backend"));
cfg.set_value("i_system.i_hifive1.i_fe310.i_core_complex.gdb_server_port", parser.get<unsigned short>("gdb-port")); cfg.set_value("i_system.i_hifive1.i_fe310.i_core_complex.gdb_server_port", parser.get<unsigned short>("gdb-port"));
cfg.set_value("i_system.i_hifive1.i_fe310.i_core_complex.dump_ir", parser.is_set("dump-ir")); cfg.set_value("i_system.i_hifive1.i_fe310.i_core_complex.dump_ir", parser.is_set("dump-ir"));
if (parser.is_set("elf")) if (parser.is_set("elf"))
cfg.set_value("i_system.i_hifive1.i_fe310.i_core_complex.elf_file", parser.get<std::string>("elf")); cfg.set_value("i_system.i_hifive1.i_fe310.i_core_complex.elf_file", parser.get<std::string>("elf"));
else if (parser.is_set("argv")){ else {
auto args = parser.get<std::vector<std::string>>("argv"); auto args = parser.get<std::vector<std::string>>("argv");
if(args.size()) if(args.size())
cfg.set_value("i_system.i_hifive1.i_fe310.i_core_complex.elf_file", args[0]); cfg.set_value("i_system.i_hifive1.i_fe310.i_core_complex.elf_file", args[0]);
} }
if (parser.is_set("quantum")) if (parser.is_set("quantum"))
tlm::tlm_global_quantum::instance().set(sc_time(parser.get<unsigned>("quantum"), SC_NS)); tlm::tlm_global_quantum::instance().set(sc_core::sc_time(parser.get<unsigned>("quantum"), sc_core::SC_NS));
if (parser.is_set("reset")) { if (parser.is_set("reset")) {
auto str = parser.get<std::string>("reset"); auto str = parser.get<std::string>("reset");
uint64_t start_address = str.find("0x") == 0 ? std::stoull(str.substr(2), nullptr, 16) : std::stoull(str, nullptr, 10); uint64_t start_address = str.find("0x") == 0 ? std::stoull(str.substr(2), nullptr, 16) : std::stoull(str, nullptr, 10);
@ -157,22 +137,12 @@ int sc_main(int argc, char *argv[]) {
/////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////
try { try {
if (parser.is_set("max_time")) { if (parser.is_set("max_time")) {
sc_start(scc::parse_from_string(parser.get<std::string>("max_time"))); sc_core::sc_start(scc::parse_from_string(parser.get<std::string>("max_time")));
} else } else
sc_start(); sc_core::sc_start();
} catch(sc_report& e) { if (!sc_core::sc_end_of_simulation_invoked()) sc_core::sc_stop();
SCCERR() << "Caught sc_report exception during simulation: " << e.what() << ":" << e.get_msg(); } catch (sc_core::sc_report &rep) {
} catch(std::exception& e) { sc_core::sc_report_handler::get_handler()(rep, sc_core::SC_DISPLAY | sc_core::SC_STOP);
SCCERR() << "Caught exception during simulation: " << e.what();
} catch(...) {
SCCERR() << "Caught unspecified exception during simulation";
} }
if(sc_is_running()) { return 0;
SCCERR() << "Simulation timeout!"; // calls sc_stop
}
auto errcnt = sc_report_handler::get_count(SC_ERROR);
auto warncnt = sc_report_handler::get_count(SC_WARNING);
SCCINFO() << "Finished, there were " << errcnt << " error" << (errcnt == 1 ? "" : "s") << " and " << warncnt << " warning"
<< (warncnt == 1 ? "" : "s");
return errcnt + warncnt;
} }

4
platform/src/sysc/clint.cpp
View File

@ -117,11 +117,11 @@ void clint::update_mtime(bool force) {
if (regs->r_mtimecmp > regs->r_mtime && clk > sc_core::SC_ZERO_TIME) { if (regs->r_mtimecmp > regs->r_mtime && clk > sc_core::SC_ZERO_TIME) {
sc_core::sc_time next_trigger = sc_core::sc_time next_trigger =
(clk * lfclk_mutiplier) * (regs->r_mtimecmp - regs->r_mtime) - cnt_fraction * clk; (clk * lfclk_mutiplier) * (regs->r_mtimecmp - regs->r_mtime) - cnt_fraction * clk;
SCCTRACE() << "Timer fires at " << sc_time_stamp() + next_trigger; SCTRACE() << "Timer fires at " << sc_time_stamp() + next_trigger;
mtime_evt.notify(next_trigger); mtime_evt.notify(next_trigger);
mtime_int_o.write(false); mtime_int_o.write(false);
} else { } else {
SCCTRACE() << "Timer fired at " << sc_time_stamp(); SCTRACE() << "Timer fired at " << sc_time_stamp();
mtime_int_o.write(true); mtime_int_o.write(true);
} }
} }

22
platform/src/sysc/gpio.cpp
View File

@ -60,7 +60,7 @@ gpio::gpio(sc_core::sc_module_name nm)
SC_METHOD(reset_cb); SC_METHOD(reset_cb);
sensitive << rst_i; sensitive << rst_i;
dont_initialize(); dont_initialize();
auto pins_i_cb = [this](unsigned int tag, tlm::scc::tlm_signal_gp<sc_logic> &gp, tlm::tlm_phase &phase, auto pins_i_cb = [this](unsigned int tag, tlm::tlm_signal_gp<sc_logic> &gp, tlm::tlm_phase &phase,
sc_core::sc_time &delay) -> tlm::tlm_sync_enum { sc_core::sc_time &delay) -> tlm::tlm_sync_enum {
this->pin_input(tag, gp, delay); this->pin_input(tag, gp, delay);
return tlm::TLM_COMPLETED; return tlm::TLM_COMPLETED;
@ -70,7 +70,7 @@ gpio::gpio(sc_core::sc_module_name nm)
s.register_nb_transport(pins_i_cb, i); s.register_nb_transport(pins_i_cb, i);
++i; ++i;
} }
auto iof0_i_cb = [this](unsigned int tag, tlm::scc::tlm_signal_gp<bool> &gp, tlm::tlm_phase &phase, auto iof0_i_cb = [this](unsigned int tag, tlm::tlm_signal_gp<bool> &gp, tlm::tlm_phase &phase,
sc_core::sc_time &delay) -> tlm::tlm_sync_enum { sc_core::sc_time &delay) -> tlm::tlm_sync_enum {
last_iof0[tag] = gp.get_value(); last_iof0[tag] = gp.get_value();
this->iof_input(tag, 0, gp, delay); this->iof_input(tag, 0, gp, delay);
@ -81,7 +81,7 @@ gpio::gpio(sc_core::sc_module_name nm)
s.register_nb_transport(iof0_i_cb, i); s.register_nb_transport(iof0_i_cb, i);
++i; ++i;
} }
auto iof1_i_cb = [this](unsigned int tag, tlm::scc::tlm_signal_gp<bool> &gp, tlm::tlm_phase &phase, auto iof1_i_cb = [this](unsigned int tag, tlm::tlm_signal_gp<bool> &gp, tlm::tlm_phase &phase,
sc_core::sc_time &delay) -> tlm::tlm_sync_enum { sc_core::sc_time &delay) -> tlm::tlm_sync_enum {
last_iof1[tag] = gp.get_value(); last_iof1[tag] = gp.get_value();
this->iof_input(tag, 1, gp, delay); this->iof_input(tag, 1, gp, delay);
@ -111,7 +111,7 @@ gpio::~gpio() = default;
void gpio::before_end_of_elaboration() { void gpio::before_end_of_elaboration() {
if (write_to_ws.get_value()) { if (write_to_ws.get_value()) {
SCCTRACE(SCMOD) << "Adding WS handler for " << (std::string{"/ws/"} + name()); SCTRACE() << "Adding WS handler for " << (std::string{"/ws/"} + name());
handler = std::make_shared<WsHandler>(); handler = std::make_shared<WsHandler>();
sc_comm_singleton::inst().registerWebSocketHandler((std::string{"/ws/"} + name()).c_str(), handler); sc_comm_singleton::inst().registerWebSocketHandler((std::string{"/ws/"} + name()).c_str(), handler);
} }
@ -128,7 +128,7 @@ void gpio::reset_cb() {
void gpio::clock_cb() { this->clk = clk_i.read(); } void gpio::clock_cb() { this->clk = clk_i.read(); }
tlm::tlm_phase gpio::write_output(tlm::scc::tlm_signal_gp<sc_dt::sc_logic> &gp, size_t i, sc_dt::sc_logic val) { tlm::tlm_phase gpio::write_output(tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, size_t i, sc_dt::sc_logic val) {
sc_core::sc_time delay{SC_ZERO_TIME}; sc_core::sc_time delay{SC_ZERO_TIME};
tlm::tlm_phase phase{tlm::BEGIN_REQ}; tlm::tlm_phase phase{tlm::BEGIN_REQ};
gp.set_command(tlm::TLM_WRITE_COMMAND); gp.set_command(tlm::TLM_WRITE_COMMAND);
@ -140,7 +140,7 @@ tlm::tlm_phase gpio::write_output(tlm::scc::tlm_signal_gp<sc_dt::sc_logic> &gp,
void gpio::update_pins(uint32_t changed_bits) { void gpio::update_pins(uint32_t changed_bits) {
sc_core::sc_inout_rv<32>::data_type out_val; sc_core::sc_inout_rv<32>::data_type out_val;
tlm::scc::tlm_signal_gp<sc_dt::sc_logic> gp; tlm::tlm_signal_gp<sc_dt::sc_logic> gp;
sc_logic val; sc_logic val;
for (size_t i = 0, mask = 1; i < 32; ++i, mask <<= 1) { for (size_t i = 0, mask = 1; i < 32; ++i, mask <<= 1) {
if (changed_bits & mask) { if (changed_bits & mask) {
@ -161,7 +161,7 @@ void gpio::update_pins(uint32_t changed_bits) {
} }
} }
void gpio::pin_input(unsigned int tag, tlm::scc::tlm_signal_gp<sc_logic> &gp, sc_core::sc_time &delay) { void gpio::pin_input(unsigned int tag, tlm::tlm_signal_gp<sc_logic> &gp, sc_core::sc_time &delay) {
if (delay > SC_ZERO_TIME) { if (delay > SC_ZERO_TIME) {
wait(delay); wait(delay);
delay = SC_ZERO_TIME; delay = SC_ZERO_TIME;
@ -179,11 +179,11 @@ void gpio::pin_input(unsigned int tag, tlm::scc::tlm_signal_gp<sc_logic> &gp, sc
} }
} }
void gpio::forward_pin_input(unsigned int tag, tlm::scc::tlm_signal_gp<sc_logic> &gp) { void gpio::forward_pin_input(unsigned int tag, tlm::tlm_signal_gp<sc_logic> &gp) {
const auto mask = 1U << tag; const auto mask = 1U << tag;
if (regs->iof_en & mask) { if (regs->iof_en & mask) {
auto &socket = regs->iof_sel & mask ? iof1_o[tag] : iof0_o[tag]; auto &socket = regs->iof_sel & mask ? iof1_o[tag] : iof0_o[tag];
tlm::scc::tlm_signal_gp<> new_gp; tlm::tlm_signal_gp<> new_gp;
for (size_t i = 0; i < socket.size(); ++i) { for (size_t i = 0; i < socket.size(); ++i) {
sc_core::sc_time delay{SC_ZERO_TIME}; sc_core::sc_time delay{SC_ZERO_TIME};
tlm::tlm_phase phase{tlm::BEGIN_REQ}; tlm::tlm_phase phase{tlm::BEGIN_REQ};
@ -196,7 +196,7 @@ void gpio::forward_pin_input(unsigned int tag, tlm::scc::tlm_signal_gp<sc_logic>
} }
} }
void gpio::iof_input(unsigned int tag, unsigned iof_idx, tlm::scc::tlm_signal_gp<> &gp, sc_core::sc_time &delay) { void gpio::iof_input(unsigned int tag, unsigned iof_idx, tlm::tlm_signal_gp<> &gp, sc_core::sc_time &delay) {
if (delay > SC_ZERO_TIME) { if (delay > SC_ZERO_TIME) {
wait(delay); wait(delay);
delay = SC_ZERO_TIME; delay = SC_ZERO_TIME;
@ -209,7 +209,7 @@ void gpio::iof_input(unsigned int tag, unsigned iof_idx, tlm::scc::tlm_signal_gp
for (size_t i = 0; i < socket.size(); ++i) { for (size_t i = 0; i < socket.size(); ++i) {
sc_core::sc_time delay{SC_ZERO_TIME}; sc_core::sc_time delay{SC_ZERO_TIME};
tlm::tlm_phase phase{tlm::BEGIN_REQ}; tlm::tlm_phase phase{tlm::BEGIN_REQ};
tlm::scc::tlm_signal_gp<sc_logic> new_gp; tlm::tlm_signal_gp<sc_logic> new_gp;
new_gp.set_command(tlm::TLM_WRITE_COMMAND); new_gp.set_command(tlm::TLM_WRITE_COMMAND);
auto val = gp.get_value(); auto val = gp.get_value();
new_gp.set_value(val ? sc_dt::Log_1 : sc_dt::Log_0); new_gp.set_value(val ? sc_dt::Log_1 : sc_dt::Log_0);

18
platform/src/sysc/hifive1.cpp
View File

@ -87,29 +87,23 @@ BOOST_PP_REPEAT(8, PORT_NAMING, _)
s_gpio[20].out(h_bridge[4]); s_gpio[20].out(h_bridge[4]);
s_gpio[19].out(h_bridge[5]); s_gpio[19].out(h_bridge[5]);
// proxy callbacks // proxy callbacks
h_bridge[0].register_nb_transport([this](tlm::scc::tlm_signal_gp<sc_logic> &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum { h_bridge[0].register_nb_transport([this](tlm::tlm_signal_gp<sc_logic> &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum {
ha_o.write(gp.get_value()); ha_o.write(gp.get_value());
return tlm::TLM_ACCEPTED;
}); });
h_bridge[1].register_nb_transport([this](tlm::scc::tlm_signal_gp<sc_logic> &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum { h_bridge[1].register_nb_transport([this](tlm::tlm_signal_gp<sc_logic> &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum {
la_o.write(gp.get_value()); la_o.write(gp.get_value());
return tlm::TLM_ACCEPTED;
}); });
h_bridge[2].register_nb_transport([this](tlm::scc::tlm_signal_gp<sc_logic> &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum { h_bridge[2].register_nb_transport([this](tlm::tlm_signal_gp<sc_logic> &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum {
hb_o.write(gp.get_value()); hb_o.write(gp.get_value());
return tlm::TLM_ACCEPTED;
}); });
h_bridge[3].register_nb_transport([this](tlm::scc::tlm_signal_gp<sc_logic> &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum { h_bridge[3].register_nb_transport([this](tlm::tlm_signal_gp<sc_logic> &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum {
lb_o.write(gp.get_value()); lb_o.write(gp.get_value());
return tlm::TLM_ACCEPTED;
}); });
h_bridge[4].register_nb_transport([this](tlm::scc::tlm_signal_gp<sc_logic> &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum { h_bridge[4].register_nb_transport([this](tlm::tlm_signal_gp<sc_logic> &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum {
hc_o.write(gp.get_value()); hc_o.write(gp.get_value());
return tlm::TLM_ACCEPTED;
}); });
h_bridge[5].register_nb_transport([this](tlm::scc::tlm_signal_gp<sc_logic> &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum { h_bridge[5].register_nb_transport([this](tlm::tlm_signal_gp<sc_logic> &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum {
lc_o.write(gp.get_value()); lc_o.write(gp.get_value());
return tlm::TLM_ACCEPTED;
}); });

20
platform/src/sysc/mcp_adc.cpp
View File

@ -40,16 +40,16 @@ namespace sysc {
mcp_3008::mcp_3008(sc_core::sc_module_name nm) mcp_3008::mcp_3008(sc_core::sc_module_name nm)
: sysc::mcp_adc(nm, 8) : sysc::mcp_adc(nm, 8)
, last_tx_start(sc_core::SC_ZERO_TIME) { , last_tx_start(sc_core::SC_ZERO_TIME) {
sck_i.register_nb_transport([this](tlm::scc::tlm_signal_gp<sc_dt::sc_logic> &gp, tlm::tlm_phase &phase, sck_i.register_nb_transport([this](tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, tlm::tlm_phase &phase,
sc_core::sc_time &delay) -> tlm::tlm_sync_enum { return tlm::TLM_COMPLETED; }); sc_core::sc_time &delay) -> tlm::tlm_sync_enum { return tlm::TLM_COMPLETED; });
mosi_i.register_nb_transport([this](tlm::scc::tlm_signal_gp<sc_dt::sc_logic> &gp, tlm::tlm_phase &phase, mosi_i.register_nb_transport([this](tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, tlm::tlm_phase &phase,
sc_core::sc_time &delay) -> tlm::tlm_sync_enum { sc_core::sc_time &delay) -> tlm::tlm_sync_enum {
if (cs_v == sc_dt::Log_0) return receive(gp, phase, delay); if (cs_v == sc_dt::Log_0) return receive(gp, phase, delay);
return tlm::TLM_COMPLETED; return tlm::TLM_COMPLETED;
}); });
cs_i.register_nb_transport([this](tlm::scc::tlm_signal_gp<sc_dt::sc_logic> &gp, tlm::tlm_phase &phase, cs_i.register_nb_transport([this](tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, tlm::tlm_phase &phase,
sc_core::sc_time &delay) -> tlm::tlm_sync_enum { sc_core::sc_time &delay) -> tlm::tlm_sync_enum {
if (cs_v != sc_dt::Log_0 && gp.get_value() == sc_dt::Log_0) { if (cs_v != sc_dt::Log_0 && gp.get_value() == sc_dt::Log_0) {
idx = 0; // falling edge idx = 0; // falling edge
@ -60,7 +60,7 @@ mcp_3008::mcp_3008(sc_core::sc_module_name nm)
}); });
} }
tlm::tlm_sync_enum mcp_3008::receive(tlm::scc::tlm_signal_gp<sc_dt::sc_logic> &gp, tlm::tlm_phase &phase, tlm::tlm_sync_enum mcp_3008::receive(tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, tlm::tlm_phase &phase,
sc_core::sc_time &delay) { sc_core::sc_time &delay) {
gp.get_extension(ext); gp.get_extension(ext);
if (ext) { if (ext) {
@ -86,7 +86,7 @@ void mcp_3008::do_conversion() {
auto inp = ch_i[channel].read(); auto inp = ch_i[channel].read();
auto norm = 1024.0 * inp / vref; auto norm = 1024.0 * inp / vref;
auto res = static_cast<int>(norm); auto res = static_cast<int>(norm);
SCCDEBUG(this->name()) << "Converting " << inp << " to " << norm << " as int " << res; SCDEBUG(this->name()) << "Converting " << inp << " to " << norm << " as int " << res;
tx_bytes[1] = bit_sub<8, 2>(res); tx_bytes[1] = bit_sub<8, 2>(res);
tx_bytes[2] = bit_sub<0, 8>(res); tx_bytes[2] = bit_sub<0, 8>(res);
} else { } else {
@ -100,7 +100,7 @@ mcp_3208::mcp_3208(sc_core::sc_module_name nm)
: sysc::mcp_adc(nm, 8) : sysc::mcp_adc(nm, 8)
, ext(nullptr) , ext(nullptr)
, last_tx_start(sc_core::SC_ZERO_TIME) { , last_tx_start(sc_core::SC_ZERO_TIME) {
sck_i.register_nb_transport([this](tlm::scc::tlm_signal_gp<sc_dt::sc_logic> &gp, tlm::tlm_phase &phase, sck_i.register_nb_transport([this](tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, tlm::tlm_phase &phase,
sc_core::sc_time &delay) -> tlm::tlm_sync_enum { sc_core::sc_time &delay) -> tlm::tlm_sync_enum {
auto ret = tlm::TLM_COMPLETED; auto ret = tlm::TLM_COMPLETED;
if (cs_v == sc_dt::Log_0) ret = receive(gp, phase, delay); if (cs_v == sc_dt::Log_0) ret = receive(gp, phase, delay);
@ -108,13 +108,13 @@ mcp_3208::mcp_3208(sc_core::sc_module_name nm)
return ret; return ret;
}); });
mosi_i.register_nb_transport([this](tlm::scc::tlm_signal_gp<sc_dt::sc_logic> &gp, tlm::tlm_phase &phase, mosi_i.register_nb_transport([this](tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, tlm::tlm_phase &phase,
sc_core::sc_time &delay) -> tlm::tlm_sync_enum { sc_core::sc_time &delay) -> tlm::tlm_sync_enum {
mosi_v = gp.get_value(); mosi_v = gp.get_value();
return tlm::TLM_COMPLETED; return tlm::TLM_COMPLETED;
}); });
cs_i.register_nb_transport([this](tlm::scc::tlm_signal_gp<sc_dt::sc_logic> &gp, tlm::tlm_phase &phase, cs_i.register_nb_transport([this](tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, tlm::tlm_phase &phase,
sc_core::sc_time &delay) -> tlm::tlm_sync_enum { sc_core::sc_time &delay) -> tlm::tlm_sync_enum {
if (cs_v != sc_dt::Log_0 && gp.get_value() == sc_dt::Log_0) { // falling edge of CS if (cs_v != sc_dt::Log_0 && gp.get_value() == sc_dt::Log_0) { // falling edge of CS
idx = 0; idx = 0;
@ -128,7 +128,7 @@ mcp_3208::mcp_3208(sc_core::sc_module_name nm)
sensitive << clk_sample_evt; sensitive << clk_sample_evt;
} }
tlm::tlm_sync_enum mcp_3208::receive(tlm::scc::tlm_signal_gp<sc_dt::sc_logic> &gp, tlm::tlm_phase &phase, tlm::tlm_sync_enum mcp_3208::receive(tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, tlm::tlm_phase &phase,
sc_core::sc_time &delay) { sc_core::sc_time &delay) {
gp.get_extension(ext); gp.get_extension(ext);
if (ext) { if (ext) {
@ -176,7 +176,7 @@ void mcp_3208::do_conversion() {
auto inp = ch_i[channel].read(); auto inp = ch_i[channel].read();
auto norm = 4096.0 * inp / vref; auto norm = 4096.0 * inp / vref;
auto res = static_cast<int>(norm); auto res = static_cast<int>(norm);
SCCDEBUG(this->name()) << "Converting channel " << channel << " " << inp << "V to " << norm << " as int " SCDEBUG(this->name()) << "Converting channel " << channel << " " << inp << "V to " << norm << " as int "
<< res; << res;
tx_bytes[1] = bit_sub<8, 4>(res); tx_bytes[1] = bit_sub<8, 4>(res);
tx_bytes[2] = bit_sub<0, 8>(res); tx_bytes[2] = bit_sub<0, 8>(res);

8
platform/src/sysc/plic.cpp
View File

@ -111,7 +111,7 @@ void plic::global_int_port_cb() {
if (enable && global_interrupts_i[i].read() == 1) { if (enable && global_interrupts_i[i].read() == 1) {
regs->r_pending[reg_idx] = regs->r_pending[reg_idx] | (0x1 << bit_ofs); regs->r_pending[reg_idx] = regs->r_pending[reg_idx] | (0x1 << bit_ofs);
handle_pending = true; handle_pending = true;
SCCDEBUG(this->name()) << "pending interrupt identified: " << i; SCDEBUG(this->name()) << "pending interrupt identified: " << i;
} }
} }
@ -138,7 +138,7 @@ void plic::handle_pending_int() {
claim_prio = prio; claim_prio = prio;
claim_int = i; claim_int = i;
raise_int = true; raise_int = true;
SCCDEBUG(this->name()) << "pending interrupt activated: " << i; SCDEBUG(this->name()) << "pending interrupt activated: " << i;
} }
} }
} }
@ -149,14 +149,14 @@ void plic::handle_pending_int() {
// todo: evluate clock period // todo: evluate clock period
} else { } else {
regs->r_claim_complete = 0; regs->r_claim_complete = 0;
SCCDEBUG(this->name()) << "no further pending interrupt."; SCDEBUG(this->name()) << "no further pending interrupt.";
} }
} }
void plic::reset_pending_int(uint32_t irq) { void plic::reset_pending_int(uint32_t irq) {
// todo: evaluate enable register (see spec) // todo: evaluate enable register (see spec)
// todo: make sure that pending is set, otherwise don't reset irq ... read spec. // todo: make sure that pending is set, otherwise don't reset irq ... read spec.
SCCTRACE(this->name()) << "reset pending interrupt: " << irq; SCTRACE(this->name()) << "reset pending interrupt: " << irq;
// reset related pending bit // reset related pending bit
auto reg_idx = irq >> 5; auto reg_idx = irq >> 5;
auto bit_ofs = irq & 0x1F; auto bit_ofs = irq & 0x1F;

2
platform/src/sysc/pwm.cpp
View File

@ -223,7 +223,7 @@ void pwm::update_counter() {
void pwm::write_cmpgpio(size_t index, bool val) { void pwm::write_cmpgpio(size_t index, bool val) {
if (cmpgpio_o[index].get_interface()) { if (cmpgpio_o[index].get_interface()) {
tlm::tlm_phase phase(tlm::BEGIN_REQ); tlm::tlm_phase phase(tlm::BEGIN_REQ);
tlm::scc::tlm_signal_gp<> gp; tlm::tlm_signal_gp<> gp;
sc_core::sc_time delay(SC_ZERO_TIME); sc_core::sc_time delay(SC_ZERO_TIME);
gp.set_value(val); gp.set_value(val);
cmpgpio_o[index]->nb_transport_fw(gp, phase, delay); cmpgpio_o[index]->nb_transport_fw(gp, phase, delay);

2
platform/src/sysc/sc_comm_singleton.cpp
View File

@ -62,7 +62,7 @@ inline void die() {
sc_comm_singleton::sc_comm_singleton(sc_core::sc_module_name nm) sc_comm_singleton::sc_comm_singleton(sc_core::sc_module_name nm)
: sc_core::sc_module(nm) : sc_core::sc_module(nm)
, m_serv(new Server(std::make_shared<PrintfLogger>(Logger::Level::Warning))) , m_serv(new Server(std::make_shared<PrintfLogger>(Logger::Level::WARNING)))
, needs_client(false) , needs_client(false)
, client_started(false) { , client_started(false) {
m_serv->addPageHandler(std::make_shared<DefaultPageHandler>(*this)); m_serv->addPageHandler(std::make_shared<DefaultPageHandler>(*this));

28
platform/src/sysc/spi.cpp
View File

@ -32,8 +32,8 @@
#include "sysc/SiFive/spi.h" #include "sysc/SiFive/spi.h"
#include "cci_configuration" #include "cci_configuration"
#include "tlm/scc/signal_initiator_mixin.h" #include "scc/signal_initiator_mixin.h"
#include "tlm/scc/signal_target_mixin.h" #include "scc/signal_target_mixin.h"
#include "scc/tlm_target.h" #include "scc/tlm_target.h"
#include "scc/utilities.h" #include "scc/utilities.h"
@ -55,15 +55,15 @@ public:
~beh() override; ~beh() override;
protected: protected:
tlm::scc::tlm_signal_bool_opt_out _sck_o; scc::tlm_signal_bool_opt_out _sck_o;
tlm::scc::tlm_signal_bool_opt_out _mosi_o; scc::tlm_signal_bool_opt_out _mosi_o;
tlm::scc::tlm_signal_bool_opt_in _miso_i; scc::tlm_signal_bool_opt_in _miso_i;
sc_core::sc_vector<tlm::scc::tlm_signal_bool_opt_out> _scs_o; sc_core::sc_vector<scc::tlm_signal_bool_opt_out> _scs_o;
void clock_cb(); void clock_cb();
void reset_cb(); void reset_cb();
void transmit_data(); void transmit_data();
void receive_data(tlm::scc::tlm_signal_gp<> &gp, sc_core::sc_time &delay); void receive_data(tlm::tlm_signal_gp<> &gp, sc_core::sc_time &delay);
void update_irq(); void update_irq();
sc_core::sc_event update_irq_evt; sc_core::sc_event update_irq_evt;
sc_core::sc_time clk; sc_core::sc_time clk;
@ -96,7 +96,7 @@ beh::beh(sc_core::sc_module_name nm)
dont_initialize(); dont_initialize();
SC_THREAD(transmit_data); SC_THREAD(transmit_data);
_miso_i.register_nb_transport( _miso_i.register_nb_transport(
[this](tlm::scc::tlm_signal_gp<bool> &gp, tlm::tlm_phase &phase, sc_core::sc_time &delay) -> tlm::tlm_sync_enum { [this](tlm::tlm_signal_gp<bool> &gp, tlm::tlm_phase &phase, sc_core::sc_time &delay) -> tlm::tlm_sync_enum {
this->receive_data(gp, delay); this->receive_data(gp, delay);
return tlm::TLM_COMPLETED; return tlm::TLM_COMPLETED;
}); });
@ -128,7 +128,7 @@ beh::beh(sc_core::sc_module_name nm)
if (regs->r_csmode.mode == 2 && regs->r_csmode.mode != bit_sub<0, 2>(data) && regs->r_csid < 4) { if (regs->r_csmode.mode == 2 && regs->r_csmode.mode != bit_sub<0, 2>(data) && regs->r_csid < 4) {
tlm::tlm_phase phase(tlm::BEGIN_REQ); tlm::tlm_phase phase(tlm::BEGIN_REQ);
sc_core::sc_time delay(SC_ZERO_TIME); sc_core::sc_time delay(SC_ZERO_TIME);
tlm::scc::tlm_signal_gp<> gp; tlm::tlm_signal_gp<> gp;
gp.set_command(tlm::TLM_WRITE_COMMAND); gp.set_command(tlm::TLM_WRITE_COMMAND);
gp.set_value(true); gp.set_value(true);
_scs_o[regs->r_csid]->nb_transport_fw(gp, phase, delay); _scs_o[regs->r_csid]->nb_transport_fw(gp, phase, delay);
@ -140,7 +140,7 @@ beh::beh(sc_core::sc_module_name nm)
if (regs->r_csmode.mode == 2 && regs->csid != data && regs->r_csid < 4) { if (regs->r_csmode.mode == 2 && regs->csid != data && regs->r_csid < 4) {
tlm::tlm_phase phase(tlm::BEGIN_REQ); tlm::tlm_phase phase(tlm::BEGIN_REQ);
sc_core::sc_time delay(SC_ZERO_TIME); sc_core::sc_time delay(SC_ZERO_TIME);
tlm::scc::tlm_signal_gp<> gp; tlm::tlm_signal_gp<> gp;
gp.set_command(tlm::TLM_WRITE_COMMAND); gp.set_command(tlm::TLM_WRITE_COMMAND);
gp.set_value(true); gp.set_value(true);
_scs_o[regs->r_csid]->nb_transport_fw(gp, phase, delay); _scs_o[regs->r_csid]->nb_transport_fw(gp, phase, delay);
@ -153,7 +153,7 @@ beh::beh(sc_core::sc_module_name nm)
if (regs->r_csmode.mode == 2 && diff != 0 && (regs->r_csid < 4) && (diff & (1 << regs->r_csid)) != 0) { if (regs->r_csmode.mode == 2 && diff != 0 && (regs->r_csid < 4) && (diff & (1 << regs->r_csid)) != 0) {
tlm::tlm_phase phase(tlm::BEGIN_REQ); tlm::tlm_phase phase(tlm::BEGIN_REQ);
sc_core::sc_time delay(SC_ZERO_TIME); sc_core::sc_time delay(SC_ZERO_TIME);
tlm::scc::tlm_signal_gp<> gp; tlm::tlm_signal_gp<> gp;
gp.set_command(tlm::TLM_WRITE_COMMAND); gp.set_command(tlm::TLM_WRITE_COMMAND);
gp.set_value(true); gp.set_value(true);
_scs_o[regs->r_csid]->nb_transport_fw(gp, phase, delay); _scs_o[regs->r_csid]->nb_transport_fw(gp, phase, delay);
@ -195,10 +195,10 @@ void beh::transmit_data() {
sc_core::sc_time bit_duration(SC_ZERO_TIME); sc_core::sc_time bit_duration(SC_ZERO_TIME);
sc_core::sc_time start_time; sc_core::sc_time start_time;
auto set_bit = [&](bool val, tlm::scc::tlm_signal_bool_opt_out &socket, auto set_bit = [&](bool val, scc::tlm_signal_bool_opt_out &socket,
bool data_valid = false) -> std::pair<bool, uint32_t> { bool data_valid = false) -> std::pair<bool, uint32_t> {
if (socket.get_interface() == nullptr) return std::pair<bool, uint32_t>{false, 0}; if (socket.get_interface() == nullptr) return std::pair<bool, uint32_t>{false, 0};
auto *gp = tlm::scc::tlm_signal_gp<>::create(); auto *gp = tlm::tlm_signal_gp<>::create();
auto *ext = new sysc::tlm_signal_spi_extension(); auto *ext = new sysc::tlm_signal_spi_extension();
ext->tx.data_bits = 8; ext->tx.data_bits = 8;
ext->start_time = start_time; ext->start_time = start_time;
@ -253,7 +253,7 @@ void beh::transmit_data() {
} }
} }
void beh::receive_data(tlm::scc::tlm_signal_gp<> &gp, sc_core::sc_time &delay) {} void beh::receive_data(tlm::tlm_signal_gp<> &gp, sc_core::sc_time &delay) {}
void beh::update_irq() { void beh::update_irq() {
regs->r_ip.rxwm = regs->r_rxmark.rxmark < rx_fifo.num_available(); regs->r_ip.rxwm = regs->r_rxmark.rxmark < rx_fifo.num_available();

8
platform/src/sysc/terminal.cpp
View File

@ -46,7 +46,7 @@ terminal::terminal(const sc_core::sc_module_name &nm)
, NAMED(tx_o) , NAMED(tx_o)
, NAMED(rx_i) , NAMED(rx_i)
, NAMED(write_to_ws, false) { , NAMED(write_to_ws, false) {
rx_i.register_nb_transport([this](tlm::scc::tlm_signal_gp<sc_dt::sc_logic> &gp, tlm::tlm_phase &phase, rx_i.register_nb_transport([this](tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, tlm::tlm_phase &phase,
sc_core::sc_time &delay) -> tlm::tlm_sync_enum { sc_core::sc_time &delay) -> tlm::tlm_sync_enum {
this->receive(gp, delay); this->receive(gp, delay);
return tlm::TLM_COMPLETED; return tlm::TLM_COMPLETED;
@ -57,13 +57,13 @@ terminal::~terminal() = default;
void terminal::before_end_of_elaboration() { void terminal::before_end_of_elaboration() {
if (write_to_ws.get_value()) { if (write_to_ws.get_value()) {
SCCTRACE(SCMOD) << "Adding WS handler for " << (std::string{"/ws/"} + name()); SCTRACE() << "Adding WS handler for " << (std::string{"/ws/"} + name());
handler = std::make_shared<WsHandler>(); handler = std::make_shared<WsHandler>();
sc_comm_singleton::inst().registerWebSocketHandler((std::string{"/ws/"} + name()).c_str(), handler); sc_comm_singleton::inst().registerWebSocketHandler((std::string{"/ws/"} + name()).c_str(), handler);
} }
} }
void terminal::receive(tlm::scc::tlm_signal_gp<sc_dt::sc_logic> &gp, sc_core::sc_time &delay) { void terminal::receive(tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, sc_core::sc_time &delay) {
sysc::tlm_signal_uart_extension *ext; sysc::tlm_signal_uart_extension *ext;
gp.get_extension(ext); gp.get_extension(ext);
if (ext && ext->start_time != last_tx_start) { if (ext && ext->start_time != last_tx_start) {
@ -80,7 +80,7 @@ void terminal::receive(tlm::scc::tlm_signal_gp<sc_dt::sc_logic> &gp, sc_core::sc
this->handler->send(os.str()); this->handler->send(os.str());
}); });
else else
SCCINFO(SCMOD) << " receive: '" << msg << "'"; SCINFO(this->name()) << " receive: '" << msg << "'";
queue.clear(); queue.clear();
} }
} }

6
platform/src/sysc/uart.cpp
View File

@ -62,7 +62,7 @@ uart::uart(sc_core::sc_module_name nm)
dont_initialize(); dont_initialize();
SC_THREAD(transmit_data); SC_THREAD(transmit_data);
rx_i.register_nb_transport( rx_i.register_nb_transport(
[this](tlm::scc::tlm_signal_gp<bool> &gp, tlm::tlm_phase &phase, sc_core::sc_time &delay) -> tlm::tlm_sync_enum { [this](tlm::tlm_signal_gp<bool> &gp, tlm::tlm_phase &phase, sc_core::sc_time &delay) -> tlm::tlm_sync_enum {
this->receive_data(gp, delay); this->receive_data(gp, delay);
return tlm::TLM_COMPLETED; return tlm::TLM_COMPLETED;
}); });
@ -123,7 +123,7 @@ void uart::transmit_data() {
sc_core::sc_time start_time; sc_core::sc_time start_time;
auto set_bit = [&](bool val) { auto set_bit = [&](bool val) {
auto *gp = tlm::scc::tlm_signal_gp<>::create(); auto *gp = tlm::tlm_signal_gp<>::create();
auto *ext = new sysc::tlm_signal_uart_extension(); auto *ext = new sysc::tlm_signal_uart_extension();
ext->tx.data_bits = 8; ext->tx.data_bits = 8;
ext->tx.parity = false; ext->tx.parity = false;
@ -161,7 +161,7 @@ void uart::transmit_data() {
} }
} }
void uart::receive_data(tlm::scc::tlm_signal_gp<> &gp, sc_core::sc_time &delay) { void uart::receive_data(tlm::tlm_signal_gp<> &gp, sc_core::sc_time &delay) {
sysc::tlm_signal_uart_extension *ext{nullptr}; sysc::tlm_signal_uart_extension *ext{nullptr};
gp.get_extension(ext); gp.get_extension(ext);
if (ext && ext->start_time != rx_last_start) { if (ext && ext->start_time != rx_last_start) {

1
riscv Submodule

@ -0,0 +1 @@
Subproject commit 8cdf50d69ee0950816359b881c5b3396dc509ba3

2
scc

@ -1 +1 @@
Subproject commit 8785c03bd893776668e78a696876c28a14ba6640 Subproject commit d3d7c9f590ea422ad8d47486fb1efcaeef208cce

2
system.json
View File

@ -11,7 +11,7 @@
"i_terminal.write_to_ws" : false, "i_terminal.write_to_ws" : false,
"i_fe310": { "i_fe310": {
"enableTracing" : false, "enableTracing" : false,
"i_gpio0.write_to_ws": true, "i_gpio.write_to_ws": true,
"i_pwm0.enableTracing" : true, "i_pwm0.enableTracing" : true,
"i_pwm0.regs.enableTracing" : true, "i_pwm0.regs.enableTracing" : true,
"i_uart0.bit_true_transfer": false, "i_uart0.bit_true_transfer": false,