Changed SystemC model to model a platform in a system. Added dedicated

UART Terminal connected via tlm_signals
2018-07-12 15:27:36 +02:00
parent a3baa45b00
commit fede5b2af1
19 changed files with 529 additions and 130 deletions
--- a/riscv/incl/iss/arch/riscv_hart_msu_vp.h
+++ b/riscv/incl/iss/arch/riscv_hart_msu_vp.h
@ -697,7 +697,7 @@ iss::status riscv_hart_msu_vp<BASE>::read(const iss::addr_t &addr, unsigned leng
        } break;
        case traits<BASE>::RES: {
            auto it = atomic_reservation.find(addr.val);
-            if (it != atomic_reservation.end() && (*it).second != 0) {
+            if (it != atomic_reservation.end() && it->second != 0) {
                memset(data, 0xff, length);
                atomic_reservation.erase(addr.val);
            } else