Added RV32D extension
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@ -56,6 +56,8 @@ struct traits<${coreDef.name.toLowerCase()}> {
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enum constants {${coreDef.constants.collect{c -> c.name+"="+c.value}.join(', ')}};
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constexpr static unsigned FP_REGS_SIZE = ${coreDef.constants.find {it.name=='FLEN'}?.value?:0};
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enum reg_e {<%
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allRegs.each { reg ->
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if( reg instanceof RegisterFile) {
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@ -99,9 +101,6 @@ struct traits<${coreDef.name.toLowerCase()}> {
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enum sreg_flag_e {FLAGS};
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enum mem_type_e {${allSpaces.collect{s -> s.name}.join(', ')}};
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constexpr static bool has_fp_regs = ${allRegs.find {it.name=='FCSR'}!= null ?'true':'false'};
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};
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struct ${coreDef.name.toLowerCase()}: public arch_if {
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@ -50,7 +50,7 @@
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namespace iss {
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namespace vm {
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namespace fp_impl{
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void add_fp_functions_2_module(llvm::Module *mod);
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void add_fp_functions_2_module(llvm::Module *, unsigned);
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}
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}
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@ -89,7 +89,7 @@ protected:
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void setup_module(llvm::Module* m) override {
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super::setup_module(m);
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vm::fp_impl::add_fp_functions_2_module(m);
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vm::fp_impl::add_fp_functions_2_module(m, traits<ARCH>::FP_REGS_SIZE);
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}
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inline llvm::Value *gen_choose(llvm::Value *cond, llvm::Value *trueVal, llvm::Value *falseVal,
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