VP/HIFIVE1-VP
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Merge branch 'develop'

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This commit is contained in:
Eyck Jentzsch
2019-01-10 11:08:57 +00:00
parent 976777a039 3e8583977a
commit cb3a0d8411
50 changed files with 27601 additions and 16492 deletions
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6
platform/src/sysc/fe310.cpp
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@ -83,13 +83,13 @@ fe310::fe310(sc_core::sc_module_name nm)
size_t i = 0;
for (const auto &e : e300_plat_t_map) {
i_router->initiator.at(i)(e.target);
i_router->add_target_range(i, e.start, e.size);
i_router->set_target_range(i, e.start, e.size);
i++;
}
i_router->initiator.at(i)(i_mem_qspi->target);
i_router->add_target_range(i, 0x20000000, 512_MB);
i_router->set_target_range(i, 0x20000000, 512_MB);
i_router->initiator.at(++i)(i_mem_ram->target);
i_router->add_target_range(i, 0x80000000, 128_kB);
i_router->set_target_range(i, 0x80000000, 128_kB);
i_uart0->clk_i(s_tlclk);
i_uart1->clk_i(s_tlclk);

2
platform/src/sysc/plic.cpp
View File

@ -50,7 +50,7 @@ plic::plic(sc_core::sc_module_name nm)
{
regs->registerResources(*this);
// register callbacks
regs->claim_complete.set_write_cb([this](scc::sc_register<uint32_t> reg, uint32_t v, sc_core::sc_time d) -> bool {
regs->claim_complete.set_write_cb([this](scc::sc_register<uint32_t>& reg, uint32_t v, sc_core::sc_time d) -> bool {
reg.put(v);
reset_pending_int(v);
// std::cout << "Value of register: 0x" << std::hex << reg << std::endl;