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Refactored code generation to use custom templates

This commit is contained in:
Eyck Jentzsch 2018-02-09 18:34:26 +00:00
parent 7c2539bff0
commit c5a7adcef5
11 changed files with 7885 additions and 7322 deletions
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1
riscv/gen_input/.gitignore vendored Normal file
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@ -0,0 +1 @@
/src-gen/

4
riscv/gen_input/RV32C.core_desc
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@ -130,13 +130,13 @@ InsructionSet RV32CI {
args_disass: "0x%imm$05x";
PC<=PC+imm;
}
C.BEQZ(no_cont) {//(RV32)
C.BEQZ(no_cont,cond) {//(RV32)
encoding:b110 | imm[8:8]s | imm[4:3]s | rs1[2:0] | imm[7:6]s |imm[2:1]s | imm[5:5]s | b01;
args_disass: "x(8+%rs1$d), 0x%imm$05x";
val rs1_idx[5] <= rs1+8;
PC<=choose(X[rs1_idx]==0, PC+imm, PC+2);
}
C.BNEZ(no_cont) {//(RV32)
C.BNEZ(no_cont,cond) {//(RV32)
encoding:b111 | imm[8:8]s | imm[4:3]s | rs1[2:0] | imm[7:6]s | imm[2:1]s | imm[5:5]s | b01;
args_disass: "x(8+%rs1$d), 0x%imm$05x";
val rs1_idx[5] <= rs1+8;

12
riscv/gen_input/RV32IBase.core_desc
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@ -47,32 +47,32 @@ InsructionSet RV32IBase {
PC<=new_pc & ~0x1;
}
}
BEQ(no_cont){
BEQ(no_cont,cond){
encoding: imm[12:12]s |imm[10:5]s | rs2[4:0] | rs1[4:0] | b000 | imm[4:1]s | imm[11:11]s | b1100011;
args_disass:"x%rs1$d, x%rs2$d, 0x%imm$x";
PC<=choose(X[rs1]==X[rs2], PC+imm, PC+4);
}
BNE(no_cont){
BNE(no_cont,cond){
encoding: imm[12:12]s |imm[10:5]s | rs2[4:0] | rs1[4:0] | b001 | imm[4:1]s | imm[11:11]s | b1100011;
args_disass:"x%rs1$d, x%rs2$d, 0x%imm$x";
PC<=choose(X[rs1]!=X[rs2], PC+imm, PC+4);
}
BLT(no_cont){
BLT(no_cont,cond){
encoding: imm[12:12]s |imm[10:5]s | rs2[4:0] | rs1[4:0] | b100 | imm[4:1]s | imm[11:11]s | b1100011;
args_disass:"x%rs1$d, x%rs2$d, 0x%imm$x";
PC<=choose(X[rs1]s<X[rs2]s, PC+imm, PC+4);
}
BGE(no_cont) {
BGE(no_cont,cond) {
encoding: imm[12:12]s |imm[10:5]s | rs2[4:0] | rs1[4:0] | b101 | imm[4:1]s | imm[11:11]s | b1100011;
args_disass:"x%rs1$d, x%rs2$d, 0x%imm$x";
PC<=choose(X[rs1]s>=X[rs2]s, PC+imm, PC+4);
}
BLTU(no_cont) {
BLTU(no_cont,cond) {
encoding: imm[12:12]s |imm[10:5]s | rs2[4:0] | rs1[4:0] | b110 | imm[4:1]s | imm[11:11]s | b1100011;
args_disass:"x%rs1$d, x%rs2$d, 0x%imm$x";
PC<=choose(X[rs1]<X[rs2],PC+imm, PC+4);
}
BGEU(no_cont) {
BGEU(no_cont,cond) {
encoding: imm[12:12]s |imm[10:5]s | rs2[4:0] | rs1[4:0] | b111 | imm[4:1]s | imm[11:11]s | b1100011;
args_disass:"x%rs1$d, x%rs2$d, 0x%imm$x";
PC<=choose(X[rs1]>=X[rs2], PC+imm, PC+4);

8
riscv/gen_input/templates/CORENAME_cyles.txt.gtl Normal file
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@ -0,0 +1,8 @@
{
'${coreDef.name}' : [<%instructions.each{instr -> %>
{
'name' : '${instr.name}',
'delay' : ${generator.hasAttribute(instr.instruction, com.minres.coredsl.coreDsl.InstrAttribute.COND)?[1,1]:1
},<%}%>
]
}

164
riscv/gen_input/templates/incl-CORENAME.h.gtl Normal file
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@ -0,0 +1,164 @@
////////////////////////////////////////////////////////////////////////////////
// Copyright (C) 2017, MINRES Technologies GmbH
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright notice,
// this list of conditions and the following disclaimer in the documentation
// and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its contributors
// may be used to endorse or promote products derived from this software
// without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
////////////////////////////////////////////////////////////////////////////////
<%
import com.minres.coredsl.coreDsl.Register
import com.minres.coredsl.coreDsl.RegisterFile
def getTypeSize(size){
if(size > 32) 64 else if(size > 16) 32 else if(size > 8) 16 else 8
}
%>
#ifndef _${coreDef.name.toUpperCase()}_H_
#define _${coreDef.name.toUpperCase()}_H_
#include <iss/arch_if.h>
#include <iss/vm_if.h>
#include <iss/arch/traits.h>
#include <array>
namespace iss {
namespace arch {
struct ${coreDef.name.toLowerCase()};
template<>
struct traits<${coreDef.name.toLowerCase()}> {
enum constants {${coreDef.constants.collect{c -> c.name+"="+c.value}.join(', ')}};
enum reg_e {<%
allRegs.each { reg ->
if( reg instanceof RegisterFile) {
(reg.range.right..reg.range.left).each{%>
${reg.name}${it},<%
}
} else if(reg instanceof Register){ %>
${reg.name},<%
}
}%>
NUM_REGS,
NEXT_${pc.name}=NUM_REGS,
TRAP_STATE,
PENDING_TRAP,
MACHINE_STATE,
ICOUNT
};
using reg_t = uint${regDataWidth}_t;
using addr_t = uint${addrDataWidth}_t;
using code_word_t = uint${addrDataWidth}_t; //TODO: check removal
using virt_addr_t = iss::typed_addr_t<iss::address_type::VIRTUAL>;
using phys_addr_t = iss::typed_addr_t<iss::address_type::PHYSICAL>;
constexpr static unsigned reg_bit_width(unsigned r) {
constexpr std::array<const uint32_t, ${regSizes.size}> ${coreDef.name}_reg_size{{${regSizes.join(",")}}};
return ${coreDef.name}_reg_size[r];
}
constexpr static unsigned reg_byte_offset(unsigned r) {
constexpr std::array<const uint32_t, ${regOffsets.size}> ${coreDef.name}_reg_byte_offset{{${regOffsets.join(",")}}};
return ${coreDef.name}_reg_byte_offset[r];
}
static const uint64_t addr_mask = (reg_t(1) << (XLEN - 1)) | ((reg_t(1) << (XLEN - 1)) - 1);
enum sreg_flag_e {FLAGS};
enum mem_type_e {${allSpaces.collect{s -> s.name}.join(', ')}};
};
struct ${coreDef.name.toLowerCase()}: public arch_if {
using virt_addr_t = typename traits<${coreDef.name.toLowerCase()}>::virt_addr_t;
using phys_addr_t = typename traits<${coreDef.name.toLowerCase()}>::phys_addr_t;
using reg_t = typename traits<${coreDef.name.toLowerCase()}>::reg_t;
using addr_t = typename traits<${coreDef.name.toLowerCase()}>::addr_t;
${coreDef.name.toLowerCase()}();
~${coreDef.name.toLowerCase()}();
void reset(uint64_t address=0) override;
uint8_t* get_regs_base_ptr() override;
/// deprecated
void get_reg(short idx, std::vector<uint8_t>& value) override {}
void set_reg(short idx, const std::vector<uint8_t>& value) override {}
/// deprecated
bool get_flag(int flag) override {return false;}
void set_flag(int, bool value) override {};
/// deprecated
void update_flags(operations op, uint64_t opr1, uint64_t opr2) override {};
uint64_t get_icount() { return reg.icount;}
inline phys_addr_t v2p(const iss::addr_t& addr){
if(addr.space != traits<${coreDef.name.toLowerCase()}>::MEM ||
addr.type == iss::address_type::PHYSICAL ||
addr_mode[static_cast<uint16_t>(addr.access)&0x3]==address_type::PHYSICAL){
return phys_addr_t(addr.access, addr.space, addr.val&traits<${coreDef.name.toLowerCase()}>::addr_mask);
} else
return virt2phys(addr);
}
virtual phys_addr_t virt2phys(const iss::addr_t& addr);
virtual iss::sync_type needed_sync() const { return iss::NO_SYNC; }
protected:
struct ${coreDef.name}_regs {<%
allRegs.each { reg ->
if( reg instanceof RegisterFile) {
(reg.range.right..reg.range.left).each{%>
uint${generator.getSize(reg)}_t ${reg.name}${it} = 0;<%
}
} else if(reg instanceof Register){ %>
uint${generator.getSize(reg)}_t ${reg.name} = 0;<%
}
}%>
uint${generator.getSize(pc)}_t NEXT_${pc.name} = 0;
uint32_t trap_state = 0, pending_trap = 0, machine_state = 0;
uint64_t icount = 0;
} reg;
std::array<address_type, 4> addr_mode;
uint64_t cycles = 0;
};
}
}
#endif /* _${coreDef.name.toUpperCase()}_H_ */

73
riscv/gen_input/templates/src-CORENAME.cpp.gtl Normal file
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@ -0,0 +1,73 @@
////////////////////////////////////////////////////////////////////////////////
// Copyright (C) 2017, MINRES Technologies GmbH
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright notice,
// this list of conditions and the following disclaimer in the documentation
// and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its contributors
// may be used to endorse or promote products derived from this software
// without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
////////////////////////////////////////////////////////////////////////////////
#include "util/ities.h"
#include <util/logging.h>
#include <elfio/elfio.hpp>
#include <iss/arch/${coreDef.name.toLowerCase()}.h>
#ifdef __cplusplus
extern "C" {
#endif
#include <ihex.h>
#ifdef __cplusplus
}
#endif
#include <fstream>
#include <cstdio>
#include <cstring>
using namespace iss::arch;
${coreDef.name.toLowerCase()}::${coreDef.name.toLowerCase()}() {
reg.icount=0;
}
${coreDef.name.toLowerCase()}::~${coreDef.name.toLowerCase()}(){
}
void ${coreDef.name.toLowerCase()}::reset(uint64_t address) {
for(size_t i=0; i<traits<${coreDef.name.toLowerCase()}>::NUM_REGS; ++i) set_reg(i, std::vector<uint8_t>(sizeof(traits<${coreDef.name.toLowerCase()}>::reg_t),0));
reg.PC=address;
reg.NEXT_PC=reg.PC;
reg.trap_state=0;
reg.machine_state=0x0;
}
uint8_t* ${coreDef.name.toLowerCase()}::get_regs_base_ptr(){
return reinterpret_cast<uint8_t*>(&reg);
}
${coreDef.name.toLowerCase()}::phys_addr_t ${coreDef.name.toLowerCase()}::v2p(const iss::addr_t& pc) {
return phys_addr_t(pc); //change logical address to physical address
}

323
riscv/gen_input/templates/vm-vm_CORENAME.cpp.gtl Normal file
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@ -0,0 +1,323 @@
////////////////////////////////////////////////////////////////////////////////
// Copyright (C) 2017, MINRES Technologies GmbH
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright notice,
// this list of conditions and the following disclaimer in the documentation
// and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its contributors
// may be used to endorse or promote products derived from this software
// without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// Contributors:
// eyck@minres.com - initial API and implementation
//
//
////////////////////////////////////////////////////////////////////////////////
#include <iss/arch/${coreDef.name.toLowerCase()}.h>
#include <iss/arch/riscv_hart_msu_vp.h>
#include <iss/debugger/gdb_session.h>
#include <iss/debugger/server.h>
#include <iss/iss.h>
#include <iss/vm_base.h>
#include <util/logging.h>
#include <boost/format.hpp>
#include <iss/debugger/riscv_target_adapter.h>
#include <array>
namespace iss {
namespace ${coreDef.name.toLowerCase()} {
using namespace iss::arch;
using namespace llvm;
using namespace iss::debugger;
template <typename ARCH> class vm_impl : public vm::vm_base<ARCH> {
public:
using super = typename vm::vm_base<ARCH>;
using virt_addr_t = typename super::virt_addr_t;
using phys_addr_t = typename super::phys_addr_t;
using code_word_t = typename super::code_word_t;
using addr_t = typename super::addr_t;
vm_impl();
vm_impl(ARCH &core, unsigned core_id = 0, unsigned cluster_id = 0);
void enableDebug(bool enable) { super::sync_exec = super::ALL_SYNC; }
target_adapter_if *accquire_target_adapter(server_if *srv) {
debugger_if::dbg_enabled = true;
if (vm::vm_base<ARCH>::tgt_adapter == nullptr)
vm::vm_base<ARCH>::tgt_adapter = new riscv_target_adapter<ARCH>(srv, this->get_arch());
return vm::vm_base<ARCH>::tgt_adapter;
}
protected:
using vm::vm_base<ARCH>::get_reg_ptr;
template <typename T> inline llvm::ConstantInt *size(T type) {
return llvm::ConstantInt::get(getContext(), llvm::APInt(32, type->getType()->getScalarSizeInBits()));
}
inline llvm::Value *gen_choose(llvm::Value *cond, llvm::Value *trueVal, llvm::Value *falseVal,
unsigned size) const {
return super::gen_cond_assign(cond, this->gen_ext(trueVal, size), this->gen_ext(falseVal, size));
}
std::tuple<vm::continuation_e, llvm::BasicBlock *> gen_single_inst_behavior(virt_addr_t &, unsigned int &,
llvm::BasicBlock *) override;
void gen_leave_behavior(llvm::BasicBlock *leave_blk) override;
void gen_raise_trap(uint16_t trap_id, uint16_t cause);
void gen_leave_trap(unsigned lvl);
void gen_wait(unsigned type);
void gen_trap_behavior(llvm::BasicBlock *) override;
void gen_trap_check(llvm::BasicBlock *bb);
inline llvm::Value *gen_reg_load(unsigned i, unsigned level = 0) {
return this->builder.CreateLoad(get_reg_ptr(i), false);
}
inline void gen_set_pc(virt_addr_t pc, unsigned reg_num) {
llvm::Value *next_pc_v = this->builder.CreateSExtOrTrunc(this->gen_const(traits<ARCH>::XLEN, pc.val),
this->get_type(traits<ARCH>::XLEN));
this->builder.CreateStore(next_pc_v, get_reg_ptr(reg_num), true);
}
// some compile time constants
// enum { MASK16 = 0b1111110001100011, MASK32 = 0b11111111111100000111000001111111 };
enum { MASK16 = 0b1111111111111111, MASK32 = 0b11111111111100000111000001111111 };
enum { EXTR_MASK16 = MASK16 >> 2, EXTR_MASK32 = MASK32 >> 2 };
enum { LUT_SIZE = 1 << util::bit_count(EXTR_MASK32), LUT_SIZE_C = 1 << util::bit_count(EXTR_MASK16) };
using this_class = vm_impl<ARCH>;
using compile_func = std::tuple<vm::continuation_e, llvm::BasicBlock *> (this_class::*)(virt_addr_t &pc,
code_word_t instr,
llvm::BasicBlock *bb);
std::array<compile_func, LUT_SIZE> lut;
std::array<compile_func, LUT_SIZE_C> lut_00, lut_01, lut_10;
std::array<compile_func, LUT_SIZE> lut_11;
std::array<compile_func*, 4> qlut;
std::array<const uint32_t, 4> lutmasks = { { EXTR_MASK16, EXTR_MASK16, EXTR_MASK16, EXTR_MASK32 } };
void expand_bit_mask(int pos, uint32_t mask, uint32_t value, uint32_t valid, uint32_t idx, compile_func lut[],
compile_func f) {
if (pos < 0) {
lut[idx] = f;
} else {
auto bitmask = 1UL << pos;
if ((mask & bitmask) == 0) {
expand_bit_mask(pos - 1, mask, value, valid, idx, lut, f);
} else {
if ((valid & bitmask) == 0) {
expand_bit_mask(pos - 1, mask, value, valid, (idx << 1), lut, f);
expand_bit_mask(pos - 1, mask, value, valid, (idx << 1) + 1, lut, f);
} else {
auto new_val = idx << 1;
if ((value & bitmask) != 0) new_val++;
expand_bit_mask(pos - 1, mask, value, valid, new_val, lut, f);
}
}
}
}
inline uint32_t extract_fields(uint32_t val) { return extract_fields(29, val >> 2, lutmasks[val & 0x3], 0); }
uint32_t extract_fields(int pos, uint32_t val, uint32_t mask, uint32_t lut_val) {
if (pos >= 0) {
auto bitmask = 1UL << pos;
if ((mask & bitmask) == 0) {
lut_val = extract_fields(pos - 1, val, mask, lut_val);
} else {
auto new_val = lut_val << 1;
if ((val & bitmask) != 0) new_val++;
lut_val = extract_fields(pos - 1, val, mask, new_val);
}
}
return lut_val;
}
private:
/****************************************************************************
* start opcode definitions
****************************************************************************/
struct InstructionDesriptor {
size_t length;
uint32_t value;
uint32_t mask;
compile_func op;
};
const std::array<InstructionDesriptor, ${instructions.size}> instr_descr = {{
/* entries are: size, valid value, valid mask, function ptr */<%instructions.each{instr -> %>
/* instruction ${instr.instruction.name} */
{${instr.length}, ${instr.value}, ${instr.mask}, &this_class::__${generator.functionName(instr.name)}},<%}%>
}};
/* instruction definitions */<%instructions.eachWithIndex{instr, idx -> %>
/* instruction ${idx}: ${instr.name} */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __${generator.functionName(instr.name)}(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){<%instr.code.eachLine{%>
${it}<%}%>
}
<%}%>
/****************************************************************************
* end opcode definitions
****************************************************************************/
std::tuple<vm::continuation_e, llvm::BasicBlock *> illegal_intruction(virt_addr_t &pc, code_word_t instr,
llvm::BasicBlock *bb) {
this->gen_sync(iss::PRE_SYNC, instr_descr.size());
this->builder.CreateStore(this->builder.CreateLoad(get_reg_ptr(traits<ARCH>::NEXT_PC), true),
get_reg_ptr(traits<ARCH>::PC), true);
this->builder.CreateStore(
this->builder.CreateAdd(this->builder.CreateLoad(get_reg_ptr(traits<ARCH>::ICOUNT), true),
this->gen_const(64U, 1)),
get_reg_ptr(traits<ARCH>::ICOUNT), true);
pc = pc + ((instr & 3) == 3 ? 4 : 2);
this->gen_raise_trap(0, 2); // illegal instruction trap
this->gen_sync(iss::POST_SYNC, instr_descr.size());
this->gen_trap_check(this->leave_blk);
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
};
template <typename CODE_WORD> void debug_fn(CODE_WORD insn) {
volatile CODE_WORD x = insn;
insn = 2 * x;
}
template <typename ARCH> vm_impl<ARCH>::vm_impl() { this(new ARCH()); }
template <typename ARCH>
vm_impl<ARCH>::vm_impl(ARCH &core, unsigned core_id, unsigned cluster_id)
: vm::vm_base<ARCH>(core, core_id, cluster_id) {
qlut[0] = lut_00.data();
qlut[1] = lut_01.data();
qlut[2] = lut_10.data();
qlut[3] = lut_11.data();
for (auto instr : instr_descr) {
auto quantrant = instr.value & 0x3;
expand_bit_mask(29, lutmasks[quantrant], instr.value >> 2, instr.mask >> 2, 0, qlut[quantrant], instr.op);
}
}
template <typename ARCH>
std::tuple<vm::continuation_e, llvm::BasicBlock *>
vm_impl<ARCH>::gen_single_inst_behavior(virt_addr_t &pc, unsigned int &inst_cnt, llvm::BasicBlock *this_block) {
// we fetch at max 4 byte, alignment is 2
code_word_t insn = 0;
const typename traits<ARCH>::addr_t upper_bits = ~traits<ARCH>::PGMASK;
phys_addr_t paddr(pc);
try {
uint8_t *const data = (uint8_t *)&insn;
paddr = this->core.v2p(pc);
if ((pc.val & upper_bits) != ((pc.val + 2) & upper_bits)) { // we may cross a page boundary
auto res = this->core.read(paddr, 2, data);
if (res != iss::Ok) throw trap_access(1, pc.val);
if ((insn & 0x3) == 0x3) { // this is a 32bit instruction
res = this->core.read(this->core.v2p(pc + 2), 2, data + 2);
}
} else {
auto res = this->core.read(paddr, 4, data);
if (res != iss::Ok) throw trap_access(1, pc.val);
}
} catch (trap_access &ta) {
throw trap_access(ta.id, pc.val);
}
if (insn == 0x0000006f || (insn&0xffff)==0xa001) throw simulation_stopped(0); // 'J 0' or 'C.J 0'
// curr pc on stack
typename vm_impl<ARCH>::processing_pc_entry addr(*this, pc, paddr);
++inst_cnt;
auto lut_val = extract_fields(insn);
auto f = qlut[insn & 0x3][lut_val];
if (f == nullptr) {
f = &this_class::illegal_intruction;
}
return (this->*f)(pc, insn, this_block);
}
template <typename ARCH> void vm_impl<ARCH>::gen_leave_behavior(llvm::BasicBlock *leave_blk) {
this->builder.SetInsertPoint(leave_blk);
this->builder.CreateRet(this->builder.CreateLoad(get_reg_ptr(arch::traits<ARCH>::NEXT_PC), false));
}
template <typename ARCH> void vm_impl<ARCH>::gen_raise_trap(uint16_t trap_id, uint16_t cause) {
auto *TRAP_val = this->gen_const(32, 0x80 << 24 | (cause << 16) | trap_id);
this->builder.CreateStore(TRAP_val, get_reg_ptr(traits<ARCH>::TRAP_STATE), true);
}
template <typename ARCH> void vm_impl<ARCH>::gen_leave_trap(unsigned lvl) {
std::vector<llvm::Value *> args{
this->core_ptr, llvm::ConstantInt::get(getContext(), llvm::APInt(64, lvl)),
};
this->builder.CreateCall(this->mod->getFunction("leave_trap"), args);
auto *PC_val = this->gen_read_mem(traits<ARCH>::CSR, (lvl << 8) + 0x41, traits<ARCH>::XLEN / 8);
this->builder.CreateStore(PC_val, get_reg_ptr(traits<ARCH>::NEXT_PC), false);
}
template <typename ARCH> void vm_impl<ARCH>::gen_wait(unsigned type) {
std::vector<llvm::Value *> args{
this->core_ptr, llvm::ConstantInt::get(getContext(), llvm::APInt(64, type)),
};
this->builder.CreateCall(this->mod->getFunction("wait"), args);
}
template <typename ARCH> void vm_impl<ARCH>::gen_trap_behavior(llvm::BasicBlock *trap_blk) {
this->builder.SetInsertPoint(trap_blk);
auto *trap_state_val = this->builder.CreateLoad(get_reg_ptr(traits<ARCH>::TRAP_STATE), true);
std::vector<llvm::Value *> args{this->core_ptr, this->adj_to64(trap_state_val),
this->adj_to64(this->builder.CreateLoad(get_reg_ptr(traits<ARCH>::PC), false))};
this->builder.CreateCall(this->mod->getFunction("enter_trap"), args);
auto *trap_addr_val = this->builder.CreateLoad(get_reg_ptr(traits<ARCH>::NEXT_PC), false);
this->builder.CreateRet(trap_addr_val);
}
template <typename ARCH> inline void vm_impl<ARCH>::gen_trap_check(llvm::BasicBlock *bb) {
auto *v = this->builder.CreateLoad(get_reg_ptr(arch::traits<ARCH>::TRAP_STATE), true);
this->gen_cond_branch(this->builder.CreateICmp(
ICmpInst::ICMP_EQ, v,
llvm::ConstantInt::get(getContext(), llvm::APInt(v->getType()->getIntegerBitWidth(), 0))),
bb, this->trap_blk, 1);
}
} // namespace ${coreDef.name.toLowerCase()}
template <>
std::unique_ptr<vm_if> create<arch::${coreDef.name.toLowerCase()}>(arch::${coreDef.name.toLowerCase()} *core, unsigned short port, bool dump) {
std::unique_ptr<${coreDef.name.toLowerCase()}::vm_impl<arch::${coreDef.name.toLowerCase()}>> ret =
std::make_unique<${coreDef.name.toLowerCase()}::vm_impl<arch::${coreDef.name.toLowerCase()}>>(*core, dump);
if (port != 0) debugger::server<debugger::gdb_session>::run_server(ret.get(), port);
return ret;
}
} // namespace iss

7
riscv/incl/iss/arch/rv32imac.h
View File

@ -28,9 +28,6 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// Created on: Tue Feb 06 17:18:49 UTC 2018
// * rv32imac.h Author: <CoreDSL Generator>
//
////////////////////////////////////////////////////////////////////////////////
#ifndef _RV32IMAC_H_
@ -49,7 +46,7 @@ struct rv32imac;
template<>
struct traits<rv32imac> {
enum constants {XLEN=32,XLEN2=64,XLEN_BIT_MASK=31,PCLEN=32,fence=0,fencei=1,fencevmal=2,fencevmau=3,MISA_VAL=1075056897,PGSIZE=4096,PGMASK=4095};
enum constants {XLEN=32, XLEN2=64, XLEN_BIT_MASK=31, PCLEN=32, fence=0, fencei=1, fencevmal=2, fencevmau=3, MISA_VAL=1075056897, PGSIZE=4096, PGMASK=4095};
enum reg_e {
X0,
@ -117,7 +114,7 @@ struct traits<rv32imac> {
enum sreg_flag_e {FLAGS};
enum mem_type_e {MEM,CSR,FENCE,RES};
enum mem_type_e {MEM, CSR, FENCE, RES};
};

7
riscv/incl/iss/arch/rv64ia.h
View File

@ -28,9 +28,6 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// Created on: Tue Feb 06 17:18:50 UTC 2018
// * rv64ia.h Author: <CoreDSL Generator>
//
////////////////////////////////////////////////////////////////////////////////
#ifndef _RV64IA_H_
@ -49,7 +46,7 @@ struct rv64ia;
template<>
struct traits<rv64ia> {
enum constants {XLEN=64,XLEN2=128,XLEN_BIT_MASK=63,PCLEN=64,fence=0,fencei=1,fencevmal=2,fencevmau=3,MISA_VAL=2147746049,PGSIZE=4096,PGMASK=4095};
enum constants {XLEN=64, XLEN2=128, XLEN_BIT_MASK=63, PCLEN=64, fence=0, fencei=1, fencevmal=2, fencevmau=3, MISA_VAL=2147746049, PGSIZE=4096, PGMASK=4095};
enum reg_e {
X0,
@ -117,7 +114,7 @@ struct traits<rv64ia> {
enum sreg_flag_e {FLAGS};
enum mem_type_e {MEM,CSR,FENCE,RES};
enum mem_type_e {MEM, CSR, FENCE, RES};
};

204
riscv/src/internal/vm_rv32imac.cpp
View File

@ -179,9 +179,8 @@ private:
compile_func op;
};
/* start generated code */
const std::array<InstructionDesriptor, 99> instr_descr = {{
/* entries are: valid value, valid mask, function ptr */
/* entries are: size, valid value, valid mask, function ptr */
/* instruction LUI */
{32, 0b00000000000000000000000000110111, 0b00000000000000000000000001111111, &this_class::__lui},
/* instruction AUIPC */
@ -381,7 +380,9 @@ private:
/* instruction DII */
{16, 0b0000000000000000, 0b1111111111111111, &this_class::__dii},
}};
//0: instruction LUI
/* instruction definitions */
/* instruction 0: LUI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __lui(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("LUI");
@ -415,7 +416,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//1: instruction AUIPC
/* instruction 1: AUIPC */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __auipc(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AUIPC");
@ -451,7 +452,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//2: instruction JAL
/* instruction 2: JAL */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __jal(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("JAL");
@ -489,7 +490,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//3: instruction JALR
/* instruction 3: JALR */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __jalr(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("JALR");
@ -531,7 +532,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//4: instruction BEQ
/* instruction 4: BEQ */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __beq(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("BEQ");
@ -573,7 +574,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//5: instruction BNE
/* instruction 5: BNE */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __bne(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("BNE");
@ -615,7 +616,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//6: instruction BLT
/* instruction 6: BLT */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __blt(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("BLT");
@ -661,7 +662,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//7: instruction BGE
/* instruction 7: BGE */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __bge(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("BGE");
@ -707,7 +708,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//8: instruction BLTU
/* instruction 8: BLTU */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __bltu(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("BLTU");
@ -749,7 +750,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//9: instruction BGEU
/* instruction 9: BGEU */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __bgeu(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("BGEU");
@ -791,7 +792,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//10: instruction LB
/* instruction 10: LB */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __lb(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("LB");
@ -832,7 +833,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//11: instruction LH
/* instruction 11: LH */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __lh(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("LH");
@ -873,7 +874,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//12: instruction LW
/* instruction 12: LW */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __lw(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("LW");
@ -914,7 +915,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//13: instruction LBU
/* instruction 13: LBU */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __lbu(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("LBU");
@ -955,7 +956,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//14: instruction LHU
/* instruction 14: LHU */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __lhu(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("LHU");
@ -996,7 +997,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//15: instruction SB
/* instruction 15: SB */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sb(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SB");
@ -1035,7 +1036,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//16: instruction SH
/* instruction 16: SH */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sh(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SH");
@ -1074,7 +1075,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//17: instruction SW
/* instruction 17: SW */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sw(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SW");
@ -1113,7 +1114,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//18: instruction ADDI
/* instruction 18: ADDI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __addi(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("ADDI");
@ -1150,7 +1151,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//19: instruction SLTI
/* instruction 19: SLTI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __slti(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SLTI");
@ -1196,7 +1197,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//20: instruction SLTIU
/* instruction 20: SLTIU */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sltiu(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SLTIU");
@ -1243,7 +1244,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//21: instruction XORI
/* instruction 21: XORI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __xori(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("XORI");
@ -1280,7 +1281,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//22: instruction ORI
/* instruction 22: ORI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __ori(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("ORI");
@ -1317,7 +1318,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//23: instruction ANDI
/* instruction 23: ANDI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __andi(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("ANDI");
@ -1354,7 +1355,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//24: instruction SLLI
/* instruction 24: SLLI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __slli(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SLLI");
@ -1395,7 +1396,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//25: instruction SRLI
/* instruction 25: SRLI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __srli(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SRLI");
@ -1436,7 +1437,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//26: instruction SRAI
/* instruction 26: SRAI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __srai(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SRAI");
@ -1477,7 +1478,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//27: instruction ADD
/* instruction 27: ADD */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __add(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("ADD");
@ -1514,7 +1515,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//28: instruction SUB
/* instruction 28: SUB */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sub(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SUB");
@ -1551,7 +1552,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//29: instruction SLL
/* instruction 29: SLL */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sll(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SLL");
@ -1590,7 +1591,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//30: instruction SLT
/* instruction 30: SLT */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __slt(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SLT");
@ -1636,7 +1637,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//31: instruction SLTU
/* instruction 31: SLTU */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sltu(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SLTU");
@ -1684,7 +1685,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//32: instruction XOR
/* instruction 32: XOR */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __xor(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("XOR");
@ -1721,7 +1722,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//33: instruction SRL
/* instruction 33: SRL */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __srl(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SRL");
@ -1760,7 +1761,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//34: instruction SRA
/* instruction 34: SRA */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sra(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SRA");
@ -1799,7 +1800,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//35: instruction OR
/* instruction 35: OR */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __or(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("OR");
@ -1836,7 +1837,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//36: instruction AND
/* instruction 36: AND */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __and(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AND");
@ -1873,7 +1874,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//37: instruction FENCE
/* instruction 37: FENCE */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __fence(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("FENCE");
@ -1912,7 +1913,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//38: instruction FENCE_I
/* instruction 38: FENCE_I */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __fence_i(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("FENCE_I");
@ -1945,7 +1946,7 @@ private:
return std::make_tuple(iss::vm::FLUSH, nullptr);
}
//39: instruction ECALL
/* instruction 39: ECALL */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __ecall(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("ECALL");
@ -1971,7 +1972,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//40: instruction EBREAK
/* instruction 40: EBREAK */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __ebreak(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("EBREAK");
@ -1997,7 +1998,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//41: instruction URET
/* instruction 41: URET */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __uret(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("URET");
@ -2023,7 +2024,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//42: instruction SRET
/* instruction 42: SRET */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sret(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SRET");
@ -2049,7 +2050,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//43: instruction MRET
/* instruction 43: MRET */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __mret(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("MRET");
@ -2075,7 +2076,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//44: instruction WFI
/* instruction 44: WFI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __wfi(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("WFI");
@ -2103,7 +2104,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//45: instruction SFENCE.VMA
/* instruction 45: SFENCE.VMA */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sfence_vma(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SFENCE.VMA");
@ -2141,7 +2142,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//46: instruction CSRRW
/* instruction 46: CSRRW */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __csrrw(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("CSRRW");
@ -2189,7 +2190,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//47: instruction CSRRS
/* instruction 47: CSRRS */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __csrrs(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("CSRRS");
@ -2235,7 +2236,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//48: instruction CSRRC
/* instruction 48: CSRRC */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __csrrc(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("CSRRC");
@ -2281,7 +2282,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//49: instruction CSRRWI
/* instruction 49: CSRRWI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __csrrwi(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("CSRRWI");
@ -2324,7 +2325,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//50: instruction CSRRSI
/* instruction 50: CSRRSI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __csrrsi(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("CSRRSI");
@ -2372,7 +2373,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//51: instruction CSRRCI
/* instruction 51: CSRRCI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __csrrci(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("CSRRCI");
@ -2420,7 +2421,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//52: instruction MUL
/* instruction 52: MUL */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __mul(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("MUL");
@ -2467,7 +2468,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//53: instruction MULH
/* instruction 53: MULH */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __mulh(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("MULH");
@ -2516,7 +2517,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//54: instruction MULHSU
/* instruction 54: MULHSU */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __mulhsu(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("MULHSU");
@ -2565,7 +2566,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//55: instruction MULHU
/* instruction 55: MULHU */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __mulhu(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("MULHU");
@ -2614,7 +2615,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//56: instruction DIV
/* instruction 56: DIV */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __div(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("DIV");
@ -2679,7 +2680,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//57: instruction DIVU
/* instruction 57: DIVU */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __divu(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("DIVU");
@ -2744,7 +2745,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//58: instruction REM
/* instruction 58: REM */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __rem(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("REM");
@ -2809,7 +2810,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//59: instruction REMU
/* instruction 59: REMU */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __remu(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("REMU");
@ -2874,7 +2875,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//60: instruction LR.W
/* instruction 60: LR.W */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __lr_w(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("LR.W");
@ -2922,7 +2923,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//61: instruction SC.W
/* instruction 61: SC.W */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sc_w(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SC.W");
@ -2988,7 +2989,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//62: instruction AMOSWAP.W
/* instruction 62: AMOSWAP.W */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amoswap_w(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOSWAP.W");
@ -3034,7 +3035,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//63: instruction AMOADD.W
/* instruction 63: AMOADD.W */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amoadd_w(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOADD.W");
@ -3084,7 +3085,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//64: instruction AMOXOR.W
/* instruction 64: AMOXOR.W */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amoxor_w(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOXOR.W");
@ -3134,7 +3135,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//65: instruction AMOAND.W
/* instruction 65: AMOAND.W */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amoand_w(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOAND.W");
@ -3184,7 +3185,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//66: instruction AMOOR.W
/* instruction 66: AMOOR.W */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amoor_w(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOOR.W");
@ -3234,7 +3235,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//67: instruction AMOMIN.W
/* instruction 67: AMOMIN.W */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amomin_w(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOMIN.W");
@ -3293,7 +3294,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//68: instruction AMOMAX.W
/* instruction 68: AMOMAX.W */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amomax_w(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOMAX.W");
@ -3352,7 +3353,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//69: instruction AMOMINU.W
/* instruction 69: AMOMINU.W */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amominu_w(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOMINU.W");
@ -3407,7 +3408,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//70: instruction AMOMAXU.W
/* instruction 70: AMOMAXU.W */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amomaxu_w(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOMAXU.W");
@ -3466,7 +3467,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//71: instruction C.ADDI4SPN
/* instruction 71: C.ADDI4SPN */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_addi4spn(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.ADDI4SPN");
@ -3505,7 +3506,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//72: instruction C.LW
/* instruction 72: C.LW */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_lw(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.LW");
@ -3543,7 +3544,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//73: instruction C.SW
/* instruction 73: C.SW */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_sw(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.SW");
@ -3584,7 +3585,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//74: instruction C.ADDI
/* instruction 74: C.ADDI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_addi(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.ADDI");
@ -3618,7 +3619,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//75: instruction C.NOP
/* instruction 75: C.NOP */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_nop(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.NOP");
@ -3646,7 +3647,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//76: instruction C.JAL
/* instruction 76: C.JAL */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_jal(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.JAL");
@ -3682,7 +3683,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//77: instruction C.LI
/* instruction 77: C.LI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_li(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.LI");
@ -3717,7 +3718,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//78: instruction C.LUI
/* instruction 78: C.LUI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_lui(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.LUI");
@ -3755,7 +3756,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//79: instruction C.ADDI16SP
/* instruction 79: C.ADDI16SP */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_addi16sp(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.ADDI16SP");
@ -3791,7 +3792,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//80: instruction C.SRLI
/* instruction 80: C.SRLI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_srli(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.SRLI");
@ -3826,7 +3827,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//81: instruction C.SRAI
/* instruction 81: C.SRAI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_srai(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.SRAI");
@ -3861,7 +3862,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//82: instruction C.ANDI
/* instruction 82: C.ANDI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_andi(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.ANDI");
@ -3896,7 +3897,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//83: instruction C.SUB
/* instruction 83: C.SUB */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_sub(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.SUB");
@ -3932,7 +3933,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//84: instruction C.XOR
/* instruction 84: C.XOR */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_xor(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.XOR");
@ -3968,7 +3969,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//85: instruction C.OR
/* instruction 85: C.OR */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_or(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.OR");
@ -4004,7 +4005,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//86: instruction C.AND
/* instruction 86: C.AND */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_and(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.AND");
@ -4040,7 +4041,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//87: instruction C.J
/* instruction 87: C.J */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_j(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.J");
@ -4071,7 +4072,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//88: instruction C.BEQZ
/* instruction 88: C.BEQZ */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_beqz(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.BEQZ");
@ -4113,7 +4114,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//89: instruction C.BNEZ
/* instruction 89: C.BNEZ */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_bnez(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.BNEZ");
@ -4155,7 +4156,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//90: instruction C.SLLI
/* instruction 90: C.SLLI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_slli(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.SLLI");
@ -4192,7 +4193,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//91: instruction C.LWSP
/* instruction 91: C.LWSP */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_lwsp(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.LWSP");
@ -4228,7 +4229,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//92: instruction C.MV
/* instruction 92: C.MV */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_mv(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.MV");
@ -4260,7 +4261,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//93: instruction C.JR
/* instruction 93: C.JR */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_jr(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.JR");
@ -4289,7 +4290,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//94: instruction C.ADD
/* instruction 94: C.ADD */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_add(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.ADD");
@ -4323,7 +4324,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//95: instruction C.JALR
/* instruction 95: C.JALR */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_jalr(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.JALR");
@ -4357,7 +4358,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//96: instruction C.EBREAK
/* instruction 96: C.EBREAK */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_ebreak(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.EBREAK");
@ -4383,7 +4384,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//97: instruction C.SWSP
/* instruction 97: C.SWSP */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __c_swsp(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("C.SWSP");
@ -4422,7 +4423,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//98: instruction DII
/* instruction 98: DII */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __dii(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("DII");
@ -4450,7 +4451,6 @@ private:
return std::make_tuple(vm::CONT, bb);
}
/* end generated code */
/****************************************************************************
* end opcode definitions
****************************************************************************/

178
riscv/src/internal/vm_rv64ia.cpp
View File

@ -179,9 +179,8 @@ private:
compile_func op;
};
/* start generated code */
const std::array<InstructionDesriptor, 86> instr_descr = {{
/* entries are: valid value, valid mask, function ptr */
/* entries are: size, valid value, valid mask, function ptr */
/* instruction LWU */
{32, 0b00000000000000000110000000000011, 0b00000000000000000111000001111111, &this_class::__lwu},
/* instruction LD */
@ -355,7 +354,9 @@ private:
/* instruction AMOMAXU.W */
{32, 0b11100000000000000010000000101111, 0b11111000000000000111000001111111, &this_class::__amomaxu_w},
}};
//0: instruction LWU
/* instruction definitions */
/* instruction 0: LWU */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __lwu(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("LWU");
@ -396,7 +397,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//1: instruction LD
/* instruction 1: LD */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __ld(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("LD");
@ -437,7 +438,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//2: instruction SD
/* instruction 2: SD */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sd(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SD");
@ -476,7 +477,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//3: instruction SLLI
/* instruction 3: SLLI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __slli(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SLLI");
@ -517,7 +518,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//4: instruction SRLI
/* instruction 4: SRLI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __srli(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SRLI");
@ -558,7 +559,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//5: instruction SRAI
/* instruction 5: SRAI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __srai(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SRAI");
@ -599,7 +600,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//6: instruction ADDIW
/* instruction 6: ADDIW */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __addiw(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("ADDIW");
@ -643,7 +644,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//7: instruction SLLIW
/* instruction 7: SLLIW */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __slliw(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SLLIW");
@ -687,7 +688,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//8: instruction SRLIW
/* instruction 8: SRLIW */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __srliw(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SRLIW");
@ -731,7 +732,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//9: instruction SRAIW
/* instruction 9: SRAIW */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sraiw(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SRAIW");
@ -775,7 +776,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//10: instruction ADDW
/* instruction 10: ADDW */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __addw(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("ADDW");
@ -820,7 +821,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//11: instruction SUBW
/* instruction 11: SUBW */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __subw(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SUBW");
@ -865,7 +866,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//12: instruction SLLW
/* instruction 12: SLLW */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sllw(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SLLW");
@ -916,7 +917,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//13: instruction SRLW
/* instruction 13: SRLW */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __srlw(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SRLW");
@ -967,7 +968,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//14: instruction SRAW
/* instruction 14: SRAW */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sraw(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SRAW");
@ -1018,7 +1019,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//15: instruction LUI
/* instruction 15: LUI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __lui(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("LUI");
@ -1052,7 +1053,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//16: instruction AUIPC
/* instruction 16: AUIPC */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __auipc(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AUIPC");
@ -1088,7 +1089,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//17: instruction JAL
/* instruction 17: JAL */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __jal(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("JAL");
@ -1126,7 +1127,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//18: instruction JALR
/* instruction 18: JALR */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __jalr(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("JALR");
@ -1192,7 +1193,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//19: instruction BEQ
/* instruction 19: BEQ */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __beq(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("BEQ");
@ -1234,7 +1235,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//20: instruction BNE
/* instruction 20: BNE */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __bne(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("BNE");
@ -1276,7 +1277,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//21: instruction BLT
/* instruction 21: BLT */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __blt(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("BLT");
@ -1322,7 +1323,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//22: instruction BGE
/* instruction 22: BGE */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __bge(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("BGE");
@ -1368,7 +1369,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//23: instruction BLTU
/* instruction 23: BLTU */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __bltu(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("BLTU");
@ -1410,7 +1411,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//24: instruction BGEU
/* instruction 24: BGEU */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __bgeu(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("BGEU");
@ -1452,7 +1453,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//25: instruction LB
/* instruction 25: LB */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __lb(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("LB");
@ -1493,7 +1494,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//26: instruction LH
/* instruction 26: LH */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __lh(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("LH");
@ -1534,7 +1535,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//27: instruction LW
/* instruction 27: LW */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __lw(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("LW");
@ -1575,7 +1576,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//28: instruction LBU
/* instruction 28: LBU */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __lbu(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("LBU");
@ -1616,7 +1617,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//29: instruction LHU
/* instruction 29: LHU */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __lhu(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("LHU");
@ -1657,7 +1658,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//30: instruction SB
/* instruction 30: SB */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sb(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SB");
@ -1696,7 +1697,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//31: instruction SH
/* instruction 31: SH */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sh(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SH");
@ -1735,7 +1736,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//32: instruction SW
/* instruction 32: SW */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sw(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SW");
@ -1774,7 +1775,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//33: instruction ADDI
/* instruction 33: ADDI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __addi(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("ADDI");
@ -1811,7 +1812,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//34: instruction SLTI
/* instruction 34: SLTI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __slti(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SLTI");
@ -1857,7 +1858,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//35: instruction SLTIU
/* instruction 35: SLTIU */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sltiu(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SLTIU");
@ -1904,7 +1905,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//36: instruction XORI
/* instruction 36: XORI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __xori(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("XORI");
@ -1941,7 +1942,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//37: instruction ORI
/* instruction 37: ORI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __ori(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("ORI");
@ -1978,7 +1979,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//38: instruction ANDI
/* instruction 38: ANDI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __andi(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("ANDI");
@ -2015,7 +2016,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//39: instruction ADD
/* instruction 39: ADD */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __add(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("ADD");
@ -2052,7 +2053,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//40: instruction SUB
/* instruction 40: SUB */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sub(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SUB");
@ -2089,7 +2090,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//41: instruction SLL
/* instruction 41: SLL */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sll(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SLL");
@ -2128,7 +2129,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//42: instruction SLT
/* instruction 42: SLT */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __slt(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SLT");
@ -2174,7 +2175,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//43: instruction SLTU
/* instruction 43: SLTU */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sltu(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SLTU");
@ -2222,7 +2223,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//44: instruction XOR
/* instruction 44: XOR */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __xor(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("XOR");
@ -2259,7 +2260,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//45: instruction SRL
/* instruction 45: SRL */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __srl(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SRL");
@ -2298,7 +2299,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//46: instruction SRA
/* instruction 46: SRA */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sra(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SRA");
@ -2337,7 +2338,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//47: instruction OR
/* instruction 47: OR */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __or(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("OR");
@ -2374,7 +2375,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//48: instruction AND
/* instruction 48: AND */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __and(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AND");
@ -2411,7 +2412,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//49: instruction FENCE
/* instruction 49: FENCE */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __fence(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("FENCE");
@ -2450,7 +2451,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//50: instruction FENCE_I
/* instruction 50: FENCE_I */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __fence_i(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("FENCE_I");
@ -2483,7 +2484,7 @@ private:
return std::make_tuple(iss::vm::FLUSH, nullptr);
}
//51: instruction ECALL
/* instruction 51: ECALL */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __ecall(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("ECALL");
@ -2509,7 +2510,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//52: instruction EBREAK
/* instruction 52: EBREAK */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __ebreak(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("EBREAK");
@ -2535,7 +2536,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//53: instruction URET
/* instruction 53: URET */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __uret(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("URET");
@ -2561,7 +2562,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//54: instruction SRET
/* instruction 54: SRET */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sret(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SRET");
@ -2587,7 +2588,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//55: instruction MRET
/* instruction 55: MRET */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __mret(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("MRET");
@ -2613,7 +2614,7 @@ private:
return std::make_tuple(iss::vm::BRANCH, nullptr);
}
//56: instruction WFI
/* instruction 56: WFI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __wfi(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("WFI");
@ -2641,7 +2642,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//57: instruction SFENCE.VMA
/* instruction 57: SFENCE.VMA */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sfence_vma(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SFENCE.VMA");
@ -2679,7 +2680,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//58: instruction CSRRW
/* instruction 58: CSRRW */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __csrrw(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("CSRRW");
@ -2727,7 +2728,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//59: instruction CSRRS
/* instruction 59: CSRRS */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __csrrs(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("CSRRS");
@ -2773,7 +2774,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//60: instruction CSRRC
/* instruction 60: CSRRC */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __csrrc(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("CSRRC");
@ -2819,7 +2820,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//61: instruction CSRRWI
/* instruction 61: CSRRWI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __csrrwi(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("CSRRWI");
@ -2862,7 +2863,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//62: instruction CSRRSI
/* instruction 62: CSRRSI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __csrrsi(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("CSRRSI");
@ -2910,7 +2911,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//63: instruction CSRRCI
/* instruction 63: CSRRCI */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __csrrci(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("CSRRCI");
@ -2958,7 +2959,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//64: instruction LR.D
/* instruction 64: LR.D */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __lr_d(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("LR.D");
@ -3006,7 +3007,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//65: instruction SC.D
/* instruction 65: SC.D */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sc_d(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SC.D");
@ -3073,7 +3074,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//66: instruction AMOSWAP.D
/* instruction 66: AMOSWAP.D */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amoswap_d(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOSWAP.D");
@ -3119,7 +3120,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//67: instruction AMOADD.D
/* instruction 67: AMOADD.D */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amoadd_d(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOADD.D");
@ -3169,7 +3170,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//68: instruction AMOXOR.D
/* instruction 68: AMOXOR.D */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amoxor_d(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOXOR.D");
@ -3219,7 +3220,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//69: instruction AMOAND.D
/* instruction 69: AMOAND.D */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amoand_d(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOAND.D");
@ -3269,7 +3270,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//70: instruction AMOOR.D
/* instruction 70: AMOOR.D */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amoor_d(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOOR.D");
@ -3319,7 +3320,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//71: instruction AMOMIN.D
/* instruction 71: AMOMIN.D */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amomin_d(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOMIN.D");
@ -3378,7 +3379,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//72: instruction AMOMAX.D
/* instruction 72: AMOMAX.D */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amomax_d(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOMAX.D");
@ -3437,7 +3438,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//73: instruction AMOMINU.D
/* instruction 73: AMOMINU.D */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amominu_d(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOMINU.D");
@ -3492,7 +3493,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//74: instruction AMOMAXU.D
/* instruction 74: AMOMAXU.D */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amomaxu_d(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOMAXU.D");
@ -3547,7 +3548,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//75: instruction LR.W
/* instruction 75: LR.W */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __lr_w(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("LR.W");
@ -3595,7 +3596,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//76: instruction SC.W
/* instruction 76: SC.W */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __sc_w(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("SC.W");
@ -3661,7 +3662,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//77: instruction AMOSWAP.W
/* instruction 77: AMOSWAP.W */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amoswap_w(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOSWAP.W");
@ -3707,7 +3708,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//78: instruction AMOADD.W
/* instruction 78: AMOADD.W */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amoadd_w(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOADD.W");
@ -3757,7 +3758,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//79: instruction AMOXOR.W
/* instruction 79: AMOXOR.W */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amoxor_w(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOXOR.W");
@ -3807,7 +3808,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//80: instruction AMOAND.W
/* instruction 80: AMOAND.W */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amoand_w(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOAND.W");
@ -3857,7 +3858,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//81: instruction AMOOR.W
/* instruction 81: AMOOR.W */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amoor_w(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOOR.W");
@ -3907,7 +3908,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//82: instruction AMOMIN.W
/* instruction 82: AMOMIN.W */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amomin_w(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOMIN.W");
@ -3966,7 +3967,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//83: instruction AMOMAX.W
/* instruction 83: AMOMAX.W */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amomax_w(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOMAX.W");
@ -4025,7 +4026,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//84: instruction AMOMINU.W
/* instruction 84: AMOMINU.W */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amominu_w(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOMINU.W");
@ -4080,7 +4081,7 @@ private:
return std::make_tuple(vm::CONT, bb);
}
//85: instruction AMOMAXU.W
/* instruction 85: AMOMAXU.W */
std::tuple<vm::continuation_e, llvm::BasicBlock*> __amomaxu_w(virt_addr_t& pc, code_word_t instr, llvm::BasicBlock* bb){
bb->setName("AMOMAXU.W");
@ -4139,7 +4140,6 @@ private:
return std::make_tuple(vm::CONT, bb);
}
/* end generated code */
/****************************************************************************
* end opcode definitions
****************************************************************************/