VP
/
HIFIVE1-VP
7
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Fixed a wrong link

This commit is contained in:
Eyck Jentzsch 2019-06-29 13:39:17 +00:00
parent 679f311c52
commit a53adf3bc2
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
README.md
View File

@ -1,5 +1,5 @@
# DBT-RISE-RISCV
Am instruction set simulator based on DBT-RISE implementing the RISC-V ISA. The project is hosted at https://git.minres.com/DBT-RISE/DBT-RISE-RISCV .
Am instruction set simulator based on DBT-RISE implementing the RISC-V ISA. The project is hosted at https://git.minres.com/VP/RISCV-VP.
**DBT-RISE-RISCV README**