Restructured project
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62
riscv.sc/incl/sysc/SiFive/platform.h
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62
riscv.sc/incl/sysc/SiFive/platform.h
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/*******************************************************************************
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* Copyright 2017 eyck@minres.com
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*
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* Licensed under the Apache License, Version 2.0 (the "License"); you may not
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* use this file except in compliance with the License. You may obtain a copy
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* of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations under
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* the License.
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******************************************************************************/
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/*
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* simplesystem.h
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*
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* Created on: 17.09.2017
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* Author: eyck@minres.com
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*/
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#ifndef SIMPLESYSTEM_H_
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#define SIMPLESYSTEM_H_
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#include "uart.h"
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#include "spi.h"
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#include "gpio.h"
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#include "plic.h"
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#include <sysc/router.h>
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#include <sysc/kernel/sc_module.h>
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#include <array>
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#include "core_complex.h"
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namespace sysc {
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class platform: public sc_core::sc_module {
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public:
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SC_HAS_PROCESS(platform);
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SiFive::core_complex i_master;
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router<> i_router;
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uart i_uart;
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spi i_spi;
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gpio i_gpio;
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plic i_plic;
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sc_core::sc_signal<sc_core::sc_time> s_clk;
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sc_core::sc_signal<bool> s_rst;
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platform(sc_core::sc_module_name nm);
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protected:
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void gen_reset();
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#include "gen/e300_plat_t.h"
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};
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} /* namespace sysc */
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#endif /* SIMPLESYSTEM_H_ */
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