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update submodule pointers

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This commit is contained in:
Eyck Jentzsch
2020-06-18 06:20:04 +02:00
parent 7148f1caec
commit 6ee0cd1b29
10 changed files with 37 additions and 39 deletions
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4
platform/src/sysc/clint.cpp
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@ -117,11 +117,11 @@ void clint::update_mtime(bool force) {
if (regs->r_mtimecmp > regs->r_mtime && clk > sc_core::SC_ZERO_TIME) {
sc_core::sc_time next_trigger =
(clk * lfclk_mutiplier) * (regs->r_mtimecmp - regs->r_mtime) - cnt_fraction * clk;
SCTRACE() << "Timer fires at " << sc_time_stamp() + next_trigger;
SCCTRACE() << "Timer fires at " << sc_time_stamp() + next_trigger;
mtime_evt.notify(next_trigger);
mtime_int_o.write(false);
} else {
SCTRACE() << "Timer fired at " << sc_time_stamp();
SCCTRACE() << "Timer fired at " << sc_time_stamp();
mtime_int_o.write(true);
}
}

2
platform/src/sysc/gpio.cpp
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@ -111,7 +111,7 @@ gpio::~gpio() = default;
void gpio::before_end_of_elaboration() {
if (write_to_ws.get_value()) {
SCTRACE() << "Adding WS handler for " << (std::string{"/ws/"} + name());
SCCTRACE() << "Adding WS handler for " << (std::string{"/ws/"} + name());
handler = std::make_shared<WsHandler>();
sc_comm_singleton::inst().registerWebSocketHandler((std::string{"/ws/"} + name()).c_str(), handler);
}

4
platform/src/sysc/mcp_adc.cpp
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@ -86,7 +86,7 @@ void mcp_3008::do_conversion() {
auto inp = ch_i[channel].read();
auto norm = 1024.0 * inp / vref;
auto res = static_cast<int>(norm);
SCDEBUG(this->name()) << "Converting " << inp << " to " << norm << " as int " << res;
SCCDEBUG(this->name()) << "Converting " << inp << " to " << norm << " as int " << res;
tx_bytes[1] = bit_sub<8, 2>(res);
tx_bytes[2] = bit_sub<0, 8>(res);
} else {
@ -176,7 +176,7 @@ void mcp_3208::do_conversion() {
auto inp = ch_i[channel].read();
auto norm = 4096.0 * inp / vref;
auto res = static_cast<int>(norm);
SCDEBUG(this->name()) << "Converting channel " << channel << " " << inp << "V to " << norm << " as int "
SCCDEBUG(this->name()) << "Converting channel " << channel << " " << inp << "V to " << norm << " as int "
<< res;
tx_bytes[1] = bit_sub<8, 4>(res);
tx_bytes[2] = bit_sub<0, 8>(res);

8
platform/src/sysc/plic.cpp
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@ -111,7 +111,7 @@ void plic::global_int_port_cb() {
if (enable && global_interrupts_i[i].read() == 1) {
regs->r_pending[reg_idx] = regs->r_pending[reg_idx] | (0x1 << bit_ofs);
handle_pending = true;
SCDEBUG(this->name()) << "pending interrupt identified: " << i;
SCCDEBUG(this->name()) << "pending interrupt identified: " << i;
}
}
@ -138,7 +138,7 @@ void plic::handle_pending_int() {
claim_prio = prio;
claim_int = i;
raise_int = true;
SCDEBUG(this->name()) << "pending interrupt activated: " << i;
SCCDEBUG(this->name()) << "pending interrupt activated: " << i;
}
}
}
@ -149,14 +149,14 @@ void plic::handle_pending_int() {
// todo: evluate clock period
} else {
regs->r_claim_complete = 0;
SCDEBUG(this->name()) << "no further pending interrupt.";
SCCDEBUG(this->name()) << "no further pending interrupt.";
}
}
void plic::reset_pending_int(uint32_t irq) {
// todo: evaluate enable register (see spec)
// todo: make sure that pending is set, otherwise don't reset irq ... read spec.
SCTRACE(this->name()) << "reset pending interrupt: " << irq;
SCCTRACE(this->name()) << "reset pending interrupt: " << irq;
// reset related pending bit
auto reg_idx = irq >> 5;
auto bit_ofs = irq & 0x1F;

4
platform/src/sysc/terminal.cpp
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@ -57,7 +57,7 @@ terminal::~terminal() = default;
void terminal::before_end_of_elaboration() {
if (write_to_ws.get_value()) {
SCTRACE() << "Adding WS handler for " << (std::string{"/ws/"} + name());
SCCTRACE() << "Adding WS handler for " << (std::string{"/ws/"} + name());
handler = std::make_shared<WsHandler>();
sc_comm_singleton::inst().registerWebSocketHandler((std::string{"/ws/"} + name()).c_str(), handler);
}
@ -80,7 +80,7 @@ void terminal::receive(tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, sc_core::sc_time
this->handler->send(os.str());
});
else
SCINFO(this->name()) << " receive: '" << msg << "'";
SCCINFO(this->name()) << " receive: '" << msg << "'";
queue.clear();
}
}