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Fixed 64bit integer base instruction set

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This commit is contained in:
Eyck Jentzsch
2017-11-18 00:42:33 +01:00
parent 7512aad118
commit 5d508740fd
9 changed files with 267 additions and 159 deletions
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4
riscv/src/iss/rv32imac.cpp
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@ -52,7 +52,9 @@ extern "C" {
using namespace iss::arch;
rv32imac::rv32imac() { reg.icount = 0; }
rv32imac::rv32imac() { reg.icount = 0; reg.machine_state = 0x3;}
rv32imac::~rv32imac(){}
void rv32imac::reset(uint64_t address) {
for (size_t i = 0; i < traits<rv32imac>::NUM_REGS; ++i)

6
riscv/src/iss/rv64ia.cpp
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@ -52,9 +52,9 @@ extern "C" {
using namespace iss::arch;
rv64ia::rv64ia() { reg.icount = 0; }
rv64ia::rv64ia() { reg.icount = 0; reg.machine_state = 0x3;}
rv64ia::~rv64ia() {}
rv64ia::~rv64ia(){}
void rv64ia::reset(uint64_t address) {
for (size_t i = 0; i < traits<rv64ia>::NUM_REGS; ++i)
@ -62,7 +62,7 @@ void rv64ia::reset(uint64_t address) {
reg.PC = address;
reg.NEXT_PC = reg.PC;
reg.trap_state = 0;
reg.machine_state = 0x0;
reg.machine_state = 0x3;
}
uint8_t *rv64ia::get_regs_base_ptr() { return reinterpret_cast<uint8_t *>(&reg); }