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Added SystemC version of HiFive FE310

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This commit is contained in:
Eyck Jentzsch
2017-10-04 10:31:11 +02:00
parent d8184abbcc
commit 4867cca187
43 changed files with 1632 additions and 537 deletions
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20
riscv.sc/gen_input/plic.rdl
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@ -2,36 +2,26 @@ regfile plic_regs {
reg {
name="priority";
desc="interrupt source priority";
field {
name = "priority";
} priority[2:0];
field {} priority[2:0];
} priority[255] @0x004;
reg {
name="pending";
desc="pending irq";
field {
name = "pending";
} pending[31:0];
field {} pending[31:0];
} pending @0x1000;
reg {
name="enabled";
desc="enabled interrupts";
field {
name = "enabled";
} enabled[31:0];
field {} enabled[31:0];
} enabled @0x2000;
reg {
name="threshold";
desc="interrupt priority threshold";
field {
name = "threshold";
} \threshold[2:0];
field {} \threshold[2:0];
} \threshold @0x200000;
reg {
name="claim/complete";
desc="interrupt handling completed";
field {
name = "interrupt_claimed";
} interrupt_claimed[31:0];
field {} interrupt_claimed[31:0];
} claim_complete @0x200004;
};