VP/HIFIVE1-VP
8
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Added use of CCI and support of LLVM 5.0

Browse Source 
changed load_file to adhere to API change in DBT-RISE
This commit is contained in:
Eyck Jentzsch
2018-03-27 19:49:11 +02:00
parent 36be8b87f1
commit 3ea9651665
16 changed files with 61 additions and 36 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
riscv.sc/incl/sysc/SiFive/core_complex.h
View File

@ -40,8 +40,8 @@
#include "scc/utilities.h"
#include <tlm>
#include <tlm_utils/tlm_quantumkeeper.h>
#include <cci_configuration>
#include <util/range_lut.h>
#include "scc/ext_attribute.h"
#include "scv4tlm/tlm_rec_initiator_socket.h"
#include "scc/initiator_mixin.h"
#include "scc/traceable.h"
@ -94,15 +94,15 @@ public:
sc_core::sc_vector<sc_core::sc_in<bool>> local_irq_i;
scc::ext_attribute<std::string> elf_file;
cci::cci_param<std::string> elf_file;
scc::ext_attribute<bool> enable_disass;
cci::cci_param<bool> enable_disass;
scc::ext_attribute<uint64_t> reset_address;
cci::cci_param<uint64_t> reset_address;
scc::ext_attribute<unsigned short> gdb_server_port;
cci::cci_param<unsigned short> gdb_server_port;
scc::ext_attribute<bool> dump_ir;
cci::cci_param<bool> dump_ir;
core_complex(sc_core::sc_module_name name);

5
riscv.sc/incl/sysc/SiFive/gpio.h
View File

@ -38,7 +38,7 @@
#define _GPIO_H_
#include "scc/tlm_target.h"
#include "scc/ext_attribute.h"
#include "cci_configuration"
#include <sysc/communication/sc_signal_rv_ports.h>
namespace sysc {
@ -56,7 +56,8 @@ public:
gpio(sc_core::sc_module_name nm);
virtual ~gpio() override; // need to keep it in source file because of fwd declaration of gpio_regs
scc::ext_attribute<bool> write_to_ws;
cci::cci_param<bool> write_to_ws;
protected:
void clock_cb();
void reset_cb();

4
riscv.sc/incl/sysc/SiFive/uart.h
View File

@ -37,7 +37,7 @@
#ifndef _UART_H_
#define _UART_H_
#include "scc/ext_attribute.h"
#include "cci_configuration"
#include "scc/tlm_target.h"
namespace sysc {
@ -53,7 +53,7 @@ public:
uart(sc_core::sc_module_name nm);
virtual ~uart() override;
scc::ext_attribute<bool> write_to_ws;
cci::cci_param<bool> write_to_ws;
protected:
void clock_cb();
void reset_cb();