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Added use of CCI and support of LLVM 5.0

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changed load_file to adhere to API change in DBT-RISE
This commit is contained in:
Eyck Jentzsch
2018-03-27 19:49:11 +02:00
parent 36be8b87f1
commit 3ea9651665
16 changed files with 61 additions and 36 deletions
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7
riscv.sc/CMakeLists.txt
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@ -49,6 +49,13 @@ else(SystemC_FOUND)
message( FATAL_ERROR "SystemC library not found." )
endif(SystemC_FOUND)
if(CCI_FOUND)
include_directories(${CCI_INCLUDE_DIRS})
link_directories(${CCI_LIBRARY_DIRS})
else()
message( FATAL_ERROR "SystemC CCI library not found." )
endif()
if(SCV_FOUND)
add_definitions(-DWITH_SCV)
link_directories(${SCV_LIBRARY_DIRS})

12
riscv.sc/incl/sysc/SiFive/core_complex.h
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@ -40,8 +40,8 @@
#include "scc/utilities.h"
#include <tlm>
#include <tlm_utils/tlm_quantumkeeper.h>
#include <cci_configuration>
#include <util/range_lut.h>
#include "scc/ext_attribute.h"
#include "scv4tlm/tlm_rec_initiator_socket.h"
#include "scc/initiator_mixin.h"
#include "scc/traceable.h"
@ -94,15 +94,15 @@ public:
sc_core::sc_vector<sc_core::sc_in<bool>> local_irq_i;
scc::ext_attribute<std::string> elf_file;
cci::cci_param<std::string> elf_file;
scc::ext_attribute<bool> enable_disass;
cci::cci_param<bool> enable_disass;
scc::ext_attribute<uint64_t> reset_address;
cci::cci_param<uint64_t> reset_address;
scc::ext_attribute<unsigned short> gdb_server_port;
cci::cci_param<unsigned short> gdb_server_port;
scc::ext_attribute<bool> dump_ir;
cci::cci_param<bool> dump_ir;
core_complex(sc_core::sc_module_name name);

5
riscv.sc/incl/sysc/SiFive/gpio.h
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@ -38,7 +38,7 @@
#define _GPIO_H_
#include "scc/tlm_target.h"
#include "scc/ext_attribute.h"
#include "cci_configuration"
#include <sysc/communication/sc_signal_rv_ports.h>
namespace sysc {
@ -56,7 +56,8 @@ public:
gpio(sc_core::sc_module_name nm);
virtual ~gpio() override; // need to keep it in source file because of fwd declaration of gpio_regs
scc::ext_attribute<bool> write_to_ws;
cci::cci_param<bool> write_to_ws;
protected:
void clock_cb();
void reset_cb();

4
riscv.sc/incl/sysc/SiFive/uart.h
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@ -37,7 +37,7 @@
#ifndef _UART_H_
#define _UART_H_
#include "scc/ext_attribute.h"
#include "cci_configuration"
#include "scc/tlm_target.h"
namespace sysc {
@ -53,7 +53,7 @@ public:
uart(sc_core::sc_module_name nm);
virtual ~uart() override;
scc::ext_attribute<bool> write_to_ws;
cci::cci_param<bool> write_to_ws;
protected:
void clock_cb();
void reset_cb();

3
riscv.sc/src/CMakeLists.txt
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@ -28,8 +28,10 @@ set(APPLICATION_NAME riscv.sc)
include_directories(${CONAN_INCLUDE_DIRS_SEASOCKS})
include_directories(${SystemC_INCLUDE_DIRS})
include_directories(${CCI_INCLUDE_DIRS})
link_directories(${SystemC_LIBRARY_DIR})
link_directories(${CCI_LIBRARY_DIR})
link_directories(${CONAN_LIB_DIRS_SEASOCKS})
add_executable(${APPLICATION_NAME} ${APP_SOURCES})
@ -43,6 +45,7 @@ target_link_libraries(${APPLICATION_NAME} sc-components)
target_link_libraries(${APPLICATION_NAME} ${CONAN_LIBS_SEASOCKS})
target_link_libraries(${APPLICATION_NAME} external)
target_link_libraries(${APPLICATION_NAME} ${llvm_libs})
target_link_libraries(${APPLICATION_NAME} ${CCI_LIBRARIES} )
target_link_libraries(${APPLICATION_NAME} ${SystemC_LIBRARIES} )
if(SCV_FOUND)
add_definitions(-DWITH_SCV)

9
riscv.sc/src/sc_main.cpp
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@ -43,6 +43,7 @@
#include "scc/report.h"
#include "scc/scv_tr_db.h"
#include "scc/tracer.h"
#include <cci_utils/broker.h>
using namespace sysc;
namespace po = boost::program_options;
@ -56,6 +57,7 @@ const size_t ERROR_UNHANDLED_EXCEPTION = 2;
int sc_main(int argc, char *argv[]) {
// sc_report_handler::set_handler(my_report_handler);
scc::Logger<>::reporting_level() = logging::ERROR;
cci::cci_register_broker(new cci_utils::broker("Global Broker"));
///////////////////////////////////////////////////////////////////////////
// CLI argument parsing
///////////////////////////////////////////////////////////////////////////
@ -63,10 +65,9 @@ int sc_main(int argc, char *argv[]) {
// clang-format off
desc.add_options()
("help,h", "Print help message")
("verbose,v", po::value<int>()->implicit_value(0), "Sets logging verbosity")
("verbose,v", po::value<int>()->implicit_value(3), "Sets logging verbosity")
("log-file", po::value<std::string>(), "Sets default log file.")
("disass,d", po::value<std::string>()->implicit_value(""), "Enables disassembly")
// ("elf,l", po::value<std::vector<std::string>>(), "ELF file(s) to load")
("elf,l", po::value<std::string>(), "ELF file to load")
("gdb-port,g", po::value<unsigned short>()->default_value(0), "enable gdb server and specify port to use")
("dump-ir", "dump the intermediate representation")
@ -125,14 +126,14 @@ int sc_main(int argc, char *argv[]) {
platform i_simple_system("i_simple_system");
// sr_report_handler::add_sc_object_to_filter(&i_simple_system.i_master,
// sc_core::SC_WARNING, sc_core::SC_MEDIUM);
if (vm.count("dump-config")){
if(vm["dump-config"].as<std::string>().size()>0){
std::ofstream of{vm["dump-config"].as<std::string>()};
if(of.is_open())
cfg.dump_configuration(of);
}
cfg.configure();
// overwrite with command line settings
if (vm.count("gdb-port"))
if (vm["gdb-port"].as<unsigned short>())
cfg.set_value("i_simple_system.i_core_complex.gdb_server_port", vm["gdb-port"].as<unsigned short>());
if (vm.count("dump-ir"))
cfg.set_value("i_simple_system.i_core_complex.dump_ir", vm.count("dump-ir") != 0);

21
riscv.sc/src/sysc/core_complex.cpp
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@ -211,11 +211,11 @@ core_complex::core_complex(sc_core::sc_module_name name)
, NAMED(global_irq_i)
, NAMED(timer_irq_i)
, NAMED(local_irq_i, 16)
, NAMED(elf_file, this)
, NAMED(enable_disass, true, this)
, NAMED(reset_address, 0ULL, this)
, NAMED(gdb_server_port, 0, this)
, NAMED(dump_ir, false, this)
, NAMED(elf_file, "")
, NAMED(enable_disass, true)
, NAMED(reset_address, 0ULL)
, NAMED(gdb_server_port, 0)
, NAMED(dump_ir, false)
, read_lut(tlm_dmi_ext())
, write_lut(tlm_dmi_ext())
, tgt_adapter(nullptr)
@ -255,8 +255,8 @@ void core_complex::trace(sc_core::sc_trace_file *trf) {}
void core_complex::before_end_of_elaboration() {
cpu = make_unique<core_wrapper>(this);
vm = create<arch::rv32imac>(cpu.get(), gdb_server_port.value, dump_ir.value);
vm->setDisassEnabled(enable_disass.value);
vm = create<arch::rv32imac>(cpu.get(), gdb_server_port.get_value(), dump_ir.get_value());
vm->setDisassEnabled(enable_disass.get_value());
auto* srv = debugger::server<debugger::gdb_session>::get();
if(srv) tgt_adapter = srv->get_target();
if(tgt_adapter)
@ -270,7 +270,10 @@ void core_complex::before_end_of_elaboration() {
void core_complex::start_of_simulation() {
quantum_keeper.reset();
if (elf_file.value.size() > 0) cpu->load_file(elf_file.value);
if (elf_file.get_value().size() > 0){
std::pair<uint64_t,bool> start_addr=cpu->load_file(elf_file.get_value());
if(reset_address.is_default_value() && start_addr.second==true) reset_address.set_value(start_addr.first);
}
#ifdef WITH_SCV
if (m_db!=nullptr && stream_handle == nullptr) {
string basename(this->name());
@ -312,7 +315,7 @@ void core_complex::global_irq_cb(){
void core_complex::run() {
wait(sc_core::SC_ZERO_TIME);
cpu->reset(reset_address.value);
cpu->reset(reset_address.get_value());
try {
vm->start(-1);
} catch (simulation_stopped &e) {

4
riscv.sc/src/sysc/gpio.cpp
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@ -50,7 +50,7 @@ gpio::gpio(sc_core::sc_module_name nm)
, NAMED(rst_i)
, NAMED(pins_io)
, NAMEDD(gpio_regs, regs)
, NAMED(write_to_ws, false, this){
, NAMED(write_to_ws, false){
regs->registerResources(*this);
SC_METHOD(clock_cb);
sensitive << clk_i;
@ -82,7 +82,7 @@ gpio::gpio(sc_core::sc_module_name nm)
gpio::~gpio() {}
void gpio::before_end_of_elaboration() {
if(write_to_ws.value) {
if(write_to_ws.get_value()) {
LOG(TRACE)<<"Adding WS handler for "<<(std::string{"/ws/"}+name());
handler=std::make_shared<WsHandler>();
sc_comm_singleton::inst().registerWebSocketHandler((std::string{"/ws/"}+name()).c_str(), handler);

4
riscv.sc/src/sysc/uart.cpp
View File

@ -57,7 +57,7 @@ uart::uart(sc_core::sc_module_name nm)
, NAMED(clk_i)
, NAMED(rst_i)
, NAMEDD(uart_regs, regs)
, NAMED(write_to_ws, false, this) {
, NAMED(write_to_ws, false) {
regs->registerResources(*this);
SC_METHOD(clock_cb);
sensitive << clk_i;
@ -76,7 +76,7 @@ uart::uart(sc_core::sc_module_name nm)
uart::~uart() {}
void uart::before_end_of_elaboration() {
if(write_to_ws.value) {
if(write_to_ws.get_value()) {
LOG(TRACE)<<"Adding WS handler for "<<(std::string{"/ws/"}+name());
handler=std::make_shared<WsHandler>();
sc_comm_singleton::inst().registerWebSocketHandler((std::string{"/ws/"}+name()).c_str(), handler);