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Streamline arch descriptions according to latest CoreDSL changes

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This commit is contained in:
Eyck Jentzsch
2018-04-24 17:18:24 +02:00
parent 65ceedd157
commit 142654b0a2
12 changed files with 73 additions and 55 deletions
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16
riscv/src/internal/vm_rv32gc.cpp
View File

@ -2578,11 +2578,11 @@ private:
Value* res_val = this->builder.CreateMul(
this->gen_ext(
this->gen_reg_load(fld_rs1_val + traits<ARCH>::X0, 0),
64,
128,
false),
this->gen_ext(
this->gen_reg_load(fld_rs2_val + traits<ARCH>::X0, 0),
64,
128,
false));
Value* X_rd_val = this->gen_ext(
res_val,
@ -2625,11 +2625,11 @@ private:
Value* res_val = this->builder.CreateMul(
this->gen_ext(
this->gen_reg_load(fld_rs1_val + traits<ARCH>::X0, 0),
64,
128,
true),
this->gen_ext(
this->gen_reg_load(fld_rs2_val + traits<ARCH>::X0, 0),
64,
128,
true));
Value* X_rd_val = this->gen_ext(
this->builder.CreateLShr(
@ -2674,11 +2674,11 @@ private:
Value* res_val = this->builder.CreateMul(
this->gen_ext(
this->gen_reg_load(fld_rs1_val + traits<ARCH>::X0, 0),
64,
128,
true),
this->gen_ext(
this->gen_reg_load(fld_rs2_val + traits<ARCH>::X0, 0),
64,
128,
false));
Value* X_rd_val = this->gen_ext(
this->builder.CreateLShr(
@ -2723,11 +2723,11 @@ private:
Value* res_val = this->builder.CreateMul(
this->gen_ext(
this->gen_reg_load(fld_rs1_val + traits<ARCH>::X0, 0),
64,
128,
false),
this->gen_ext(
this->gen_reg_load(fld_rs2_val + traits<ARCH>::X0, 0),
64,
128,
false));
Value* X_rd_val = this->gen_ext(
this->builder.CreateLShr(

16
riscv/src/internal/vm_rv32imac.cpp
View File

@ -2458,11 +2458,11 @@ private:
Value* res_val = this->builder.CreateMul(
this->gen_ext(
this->gen_reg_load(fld_rs1_val + traits<ARCH>::X0, 0),
64,
128,
false),
this->gen_ext(
this->gen_reg_load(fld_rs2_val + traits<ARCH>::X0, 0),
64,
128,
false));
Value* X_rd_val = this->gen_ext(
res_val,
@ -2505,11 +2505,11 @@ private:
Value* res_val = this->builder.CreateMul(
this->gen_ext(
this->gen_reg_load(fld_rs1_val + traits<ARCH>::X0, 0),
64,
128,
true),
this->gen_ext(
this->gen_reg_load(fld_rs2_val + traits<ARCH>::X0, 0),
64,
128,
true));
Value* X_rd_val = this->gen_ext(
this->builder.CreateLShr(
@ -2554,11 +2554,11 @@ private:
Value* res_val = this->builder.CreateMul(
this->gen_ext(
this->gen_reg_load(fld_rs1_val + traits<ARCH>::X0, 0),
64,
128,
true),
this->gen_ext(
this->gen_reg_load(fld_rs2_val + traits<ARCH>::X0, 0),
64,
128,
false));
Value* X_rd_val = this->gen_ext(
this->builder.CreateLShr(
@ -2603,11 +2603,11 @@ private:
Value* res_val = this->builder.CreateMul(
this->gen_ext(
this->gen_reg_load(fld_rs1_val + traits<ARCH>::X0, 0),
64,
128,
false),
this->gen_ext(
this->gen_reg_load(fld_rs2_val + traits<ARCH>::X0, 0),
64,
128,
false));
Value* X_rd_val = this->gen_ext(
this->builder.CreateLShr(

6
riscv/src/internal/vm_rv64ia.cpp
View File

@ -2128,7 +2128,7 @@ private:
this->gen_reg_load(fld_rs1_val + traits<ARCH>::X0, 0),
this->builder.CreateAnd(
this->gen_reg_load(fld_rs2_val + traits<ARCH>::X0, 0),
this->gen_const(64U, 63)));
this->gen_const(64U, 31)));
this->builder.CreateStore(X_rd_val, get_reg_ptr(fld_rd_val + traits<ARCH>::X0), false);
}
this->gen_set_pc(pc, traits<ARCH>::NEXT_PC);
@ -2298,7 +2298,7 @@ private:
this->gen_reg_load(fld_rs1_val + traits<ARCH>::X0, 0),
this->builder.CreateAnd(
this->gen_reg_load(fld_rs2_val + traits<ARCH>::X0, 0),
this->gen_const(64U, 63)));
this->gen_const(64U, 31)));
this->builder.CreateStore(X_rd_val, get_reg_ptr(fld_rd_val + traits<ARCH>::X0), false);
}
this->gen_set_pc(pc, traits<ARCH>::NEXT_PC);
@ -2337,7 +2337,7 @@ private:
this->gen_reg_load(fld_rs1_val + traits<ARCH>::X0, 0),
this->builder.CreateAnd(
this->gen_reg_load(fld_rs2_val + traits<ARCH>::X0, 0),
this->gen_const(64U, 63)));
this->gen_const(64U, 31)));
this->builder.CreateStore(X_rd_val, get_reg_ptr(fld_rd_val + traits<ARCH>::X0), false);
}
this->gen_set_pc(pc, traits<ARCH>::NEXT_PC);